From: Nelson Chu <nelson@rivosinc.com>
To: shihua@iscas.ac.cn
Cc: binutils@sourceware.org, kito.cheng@sifive.com,
vineetg@rivosinc.com, research_trasio@irq.a4lg.com,
christoph.muellner@vrull.eu, palmer@dabbelt.com,
jiawei@iscas.ac.cn
Subject: Re: [PATCH V4] RISC-V: Implement Ztso extension
Date: Wed, 21 Sep 2022 11:47:44 +0800 [thread overview]
Message-ID: <CAPpQWtBusmNDhezv2+4XjMGY_2B9Vuv7tNDqSJniKJOYaxi5gw@mail.gmail.com> (raw)
In-Reply-To: <20220920094504.1729-1-shihua@iscas.ac.cn>
Committed, thanks.
Nelson
On Tue, Sep 20, 2022 at 5:46 PM <shihua@iscas.ac.cn> wrote:
>
> From: Shihua <shihua@iscas.ac.cn>
>
> This patch support ZTSO extension. It will turn on the tso flag for elf_flags once we have enabled Ztso extension.
> This is intended to implement v0.1 of the proposed specification which can be found in Chapter 25 of https://github.com/riscv/riscv-isa-manual/releases/download/draft-20220723-10eea63/riscv-spec.pdf.
>
> V4:
> According to Nelson Chu's feedback ( https://sourceware.org/pipermail/binutils/2022-September/122960.html ),
> * remove support tso for the .option directive
>
> V3:
> According to Tsukasa OI's feedback ( https://sourceware.org/pipermail/binutils/2022-September/122915.html ),
> * remove CLASS_INSN_ZTSO because it is not used.
> * remove testsuite attribute-015.d, because it is not necessary.
> * add testsuite ztso.d, to verify whether the flag TSO is generated.
>
> bfd\ChangeLog:
>
> * elfnn-riscv.c (_bfd_riscv_elf_merge_private_bfd_data): Set TSO flag.
> * elfxx-riscv.c: Add Ztso's arch.
>
> binutils\ChangeLog:
>
> * readelf.c (get_machine_flags): Set TSO flag.
>
> gas\ChangeLog:
>
> * config/tc-riscv.c (riscv_set_tso): Ditto.
> (riscv_set_arch): Ditto.
> * testsuite/gas/riscv/ztso.d: New test.
>
> include\ChangeLog:
>
> * elf/riscv.h (EF_RISCV_TSO): Ditto.
>
> ---
> bfd/elfnn-riscv.c | 3 +++
> bfd/elfxx-riscv.c | 1 +
> binutils/readelf.c | 3 +++
> gas/config/tc-riscv.c | 11 +++++++++++
> gas/testsuite/gas/riscv/ztso.d | 8 ++++++++
> include/elf/riscv.h | 3 +++
> 6 files changed, 29 insertions(+)
> create mode 100644 gas/testsuite/gas/riscv/ztso.d
>
> diff --git a/bfd/elfnn-riscv.c b/bfd/elfnn-riscv.c
> index 0e0a0b09e24..3d2ddf4e651 100644
> --- a/bfd/elfnn-riscv.c
> +++ b/bfd/elfnn-riscv.c
> @@ -3872,6 +3872,9 @@ _bfd_riscv_elf_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
> /* Allow linking RVC and non-RVC, and keep the RVC flag. */
> elf_elfheader (obfd)->e_flags |= new_flags & EF_RISCV_RVC;
>
> + /* Allow linking TSO and non-TSO, and keep the TSO flag. */
> + elf_elfheader (obfd)->e_flags |= new_flags & EF_RISCV_TSO;
> +
> return true;
>
> fail:
> diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c
> index e03b312a381..7eda177bd6e 100644
> --- a/bfd/elfxx-riscv.c
> +++ b/bfd/elfxx-riscv.c
> @@ -1204,6 +1204,7 @@ static struct riscv_supported_ext riscv_supported_std_z_ext[] =
> {"zvl16384b", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
> {"zvl32768b", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
> {"zvl65536b", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
> + {"ztso", ISA_SPEC_CLASS_DRAFT, 0, 1, 0 },
> {NULL, 0, 0, 0, 0}
> };
>
> diff --git a/binutils/readelf.c b/binutils/readelf.c
> index cafba9a4f56..b1dbcad06f5 100644
> --- a/binutils/readelf.c
> +++ b/binutils/readelf.c
> @@ -4079,6 +4079,9 @@ get_machine_flags (Filedata * filedata, unsigned e_flags, unsigned e_machine)
> if (e_flags & EF_RISCV_RVE)
> strcat (buf, ", RVE");
>
> + if (e_flags & EF_RISCV_TSO)
> + strcat (buf, ", TSO");
> +
> switch (e_flags & EF_RISCV_FLOAT_ABI)
> {
> case EF_RISCV_FLOAT_ABI_SOFT:
> diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c
> index 2f5ee18e451..088f75d6a83 100644
> --- a/gas/config/tc-riscv.c
> +++ b/gas/config/tc-riscv.c
> @@ -257,6 +257,14 @@ riscv_set_rvc (bool rvc_value)
> riscv_opts.rvc = rvc_value;
> }
>
> +/* Turn on the tso flag for elf_flags once we have enabled ztso extension. */
> +
> +static void
> +riscv_set_tso ()
> +{
> + elf_flags |= EF_RISCV_TSO;
> +}
> +
> /* This linked list records all enabled extensions, which are parsed from
> the architecture string. The architecture string can be set by the
> -march option, the elf architecture attributes, and the --with-arch
> @@ -307,6 +315,9 @@ riscv_set_arch (const char *s)
> riscv_set_rvc (false);
> if (riscv_subset_supports (&riscv_rps_as, "c"))
> riscv_set_rvc (true);
> +
> + if (riscv_subset_supports (&riscv_rps_as, "ztso"))
> + riscv_set_tso ();
> }
>
> /* Indicate -mabi option is explictly set. */
> diff --git a/gas/testsuite/gas/riscv/ztso.d b/gas/testsuite/gas/riscv/ztso.d
> new file mode 100644
> index 00000000000..cb038db89d3
> --- /dev/null
> +++ b/gas/testsuite/gas/riscv/ztso.d
> @@ -0,0 +1,8 @@
> +#as: -march=rv64i_ztso
> +#readelf: -h
> +#source: empty.s
> +
> +ELF Header:
> +#...
> +[ ]+Flags:[ ]+0x10, TSO.*
> +#...
> \ No newline at end of file
> diff --git a/include/elf/riscv.h b/include/elf/riscv.h
> index 9b3ea376ff3..d7b5c09d5c3 100644
> --- a/include/elf/riscv.h
> +++ b/include/elf/riscv.h
> @@ -121,6 +121,9 @@ END_RELOC_NUMBERS (R_RISCV_max)
> /* RISC-V specific values for st_other. */
> #define STO_RISCV_VARIANT_CC 0x80
>
> +/* File uses the TSO model. */
> +#define EF_RISCV_TSO 0x0010
> +
> /* Additional section types. */
> #define SHT_RISCV_ATTRIBUTES 0x70000003 /* Section holds attributes. */
>
> --
> 2.37.1.windows.1
>
next prev parent reply other threads:[~2022-09-21 3:47 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-20 9:45 shihua
2022-09-21 3:47 ` Nelson Chu [this message]
2022-09-21 6:40 ` [PATCH 0/1] RISC-V: Minor fix to the 'Ztso' extension support Tsukasa OI
2022-09-21 6:40 ` [PATCH 1/1] RISC-V: Set EF_RISCV_TSO also on .option arch Tsukasa OI
2022-09-21 7:24 ` Nelson Chu
2022-09-21 9:53 ` [PATCH 0/1] RISC-V: Minor fix to the 'Ztso' extension support shihua
2022-09-21 10:14 ` Tsukasa OI
2022-09-21 10:21 ` shihua
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