From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-oi1-x235.google.com (mail-oi1-x235.google.com [IPv6:2607:f8b0:4864:20::235]) by sourceware.org (Postfix) with ESMTPS id 60E333858D3C for ; Thu, 30 Mar 2023 00:12:31 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 60E333858D3C Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=rivosinc.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=rivosinc.com Received: by mail-oi1-x235.google.com with SMTP id l18so12969868oic.13 for ; Wed, 29 Mar 2023 17:12:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20210112.gappssmtp.com; s=20210112; t=1680135150; h=content-transfer-encoding:to:subject:message-id:date:from :in-reply-to:references:mime-version:from:to:cc:subject:date :message-id:reply-to; bh=NpfZGStd+bXuwjVYU4w5VBE/sfltGfTpWPtczhdNOxE=; b=NgX0HY1nfbi0c6jysbtAMZpjj8cTktCORSNPgHU/I3bkbdXVm4j1Y0/8EGMVhOO2fh RdV0HuYKbgZT1OOs5VKzfTB86FhdM+Ab4QvttBBOXDiwC1G5QJ2YMazGsyaGfv9a2fiz oq2sJIj9NPIu6PsklRNEHuzAz41JosZhpgE6uP6x/SZVfEYPwuoSbtlOsssRn/lpfbJh leXZbxWjRhsKFj0grlMgJBu5wR3U8PnQqE1X15YmSQWdoZESO0mT6vL91iQ5LOt/8DMS 7wDurqRmEVuChPjN2ChL28ut1dmRQiOxeWTWk0ILbb2DaaW4JLtXZOwukF0ssOdCcw3g XiTQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1680135150; h=content-transfer-encoding:to:subject:message-id:date:from :in-reply-to:references:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=NpfZGStd+bXuwjVYU4w5VBE/sfltGfTpWPtczhdNOxE=; b=JPUfhr/qwIfWxKSocv9Zb8i2GAAV9WVtY2i9ezJHb0UoOMCJ5Uk/eSSU1UHNOiLxmb vcloMF/r1ClpUMIW0+k/3pjTI9uRfkuoyYOF0RDlgSTpS4iAAEKL64A2Q0pkZ14XP0Z/ hTLltaxWEBcQXAJE4iZ/WhS5cq/nWIcfyxhuwIiRsXRJY3P1P7KZBWWQG/I58U6OBI5P yRUxq1xbO37SYWsCQoW80NaOnvCCFxlY0rb+oXhRgu+xUpUerwUqYR5FkFFNnGx6acbw dGxENJByJHLzdVkv80D/2uYwxpO3/dID8zHKZ/cYL2z1bE8YyPrieNXIbANfIebO9HW0 VnkQ== X-Gm-Message-State: AO0yUKUDvjgcfhcv/iRHd9SZZzRt//Zm1meHNALzObAExpyp1YDO8OMq S31UWwH0cDrxVDuZ3Tyct2MqwZKi20xqxxh1sRQpD5urWSkKVe114SZkSw== X-Google-Smtp-Source: AK7set8RtZGIfZfGAYerqvfHd+yFtg//S73b0eoVAwkLOkV45xtQ9CTSJ+t1MOtpKEmQ4fb1J/o5ekDNmM/FG5a0uxY= X-Received: by 2002:aca:a811:0:b0:386:be95:91e9 with SMTP id r17-20020acaa811000000b00386be9591e9mr6835202oie.1.1680135149827; Wed, 29 Mar 2023 17:12:29 -0700 (PDT) MIME-Version: 1.0 References: <20230325004113.22673-1-nelson@rivosinc.com> <20230325004113.22673-2-nelson@rivosinc.com> In-Reply-To: <20230325004113.22673-2-nelson@rivosinc.com> From: Nelson Chu Date: Thu, 30 Mar 2023 08:12:18 +0800 Message-ID: Subject: Re: [PATCH 2/3] RISC-V: Clarify link behaviors of R_RISCV_32/64 relocations with ABS symbol. To: binutils@sourceware.org, jim.wilson.gcc@gmail.com, palmer@dabbelt.com Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-8.9 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,GIT_PATCH_0,KAM_STOCKGEN,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: At least passed the regressions of riscv-gnu-toolchain for this series of patches, so committed them since they should be the correct way to go. The series of patches are listed as follows, * RISC-V: Extract the ld code which are too complicated, and may be reused. * RISC-V: Clarify link behaviors of R_RISCV_32/64 relocations with ABS symb= ol. * RISC-V: PR28789, Reject R_RISCV_PCREL relocations with ABS symbol in PIC/= PIE. Thanks Nelson On Sat, Mar 25, 2023 at 8:41=E2=80=AFAM Nelson Chu wr= ote: > > There are two improvements, which are all referenced to aarch64, > > * R_RISCV_32 with non ABS symbol cannot be used under RV64 when making > shard objects. > > * Don't need dynamic relocation for R_RISCV_32/64 under RV32/RV64 when > making shared objects, if the referenced symbol is local ABS symbol. > > However, considering this link, > https://github.com/riscv-non-isa/riscv-elf-psabi-doc/issues/341 > > Seems like we should makes all R_RISCV_32/64 relocs with ABS symbol > that don't need any dynamic relocations when making the shared objects. > But anyway, I just sync the current behavior as aarch64 ld, in case > there are any unexpected behaviors happen. > > Passed the gcc/binutils regressions in riscv-gnu-toolchain. > > bfd/ > * elfnn-riscv.c (riscv_elf_check_relocs): Only allow R_RISCV_32 with = ABS > symbol under RV64. > (riscv_elf_relocate_section): R_RISCV_32/64 with local ABS symbol und= er > RV32/RV64 doesn't need any dynamic relocation when making shared obje= cts. > I just make the implementations similar to other targets, so that wil= l be > more easy to mainatain. > ld/ > * testsuite/ld-riscv-elf/data-reloc*: New testcases. > * testsuite/ld-riscv-elf/ld-riscv-elf.exp: Added new data-reloc* test= cases, > and need to make ifunc-seperate* testcases work for rv32. > * testsuite/ld-riscv-elf/ifunc-seperate-caller-nonplt.s: Likewise. > * testsuite/ld-riscv-elf/ifunc-seperate-caller-plt.s: Likewise. > --- > bfd/elfnn-riscv.c | 61 ++++++++++++++++--- > .../ld-riscv-elf/data-reloc-rv32-pic.d | 21 +++++++ > .../ld-riscv-elf/data-reloc-rv32-pie.d | 18 ++++++ > .../ld-riscv-elf/data-reloc-rv32-symbolic.d | 21 +++++++ > .../ld-riscv-elf/data-reloc-rv64-abs32-pic.d | 13 ++++ > .../ld-riscv-elf/data-reloc-rv64-addr32-pic.d | 4 ++ > .../ld-riscv-elf/data-reloc-rv64-pic.d | 21 +++++++ > .../ld-riscv-elf/data-reloc-rv64-pie.d | 21 +++++++ > .../ld-riscv-elf/data-reloc-rv64-symbolic.d | 21 +++++++ > .../data-reloc-rv64-undef32-pic.d | 4 ++ > ld/testsuite/ld-riscv-elf/data-reloc.s | 22 +++++++ > .../ifunc-seperate-caller-nonplt.s | 2 +- > .../ld-riscv-elf/ifunc-seperate-caller-plt.s | 2 +- > ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp | 15 +++++ > 14 files changed, 236 insertions(+), 10 deletions(-) > create mode 100644 ld/testsuite/ld-riscv-elf/data-reloc-rv32-pic.d > create mode 100644 ld/testsuite/ld-riscv-elf/data-reloc-rv32-pie.d > create mode 100644 ld/testsuite/ld-riscv-elf/data-reloc-rv32-symbolic.d > create mode 100644 ld/testsuite/ld-riscv-elf/data-reloc-rv64-abs32-pic.d > create mode 100644 ld/testsuite/ld-riscv-elf/data-reloc-rv64-addr32-pic.= d > create mode 100644 ld/testsuite/ld-riscv-elf/data-reloc-rv64-pic.d > create mode 100644 ld/testsuite/ld-riscv-elf/data-reloc-rv64-pie.d > create mode 100644 ld/testsuite/ld-riscv-elf/data-reloc-rv64-symbolic.d > create mode 100644 ld/testsuite/ld-riscv-elf/data-reloc-rv64-undef32-pic= .d > create mode 100644 ld/testsuite/ld-riscv-elf/data-reloc.s > > diff --git a/bfd/elfnn-riscv.c b/bfd/elfnn-riscv.c > index 59e949a2cb5..00f034a6751 100644 > --- a/bfd/elfnn-riscv.c > +++ b/bfd/elfnn-riscv.c > @@ -734,6 +734,7 @@ riscv_elf_check_relocs (bfd *abfd, struct bfd_link_in= fo *info, > unsigned int r_type; > unsigned int r_symndx; > struct elf_link_hash_entry *h; > + bool is_abs_symbol =3D false; > > r_symndx =3D ELFNN_R_SYM (rel->r_info); > r_type =3D ELFNN_R_TYPE (rel->r_info); > @@ -753,6 +754,8 @@ riscv_elf_check_relocs (bfd *abfd, struct bfd_link_in= fo *info, > if (isym =3D=3D NULL) > return false; > > + is_abs_symbol =3D isym->st_shndx =3D=3D SHN_ABS ? true : false; > + > /* Check relocation against local STT_GNU_IFUNC symbol. */ > if (ELF_ST_TYPE (isym->st_info) =3D=3D STT_GNU_IFUNC) > { > @@ -778,6 +781,8 @@ riscv_elf_check_relocs (bfd *abfd, struct bfd_link_in= fo *info, > while (h->root.type =3D=3D bfd_link_hash_indirect > || h->root.type =3D=3D bfd_link_hash_warning) > h =3D (struct elf_link_hash_entry *) h->root.u.i.link; > + > + is_abs_symbol =3D bfd_is_abs_symbol (&h->root) ? true : false; > } > > if (h !=3D NULL) > @@ -879,13 +884,31 @@ riscv_elf_check_relocs (bfd *abfd, struct bfd_link_= info *info, > case R_RISCV_HI20: > if (bfd_link_pic (info)) > return bad_static_reloc (abfd, r_type, h); > - /* Fall through. */ > + goto static_reloc; > + > + case R_RISCV_32: > + if (ARCH_SIZE > 32 > + && bfd_link_pic (info) > + && (sec->flags & SEC_ALLOC) !=3D 0) > + { > + if (is_abs_symbol) > + break; > + > + reloc_howto_type *r_t =3D riscv_elf_rtype_to_howto (abfd, r= _type); > + _bfd_error_handler > + (_("%pB: relocation %s against non-absolute symbol `%s' c= an " > + "not be used in RVNN when making a shared object"), > + abfd, r_t ? r_t->name : _(""), > + h !=3D NULL ? h->root.root.string : "a local symbol"); > + bfd_set_error (bfd_error_bad_value); > + return false; > + } > + goto static_reloc; > > case R_RISCV_COPY: > case R_RISCV_JUMP_SLOT: > case R_RISCV_RELATIVE: > case R_RISCV_64: > - case R_RISCV_32: > /* Fall through. */ > > static_reloc: > @@ -2630,6 +2653,11 @@ riscv_elf_relocate_section (bfd *output_bfd, > break; > > case R_RISCV_32: > + /* Non ABS symbol should be blocked in check_relocs. */ > + if (ARCH_SIZE > 32) > + break; > + /* Fall through. */ > + > case R_RISCV_64: > if ((input_section->flags & SEC_ALLOC) =3D=3D 0) > break; > @@ -2639,7 +2667,6 @@ riscv_elf_relocate_section (bfd *output_bfd, > { > Elf_Internal_Rela outrel; > asection *sreloc; > - bool skip_static_relocation, skip_dynamic_relocation; > > /* When generating a shared object, these relocations > are copied into the output file to be resolved at run > @@ -2648,26 +2675,44 @@ riscv_elf_relocate_section (bfd *output_bfd, > outrel.r_offset =3D > _bfd_elf_section_offset (output_bfd, info, input_section, > rel->r_offset); > - skip_static_relocation =3D outrel.r_offset !=3D (bfd_vma) -= 2; > - skip_dynamic_relocation =3D outrel.r_offset >=3D (bfd_vma) = -2; > + bool skip =3D false; > + bool relocate =3D false; > + if (outrel.r_offset =3D=3D (bfd_vma) -1) > + skip =3D true; > + else if (outrel.r_offset =3D=3D (bfd_vma) -2) > + { > + skip =3D true; > + relocate =3D true; > + } > + else if (h !=3D NULL && bfd_is_abs_symbol (&h->root)) > + { > + /* Don't need dynamic reloc when the ABS symbol is > + non-dynamic or forced to local. Maybe just use > + SYMBOL_REFERENCES_LOCAL to check? */ > + skip =3D (h->forced_local || (h->dynindx =3D=3D -1)); > + relocate =3D skip; > + } > + > outrel.r_offset +=3D sec_addr (input_section); > > - if (skip_dynamic_relocation) > - memset (&outrel, 0, sizeof outrel); > + if (skip) > + memset (&outrel, 0, sizeof outrel); /* R_RISCV_NONE. = */ > else if (RISCV_COPY_INPUT_RELOC (info, h)) > { > + /* Maybe just use !SYMBOL_REFERENCES_LOCAL to check? *= / > outrel.r_info =3D ELFNN_R_INFO (h->dynindx, r_type); > outrel.r_addend =3D rel->r_addend; > } > else > { > + /* This symbol is local, or marked to become local. */ > outrel.r_info =3D ELFNN_R_INFO (0, R_RISCV_RELATIVE); > outrel.r_addend =3D relocation + rel->r_addend; > } > > sreloc =3D elf_section_data (input_section)->sreloc; > riscv_elf_append_rela (output_bfd, sreloc, &outrel); > - if (skip_static_relocation) > + if (!relocate) > continue; > } > break; > diff --git a/ld/testsuite/ld-riscv-elf/data-reloc-rv32-pic.d b/ld/testsui= te/ld-riscv-elf/data-reloc-rv32-pic.d > new file mode 100644 > index 00000000000..13f34e052b7 > --- /dev/null > +++ b/ld/testsuite/ld-riscv-elf/data-reloc-rv32-pic.d > @@ -0,0 +1,21 @@ > +#source: data-reloc.s > +#as: -march=3Drv32i -mabi=3Dilp32 -defsym __abs__=3D1 -defsym __addr__= =3D1 -defsym __undef__=3D1 > +#ld: -m[riscv_choose_ilp32_emul] -Ttext 0x8000 --defsym _start=3D0x0 --d= efsym abs=3D0x100 --defsym abs_local=3D0x200 -shared > +#objdump: -dR > + > +.*:[ ]+file format .* > + > + > +Disassembly of section .text: > + > +0+8000 : > + 8000: 00000000 .word 0x00000000 > + 8000: R_RISCV_32 addr_globl > + > +0+8004 : > + ... > + 8004: R_RISCV_RELATIVE \*ABS\*\+0x8004 > + 8008: R_RISCV_32 abs > + 800c: 00000200 .word 0x00000200 > + 8010: 00000000 .word 0x00000000 > + 8010: R_RISCV_32 undef > diff --git a/ld/testsuite/ld-riscv-elf/data-reloc-rv32-pie.d b/ld/testsui= te/ld-riscv-elf/data-reloc-rv32-pie.d > new file mode 100644 > index 00000000000..1e8f35a9c18 > --- /dev/null > +++ b/ld/testsuite/ld-riscv-elf/data-reloc-rv32-pie.d > @@ -0,0 +1,18 @@ > +#source: data-reloc.s > +#as: -march=3Drv32i -mabi=3Dilp32 -defsym __abs__=3D1 -defsym __addr__= =3D1 > +#ld: -m[riscv_choose_ilp32_emul] -Ttext 0x8000 --defsym _start=3D0x0 --d= efsym abs=3D0x100 --defsym abs_local=3D0x200 -pie > +#objdump: -dR > + > +.*:[ ]+file format .* > + > +Disassembly of section .text: > + > +0+8000 : > + 8000: 00000000 .word 0x00000000 > + 8000: R_RISCV_RELATIVE \*ABS\*\+0x8000 > + > +0+8004 : > + 8004: 00000000 .word 0x00000000 > + 8004: R_RISCV_RELATIVE \*ABS\*\+0x8004 > + 8008: 00000100 .word 0x00000100 > + 800c: 00000200 .word 0x00000200 > diff --git a/ld/testsuite/ld-riscv-elf/data-reloc-rv32-symbolic.d b/ld/te= stsuite/ld-riscv-elf/data-reloc-rv32-symbolic.d > new file mode 100644 > index 00000000000..5c947e2b93b > --- /dev/null > +++ b/ld/testsuite/ld-riscv-elf/data-reloc-rv32-symbolic.d > @@ -0,0 +1,21 @@ > +#source: data-reloc.s > +#as: -march=3Drv32i -mabi=3Dilp32 -defsym __abs__=3D1 -defsym __addr__= =3D1 -defsym __undef__=3D1 > +#ld: -m[riscv_choose_ilp32_emul] -Ttext 0x8000 --defsym _start=3D0x0 --d= efsym abs=3D0x100 --defsym abs_local=3D0x200 -shared -Bsymbolic > +#objdump: -dR > + > +.*:[ ]+file format .* > + > + > +Disassembly of section .text: > + > +0+8000 : > + 8000: 00000000 .word 0x00000000 > + 8000: R_RISCV_RELATIVE \*ABS\*\+0x8000 > + > +0+8004 : > + ... > + 8004: R_RISCV_RELATIVE \*ABS\*\+0x8004 > + 8008: R_RISCV_RELATIVE \*ABS\*\+0x100 > + 800c: 00000200 .word 0x00000200 > + 8010: 00000000 .word 0x00000000 > + 8010: R_RISCV_32 undef > diff --git a/ld/testsuite/ld-riscv-elf/data-reloc-rv64-abs32-pic.d b/ld/t= estsuite/ld-riscv-elf/data-reloc-rv64-abs32-pic.d > new file mode 100644 > index 00000000000..1d3686de353 > --- /dev/null > +++ b/ld/testsuite/ld-riscv-elf/data-reloc-rv64-abs32-pic.d > @@ -0,0 +1,13 @@ > +#source: data-reloc.s > +#as: -march=3Drv64i -mabi=3Dlp64 -defsym __abs__=3D1 > +#ld: -m[riscv_choose_lp64_emul] -Ttext 0x8000 --defsym _start=3D0x0 --de= fsym abs=3D0x100 --defsym abs_local=3D0x200 -shared > +#objdump: -dR > + > +.*:[ ]+file format .* > + > + > +Disassembly of section .text: > + > +0+8000 <.text>: > + 8000: 00000100 .word 0x00000100 > + 8004: 00000200 .word 0x00000200 > diff --git a/ld/testsuite/ld-riscv-elf/data-reloc-rv64-addr32-pic.d b/ld/= testsuite/ld-riscv-elf/data-reloc-rv64-addr32-pic.d > new file mode 100644 > index 00000000000..39b50e33044 > --- /dev/null > +++ b/ld/testsuite/ld-riscv-elf/data-reloc-rv64-addr32-pic.d > @@ -0,0 +1,4 @@ > +#source: data-reloc.s > +#as: -march=3Drv64i -mabi=3Dlp64 -defsym __addr__=3D1 > +#ld: -m[riscv_choose_lp64_emul] -Ttext 0x8000 --defsym _start=3D0x0 -sh= ared > +#error: .*relocation R_RISCV_32 against non-absolute symbol `addr_globl'= can not be used in RV64 when making a shared object.* > diff --git a/ld/testsuite/ld-riscv-elf/data-reloc-rv64-pic.d b/ld/testsui= te/ld-riscv-elf/data-reloc-rv64-pic.d > new file mode 100644 > index 00000000000..dab0ccc9260 > --- /dev/null > +++ b/ld/testsuite/ld-riscv-elf/data-reloc-rv64-pic.d > @@ -0,0 +1,21 @@ > +#source: data-reloc.s > +#as: -march=3Drv64i -mabi=3Dlp64 -defsym __64_bit__=3D1 -defsym __abs__= =3D1 -defsym __addr__=3D1 -defsym __undef__=3D1 > +#ld: -m[riscv_choose_lp64_emul] -Ttext 0x8000 --defsym _start=3D0x0 --de= fsym abs=3D0x100 --defsym abs_local=3D0x200 -shared > +#objdump: -dR > + > +.*:[ ]+file format .* > + > + > +Disassembly of section .text: > + > +0+8000 : > + ... > + 8000: R_RISCV_64 addr_globl > + > +0+8008 : > + ... > + 8008: R_RISCV_RELATIVE \*ABS\*\+0x8008 > + 8010: R_RISCV_64 abs > + 8018: 00000200 .word 0x00000200 > + ... > + 8020: R_RISCV_64 undef > diff --git a/ld/testsuite/ld-riscv-elf/data-reloc-rv64-pie.d b/ld/testsui= te/ld-riscv-elf/data-reloc-rv64-pie.d > new file mode 100644 > index 00000000000..fd6c470f680 > --- /dev/null > +++ b/ld/testsuite/ld-riscv-elf/data-reloc-rv64-pie.d > @@ -0,0 +1,21 @@ > +#source: data-reloc.s > +#as: -march=3Drv64i -mabi=3Dlp64 -defsym __64_bit__=3D1 -defsym __abs__= =3D1 -defsym __addr__=3D1 > +#ld: -m[riscv_choose_lp64_emul] -Ttext 0x8000 --defsym _start=3D0x0 --de= fsym abs=3D0x100 --defsym abs_local=3D0x200 -pie > +#objdump: -dR > + > +.*:[ ]+file format .* > + > + > +Disassembly of section .text: > + > +0+8000 : > + ... > + 8000: R_RISCV_RELATIVE \*ABS\*\+0x8000 > + > +0+8008 : > + ... > + 8008: R_RISCV_RELATIVE \*ABS\*\+0x8008 > + 8010: 00000100 .word 0x00000100 > + 8014: 00000000 .word 0x00000000 > + 8018: 00000200 .word 0x00000200 > + 801c: 00000000 .word 0x00000000 > diff --git a/ld/testsuite/ld-riscv-elf/data-reloc-rv64-symbolic.d b/ld/te= stsuite/ld-riscv-elf/data-reloc-rv64-symbolic.d > new file mode 100644 > index 00000000000..5d41f869b72 > --- /dev/null > +++ b/ld/testsuite/ld-riscv-elf/data-reloc-rv64-symbolic.d > @@ -0,0 +1,21 @@ > +#source: data-reloc.s > +#as: -march=3Drv64i -mabi=3Dlp64 -defsym __64_bit__=3D1 -defsym __abs__= =3D1 -defsym __addr__=3D1 -defsym __undef__=3D1 > +#ld: -m[riscv_choose_lp64_emul] -Ttext 0x8000 --defsym _start=3D0x0 --de= fsym abs=3D0x100 --defsym abs_local=3D0x200 -shared -Bsymbolic > +#objdump: -dR > + > +.*:[ ]+file format .* > + > + > +Disassembly of section .text: > + > +0+8000 : > + ... > + 8000: R_RISCV_RELATIVE \*ABS\*\+0x8000 > + > +0+8008 : > + ... > + 8008: R_RISCV_RELATIVE \*ABS\*\+0x8008 > + 8010: R_RISCV_RELATIVE \*ABS\*\+0x100 > + 8018: 00000200 .word 0x00000200 > + ... > + 8020: R_RISCV_64 undef > diff --git a/ld/testsuite/ld-riscv-elf/data-reloc-rv64-undef32-pic.d b/ld= /testsuite/ld-riscv-elf/data-reloc-rv64-undef32-pic.d > new file mode 100644 > index 00000000000..e5de484142c > --- /dev/null > +++ b/ld/testsuite/ld-riscv-elf/data-reloc-rv64-undef32-pic.d > @@ -0,0 +1,4 @@ > +#source: data-reloc.s > +#as: -march=3Drv64i -mabi=3Dlp64 -defsym __undef__=3D1 > +#ld: -m[riscv_choose_lp64_emul] -Ttext 0x8000 --defsym _start=3D0x0 -sh= ared > +#error: .*relocation R_RISCV_32 against non-absolute symbol `undef' can = not be used in RV64 when making a shared object.* > diff --git a/ld/testsuite/ld-riscv-elf/data-reloc.s b/ld/testsuite/ld-ris= cv-elf/data-reloc.s > new file mode 100644 > index 00000000000..37151500f77 > --- /dev/null > +++ b/ld/testsuite/ld-riscv-elf/data-reloc.s > @@ -0,0 +1,22 @@ > + .macro DATA symbol > +.ifdef __64_bit__ > + .quad \symbol > +.else > + .word \symbol > +.endif > + .endm > +.ifdef __addr__ > + .globl addr_globl > +addr_globl: > + DATA addr_globl > +addr_local: > + DATA addr_local > +.endif > +.ifdef __abs__ > + .hidden abs_local > + DATA abs > + DATA abs_local > +.endif > +.ifdef __undef__ > + DATA undef > +.endif > diff --git a/ld/testsuite/ld-riscv-elf/ifunc-seperate-caller-nonplt.s b/l= d/testsuite/ld-riscv-elf/ifunc-seperate-caller-nonplt.s > index 23c7254ad5b..df0d33b97e2 100644 > --- a/ld/testsuite/ld-riscv-elf/ifunc-seperate-caller-nonplt.s > +++ b/ld/testsuite/ld-riscv-elf/ifunc-seperate-caller-nonplt.s > @@ -20,4 +20,4 @@ main: > > .data > foo_addr: > - .long foo > + .quad foo > diff --git a/ld/testsuite/ld-riscv-elf/ifunc-seperate-caller-plt.s b/ld/t= estsuite/ld-riscv-elf/ifunc-seperate-caller-plt.s > index 8aa64034706..cc1608a9803 100644 > --- a/ld/testsuite/ld-riscv-elf/ifunc-seperate-caller-plt.s > +++ b/ld/testsuite/ld-riscv-elf/ifunc-seperate-caller-plt.s > @@ -23,4 +23,4 @@ main: > > .data > foo_addr: > - .long foo > + .quad foo > diff --git a/ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp b/ld/testsuite/ld= -riscv-elf/ld-riscv-elf.exp > index 5dd6144efd3..1b2a5ce2cb2 100644 > --- a/ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp > +++ b/ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp > @@ -217,6 +217,16 @@ if [istarget "riscv*-*-*"] { > run_dump_test "shared-lib-nopic-03" > run_dump_test "shared-lib-nopic-04" > > + run_dump_test "data-reloc-rv64-pic" > + run_dump_test "data-reloc-rv64-pie" > + run_dump_test "data-reloc-rv64-symbolic" > + run_dump_test "data-reloc-rv32-pic" > + run_dump_test "data-reloc-rv32-pie" > + run_dump_test "data-reloc-rv32-symbolic" > + run_dump_test "data-reloc-rv64-abs32-pic" > + run_dump_test "data-reloc-rv64-addr32-pic" > + run_dump_test "data-reloc-rv64-undef32-pic" > + > # IFUNC testcases. > # Check IFUNC by single type relocs. > run_dump_test_ifunc "ifunc-reloc-call-01" rv32 exe > @@ -270,6 +280,11 @@ if [istarget "riscv*-*-*"] { > run_dump_test_ifunc "ifunc-plt-got-overwrite" rv64 pie > run_dump_test_ifunc "ifunc-plt-got-overwrite" rv64 pic > > + # TODO: Make the following tests work under RV32. > + if [istarget "riscv32-*-*"] { > + return > + } > + > # Setup shared libraries. > run_ld_link_tests { > { "Build shared library for IFUNC non-PLT caller" > -- > 2.37.1 (Apple Git-137.1) >