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In-Reply-To: <cover.1663828180.git.research_trasio@irq.a4lg.com>
From: Nelson Chu <nelson@rivosinc.com>
Date: Thu, 22 Sep 2022 15:04:03 +0800
Message-ID: <CAPpQWtC4z5iBrKLkPi2QaY1TPjhe-cmPCb=hs=EJW7PjCg0zfw@mail.gmail.com>
Subject: Re: [PATCH v2 0/2] RISC-V: Opcode Tidying - Operands (batch 1)
To: Tsukasa OI <research_trasio@irq.a4lg.com>
Cc: Kito Cheng <kito.cheng@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, binutils@sourceware.org
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On Thu, Sep 22, 2022 at 2:30 PM Tsukasa OI <research_trasio@irq.a4lg.com> wrote:
>
> Hello,
>
> This is a small patchset to clean / maintain RISC-V instruction
> operand types.
>
> [Changes: v1 -> v2]
> -   Cleaning? (possibly unchanged? then this is a ping)

In fact you can reply and ping the original patch directly without
sending a new one if nothing changed.  Anyway, these two patch looks
good, please commit.

Thanks
Nelson

>
> [PATCH 1/2]
>
> Since `validate_riscv_insn' function lists three macro-only operand types,
> this patch adds other three operands.  That means, `validate_riscv_insn'
> lists all macro-only operand types with this patch.
>
> Existing:
> -   A
> -   B
> -   I
>
> New in This Patch:
> -   c
> -   VM
> -   VT
>
> Note that `validate_riscv_insn' is called only for non-macros.  In the
> future, we could reject (and make an internal error) when we encountered
> those macro-only operand types on regular (non-macro) instructions.
>
>
> [PATCH 2/2]
>
> The operand type "b" has no good reasons to keep and should be removed.
>
> -   It looks like an alias of the "s" operand type.
> -   It hasn't used since the beginning.
> -   Its role is not clear.
>
> On the other hand, this patch keeps following unused operand types for now:
>
> -   Cx     : future compressed instructions?
> -   Vf, Ve : vector AMO instructions (instructions are not upstreamed
>              but operand types are upstreamed already)
> -   [, ]   : used by some vendors? At least, their role is clear.
>
>
> Thanks,
> Tsukasa
>
>
>
>
> Tsukasa OI (2):
>   RISC-V: Add macro-only operands to validate_riscv_insn
>   RISC-V: Remove "b" operand type from disassembler
>
>  gas/config/tc-riscv.c | 3 +++
>  opcodes/riscv-dis.c   | 1 -
>  2 files changed, 3 insertions(+), 1 deletion(-)
>
>
> base-commit: 90eca7111355e4c6683c1ab10fd07107ea10f6d1
> --
> 2.34.1
>