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References: <cover.1664876744.git.research_trasio@irq.a4lg.com>
 <cover.1664882725.git.research_trasio@irq.a4lg.com> <3b583684-2a24-56f6-f137-ba376d1f1508@suse.com>
In-Reply-To: <3b583684-2a24-56f6-f137-ba376d1f1508@suse.com>
From: Nelson Chu <nelson@rivosinc.com>
Date: Tue, 4 Oct 2022 21:20:06 +0800
Message-ID: <CAPpQWtCV9S3nw-Lv_Fz_EfMnezKVm0nk0F9QZBb4QLxCOo=2PA@mail.gmail.com>
Subject: Re: [PATCH v3 0/2] RISC-V: Fix buffer overflow after 176-bit
 instruction support
To: Jan Beulich <jbeulich@suse.com>
Cc: Tsukasa OI <research_trasio@irq.a4lg.com>, binutils@sourceware.org, 
	gdb-patches@sourceware.org, Kito Cheng <kito.cheng@sifive.com>, 
	Palmer Dabbelt <palmer@dabbelt.com>, Andrew Burgess <aburgess@redhat.com>, 
	Andreas Schwab <schwab@suse.de>
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OK, thanks.  If the problem is resolved and test cases are passed,
please commit.

Thanks
Nelson

On Tue, Oct 4, 2022 at 8:23 PM Jan Beulich <jbeulich@suse.com> wrote:
>
> On 04.10.2022 13:25, Tsukasa OI wrote:
> > This is the PATCH v3 for quick stack buffer overflow fix.
> >
> > [Changes: v2 -> v3]
> > -   PATCH 1/2: Define RISCV_MAX_INSN_LEN in riscv_insn_length function
> >     (idea by Jan Beulich)
> > -   PATCH 2/2: Fix comment and commit message
>
> Lgtm now, fwiw. Like elsewhere I'd prefer the arch maintainers to actually
> approve the change to go in.
>
> Jan