Hi Mary, Thanks for the contribution, the vendor core-v extensions in binutils look good to me :-) Hi Jeff, Kito, Palmer and Andrew, I am not sure if we are likely to accept the vendor core-v extension only in binutils first? Or if we prefer to accept it with the whole toolchain support, including gcc and qemu. Need your help, thanks! If I forgot to cc anyone who may be related, please feel free to add them in the discussion! Nelson On Tue, Sep 5, 2023 at 10:53 PM Mary Bennett wrote: > This patch series presents the comprehensive implementation of the MAC and > ALU > extension for CORE-V. > > Tested with riscv-gnu-toolchain on binutils, ld, gas and gcc testsuites to > ensure its correctness and compatibility with the existing codebase. > However, your input, reviews, and suggestions are invaluable in making this > extension even more robust. > > The CORE-V instructions are described in the specification [1] and work > can be > found in the OpenHW group's Github repository [2]. > > [1] > docs.openhwgroup.org/projects/cv32e40p-user-manual/en/latest/instruction_set_extensions.html > > [2] github.com/openhwgroup/corev-binutils-gdb > > Contributors: > Mary Bennett > Nandni Jamnadas > Pietra Ferreira > Charlie Keaney > Jessica Mills > Craig Blackmore > Simon Cook > Jeremy Bennett > > RISC-V: Add support for XCValu extension in CV32E40P > RISC-V: Add support for XCVmac extension in CV32E40P > > bfd/elfxx-riscv.c | 11 ++ > gas/config/tc-riscv.c | 60 +++++++ > gas/doc/c-riscv.texi | 10 ++ > gas/testsuite/gas/riscv/cv-alu-boundaries.d | 3 + > gas/testsuite/gas/riscv/cv-alu-boundaries.l | 14 ++ > gas/testsuite/gas/riscv/cv-alu-boundaries.s | 27 +++ > gas/testsuite/gas/riscv/cv-alu-fail-march.d | 3 + > gas/testsuite/gas/riscv/cv-alu-fail-march.l | 32 ++++ > gas/testsuite/gas/riscv/cv-alu-fail-march.s | 33 ++++ > .../gas/riscv/cv-alu-fail-operand-01.d | 3 + > .../gas/riscv/cv-alu-fail-operand-01.l | 32 ++++ > .../gas/riscv/cv-alu-fail-operand-01.s | 33 ++++ > .../gas/riscv/cv-alu-fail-operand-02.d | 3 + > .../gas/riscv/cv-alu-fail-operand-02.l | 32 ++++ > .../gas/riscv/cv-alu-fail-operand-02.s | 33 ++++ > .../gas/riscv/cv-alu-fail-operand-03.d | 3 + > .../gas/riscv/cv-alu-fail-operand-03.l | 25 +++ > .../gas/riscv/cv-alu-fail-operand-03.s | 26 +++ > .../gas/riscv/cv-alu-fail-operand-04.d | 3 + > .../gas/riscv/cv-alu-fail-operand-04.l | 3 + > .../gas/riscv/cv-alu-fail-operand-04.s | 4 + > .../gas/riscv/cv-alu-fail-operand-05.d | 3 + > .../gas/riscv/cv-alu-fail-operand-05.l | 9 + > .../gas/riscv/cv-alu-fail-operand-05.s | 10 ++ > .../gas/riscv/cv-alu-fail-operand-06.d | 3 + > .../gas/riscv/cv-alu-fail-operand-06.l | 9 + > .../gas/riscv/cv-alu-fail-operand-06.s | 10 ++ > .../gas/riscv/cv-alu-fail-operand-07.d | 3 + > .../gas/riscv/cv-alu-fail-operand-07.l | 33 ++++ > .../gas/riscv/cv-alu-fail-operand-07.s | 34 ++++ > gas/testsuite/gas/riscv/cv-alu-insns.d | 102 ++++++++++++ > gas/testsuite/gas/riscv/cv-alu-insns.s | 124 ++++++++++++++ > gas/testsuite/gas/riscv/cv-mac-fail-march.d | 3 + > gas/testsuite/gas/riscv/cv-mac-fail-march.l | 23 +++ > gas/testsuite/gas/riscv/cv-mac-fail-march.s | 24 +++ > gas/testsuite/gas/riscv/cv-mac-fail-operand.d | 3 + > gas/testsuite/gas/riscv/cv-mac-fail-operand.l | 147 +++++++++++++++++ > gas/testsuite/gas/riscv/cv-mac-fail-operand.s | 156 ++++++++++++++++++ > gas/testsuite/gas/riscv/cv-mac-insns.d | 87 ++++++++++ > gas/testsuite/gas/riscv/cv-mac-insns.s | 81 +++++++++ > include/opcode/riscv-opc.h | 56 +++++++ > include/opcode/riscv.h | 12 ++ > opcodes/riscv-dis.c | 20 +++ > opcodes/riscv-opc.c | 61 +++++++ > 44 files changed, 1406 insertions(+) > create mode 100644 gas/testsuite/gas/riscv/cv-alu-boundaries.d > create mode 100644 gas/testsuite/gas/riscv/cv-alu-boundaries.l > create mode 100644 gas/testsuite/gas/riscv/cv-alu-boundaries.s > create mode 100644 gas/testsuite/gas/riscv/cv-alu-fail-march.d > create mode 100644 gas/testsuite/gas/riscv/cv-alu-fail-march.l > create mode 100644 gas/testsuite/gas/riscv/cv-alu-fail-march.s > create mode 100644 gas/testsuite/gas/riscv/cv-alu-fail-operand-01.d > create mode 100644 gas/testsuite/gas/riscv/cv-alu-fail-operand-01.l > create mode 100644 gas/testsuite/gas/riscv/cv-alu-fail-operand-01.s > create mode 100644 gas/testsuite/gas/riscv/cv-alu-fail-operand-02.d > create mode 100644 gas/testsuite/gas/riscv/cv-alu-fail-operand-02.l > create mode 100644 gas/testsuite/gas/riscv/cv-alu-fail-operand-02.s > create mode 100644 gas/testsuite/gas/riscv/cv-alu-fail-operand-03.d > create mode 100644 gas/testsuite/gas/riscv/cv-alu-fail-operand-03.l > create mode 100644 gas/testsuite/gas/riscv/cv-alu-fail-operand-03.s > create mode 100644 gas/testsuite/gas/riscv/cv-alu-fail-operand-04.d > create mode 100644 gas/testsuite/gas/riscv/cv-alu-fail-operand-04.l > create mode 100644 gas/testsuite/gas/riscv/cv-alu-fail-operand-04.s > create mode 100644 gas/testsuite/gas/riscv/cv-alu-fail-operand-05.d > create mode 100644 gas/testsuite/gas/riscv/cv-alu-fail-operand-05.l > create mode 100644 gas/testsuite/gas/riscv/cv-alu-fail-operand-05.s > create mode 100644 gas/testsuite/gas/riscv/cv-alu-fail-operand-06.d > create mode 100644 gas/testsuite/gas/riscv/cv-alu-fail-operand-06.l > create mode 100644 gas/testsuite/gas/riscv/cv-alu-fail-operand-06.s > create mode 100644 gas/testsuite/gas/riscv/cv-alu-fail-operand-07.d > create mode 100644 gas/testsuite/gas/riscv/cv-alu-fail-operand-07.l > create mode 100644 gas/testsuite/gas/riscv/cv-alu-fail-operand-07.s > create mode 100644 gas/testsuite/gas/riscv/cv-alu-insns.d > create mode 100644 gas/testsuite/gas/riscv/cv-alu-insns.s > create mode 100644 gas/testsuite/gas/riscv/cv-mac-fail-march.d > create mode 100644 gas/testsuite/gas/riscv/cv-mac-fail-march.l > create mode 100644 gas/testsuite/gas/riscv/cv-mac-fail-march.s > create mode 100644 gas/testsuite/gas/riscv/cv-mac-fail-operand.d > create mode 100644 gas/testsuite/gas/riscv/cv-mac-fail-operand.l > create mode 100644 gas/testsuite/gas/riscv/cv-mac-fail-operand.s > create mode 100644 gas/testsuite/gas/riscv/cv-mac-insns.d > create mode 100644 gas/testsuite/gas/riscv/cv-mac-insns.s > > -- > 2.34.1 > >