From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-oa1-x2c.google.com (mail-oa1-x2c.google.com [IPv6:2001:4860:4864:20::2c]) by sourceware.org (Postfix) with ESMTPS id D70783858D28 for ; Tue, 31 Jan 2023 01:11:52 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org D70783858D28 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=rivosinc.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=rivosinc.com Received: by mail-oa1-x2c.google.com with SMTP id 586e51a60fabf-1631b928691so17499784fac.11 for ; Mon, 30 Jan 2023 17:11:52 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20210112.gappssmtp.com; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=5yO+FqHyGd+EESh3WdZCKYywvXBNuZoNM6mkJfqyTUc=; b=5owST8jQKub3+onv0a4KsaktGRaOERRrgg5Z9uI3KrNG4+y3L6u2nj91+sHuIa5htW ir7Yqx9+Cv7PgcPFhSEHZbHtjkmCSQ+XZ5S5ZMwNH66hJoVlG92pUJ0EPEEcc0An3yLZ JxWPIUj3e3JJCl3vtR/Ojum6wayak2KDhzWVU7ByKuWBnQ4c9NOCCvPk73wWaK8zD3kT ieFiFPb6wpS40rjM19uM38OboIbbRq55ssSmDlshbhnF+bZiu/B18Gu/17QWNxz4kcVl banpcUedeO7/rTLuxn7PrCw6amrhsDksj9IjXKrS1XwST9iGKsZkCKKesIbH250zv0K1 a5pQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=5yO+FqHyGd+EESh3WdZCKYywvXBNuZoNM6mkJfqyTUc=; b=GyleSzxqxbKgOIuqlyxYY+rcRGK88va2EOL2tC2xItyLXAt0p44qYPZrytV53l+Zc7 8ZmGaDpt1GMvWDYZ6UwRgDqwffaUgr+3AP4jpEd7io7ddeZ5k+UFj6hC8TMH2h6ZDXX7 34SjLoh8AG0RFo+3eH6mpSp90/Qr1+kqSzYg/l2XkW8tyY1TtLWwEgpmWjzMm55cArCq qklBe6mcNSE40TgqsZDqOsAopeA5phEE5VO4+NKilbi/6f5d46zYvxhILe+1AuBvnl0H awy+JQTwh/4OWzjcvcMuRCf2wEGuxW+3NTFCAIOS2G36yMxWrdxUFrjDpGqxUKeysAHW qYyA== X-Gm-Message-State: AO0yUKUggLabVW1npiGQOfRGecRjI2oRZ3iElEqX+5r0slufBtk+ndQ/ tufuiH7H0rENe36u9yKl8b4AArizh6T3P2QOEZP21Q== X-Google-Smtp-Source: AK7set88kD/aiebbgPHKe81JfzKU+v+kg1vYntlXpuYhZjJ2BoQCx/3AXnXmaXgqjULWiRoSWcxhZS5opmXuKCbe3xU= X-Received: by 2002:a05:6870:f593:b0:163:aadd:a457 with SMTP id eh19-20020a056870f59300b00163aadda457mr712813oab.201.1675127511381; Mon, 30 Jan 2023 17:11:51 -0800 (PST) MIME-Version: 1.0 References: In-Reply-To: From: Nelson Chu Date: Tue, 31 Jan 2023 09:11:40 +0800 Message-ID: Subject: Re: [PATCH v2] RISC-V: make C-extension JAL available again for (32-bit) assembly To: Jan Beulich Cc: Binutils , Palmer Dabbelt , Andrew Waterman , Jim Wilson Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-3.2 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Thanks for helping to follow these. Looks reasonable, so please commit. Nelson On Mon, Jan 30, 2023 at 10:07 PM Jan Beulich wrote: > > Along with the normal JAL alias, the C-extension one should have been > moved as well by 839189bc932e ("RISC-V: re-arrange opcode table for > consistent alias handling"), for the assembler to actually be able to > use it where/when possible. > > Since neither this nor any other compressed branch insn was being tested > so far, take the opportunity and introduce a new testcase covering those. > --- > Pretty clearly this should also go on the 2.40 branch. > --- > v2: Avoid re-introducing PR/gas 29940. > > --- a/gas/config/tc-riscv.c > +++ b/gas/config/tc-riscv.c > @@ -2764,6 +2764,8 @@ riscv_ip (char *str, struct riscv_cl_ins > case 'p': > goto branch; > case 'a': > + if (oparg == insn->args + 1) > + goto jump_check_gpr; > goto jump; > case 'S': /* Floating-point RS1 x8-x15. */ > if (!reg_lookup (&asarg, RCLASS_FPR, ®no) > @@ -3273,6 +3275,7 @@ riscv_ip (char *str, struct riscv_cl_ins > but the 2nd (with 2 operands) might. */ > if (oparg == insn->args) > { > + jump_check_gpr: > asargStart = asarg; > if (reg_lookup (&asarg, RCLASS_GPR, NULL) > && (*asarg == ',' || (ISSPACE (*asarg) && asarg[1] == ','))) > --- a/opcodes/riscv-opc.c > +++ b/opcodes/riscv-opc.c > @@ -340,9 +340,9 @@ const struct riscv_opcode riscv_opcodes[ > {"jalr", 0, INSN_CLASS_I, "d,s,j", MATCH_JALR, MASK_JALR, match_opcode, INSN_JSR }, > {"j", 0, INSN_CLASS_C, "Ca", MATCH_C_J, MASK_C_J, match_opcode, INSN_ALIAS|INSN_BRANCH }, > {"j", 0, INSN_CLASS_I, "a", MATCH_JAL, MASK_JAL|MASK_RD, match_opcode, INSN_ALIAS|INSN_BRANCH }, > +{"jal", 32, INSN_CLASS_C, "Ca", MATCH_C_JAL, MASK_C_JAL, match_opcode, INSN_ALIAS|INSN_JSR }, > {"jal", 0, INSN_CLASS_I, "a", MATCH_JAL|(X_RA << OP_SH_RD), MASK_JAL|MASK_RD, match_opcode, INSN_ALIAS|INSN_JSR }, > {"jal", 0, INSN_CLASS_I, "d,a", MATCH_JAL, MASK_JAL, match_opcode, INSN_JSR }, > -{"jal", 32, INSN_CLASS_C, "Ca", MATCH_C_JAL, MASK_C_JAL, match_opcode, INSN_ALIAS|INSN_JSR }, > {"call", 0, INSN_CLASS_I, "d,c", (X_T1 << OP_SH_RS1), (int) M_CALL, match_never, INSN_MACRO }, > {"call", 0, INSN_CLASS_I, "c", (X_RA << OP_SH_RS1)|(X_RA << OP_SH_RD), (int) M_CALL, match_never, INSN_MACRO }, > {"tail", 0, INSN_CLASS_I, "c", (X_T1 << OP_SH_RS1), (int) M_CALL, match_never, INSN_MACRO }, > --- /dev/null > +++ b/gas/testsuite/gas/riscv/c-branch-na.d > @@ -0,0 +1,20 @@ > +#as: -march=rv32ic > +#source: c-branch.s > +#objdump: -drw -Mno-aliases > + > +.*:[ ]+file format .* > + > + > +Disassembly of section .text: > + > +0+ : > +[ ]+[0-9a-f]+:[ ]+c001[ ]+c\.beqz[ ]+s0,0 [ ]+0: R_RISCV_RVC_BRANCH .* > +[ ]+[0-9a-f]+:[ ]+dcfd[ ]+c\.beqz[ ]+s1,0 [ ]+2: R_RISCV_RVC_BRANCH .* > +[ ]+[0-9a-f]+:[ ]+fc75[ ]+c\.bnez[ ]+s0,0 [ ]+4: R_RISCV_RVC_BRANCH .* > +[ ]+[0-9a-f]+:[ ]+fced[ ]+c\.bnez[ ]+s1,0 [ ]+6: R_RISCV_RVC_BRANCH .* > +[ ]+[0-9a-f]+:[ ]+bfe5[ ]+c\.j[ ]+0 [ ]+8: R_RISCV_RVC_JUMP .* > +[ ]+[0-9a-f]+:[ ]+3fdd[ ]+c\.jal[ ]+0 [ ]+a: R_RISCV_RVC_JUMP .* > +[ ]+[0-9a-f]+:[ ]+9302[ ]+c\.jalr[ ]+t1 > +[ ]+[0-9a-f]+:[ ]+8382[ ]+c\.jr[ ]+t2 > +[ ]+[0-9a-f]+:[ ]+8082[ ]+c\.jr[ ]+ra > +#... > --- /dev/null > +++ b/gas/testsuite/gas/riscv/c-branch.d > @@ -0,0 +1,19 @@ > +#as: -march=rv64ic > +#objdump: -drw > + > +.*:[ ]+file format .* > + > + > +Disassembly of section .text: > + > +0+ : > +[ ]+[0-9a-f]+:[ ]+c001[ ]+beqz[ ]+s0,0 [ ]+0: R_RISCV_RVC_BRANCH .* > +[ ]+[0-9a-f]+:[ ]+dcfd[ ]+beqz[ ]+s1,0 [ ]+2: R_RISCV_RVC_BRANCH .* > +[ ]+[0-9a-f]+:[ ]+fc75[ ]+bnez[ ]+s0,0 [ ]+4: R_RISCV_RVC_BRANCH .* > +[ ]+[0-9a-f]+:[ ]+fced[ ]+bnez[ ]+s1,0 [ ]+6: R_RISCV_RVC_BRANCH .* > +[ ]+[0-9a-f]+:[ ]+bfe5[ ]+j[ ]+0 [ ]+8: R_RISCV_RVC_JUMP .* > +[ ]+[0-9a-f]+:[ ]+ff7ff0ef[ ]+jal[ ]+0 [ ]+a: R_RISCV_JAL .* > +[ ]+[0-9a-f]+:[ ]+9302[ ]+jalr[ ]+t1 > +[ ]+[0-9a-f]+:[ ]+8382[ ]+jr[ ]+t2 > +[ ]+[0-9a-f]+:[ ]+8082[ ]+ret > +#... > --- /dev/null > +++ b/gas/testsuite/gas/riscv/c-branch.s > @@ -0,0 +1,11 @@ > + .text > +target: > + beq x8, x0, target > + beqz x9, target > + bne x8, x0, target > + bnez x9, target > + j target > + jal target > + jalr x6 > + jr x7 > + ret