From: Faraz Shahbazker <fshahbazker@wavecomp.com>
To: Paul Hua <paul.hua.gm@gmail.com>
Cc: "binutils@sourceware.org" <binutils@sourceware.org>
Subject: Re: [PATCH 2/2] [MIPS] Add i6500 CPU and fix i6400 default ASEs
Date: Thu, 11 Apr 2019 16:52:00 -0000 [thread overview]
Message-ID: <DM5PR22MB068308E43E6D724E8503F783D02F0@DM5PR22MB0683.namprd22.prod.outlook.com> (raw)
In-Reply-To: <CAKjxQHnH-KeY4EOxy+OP2aUWR-AVP15pCyJq=35VppgEmX71Hg@mail.gmail.com>
Hi Paul,
On 4/10/19 7:44 PM, Paul Hua wrote:
> The follow test failure.
> FAIL: ELF p6600 markings
> FAIL: ELF i6400 markings
> FAIL: ELF i6500 markings
Did you perhaps miss [PATCH 1/2] [MIPS] Apply ASE information for the selected processor?
ASE information has been broken for processors which do not also correspond to unique `arch' designations. The testsuite does not include coverage for any such processor, so it was never detected. The first patch fixes this and the second adds new tests which rely upon it.
Regards,
Faraz
next prev parent reply other threads:[~2019-04-11 16:52 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-04-09 20:40 [PATCH 1/2] [MIPS] Apply ASE information for the selected processor Faraz Shahbazker
2019-04-09 20:40 ` [PATCH 2/2] [MIPS] Add i6500 CPU and fix i6400 default ASEs Faraz Shahbazker
2019-04-11 2:44 ` Paul Hua
2019-04-11 16:52 ` Faraz Shahbazker [this message]
2019-04-12 1:14 ` Paul Hua
2019-04-12 2:09 ` Faraz Shahbazker
2019-04-13 2:06 ` Paul Hua
2019-04-13 4:55 ` Faraz Shahbazker
2019-04-13 8:35 ` Paul Hua
2019-04-13 8:32 ` [PATCH 1/2] [MIPS] Apply ASE information for the selected processor Paul Hua
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