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LoongArch: Add support for TLS LD/GD/DESC relaxation To: Lulu Cai Cc: Tatsuyuki Ishi , binutils@sourceware.org, xuchenghua@loongson.cn, chenglulu@loongson.cn, liuzhensong@loongson.cn, mengqinggang@loongson.cn, xry111@xry111.site, i.swmail@xen0n.name, maskray@google.com, luweining@loongson.cn, wanglei@loongson.cn, hejinyang@loongson.cn Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-TMN: [duyMGyIr25F+gsQ0tQUUstU4cSRIQDSw] X-ClientProxiedBy: BL1P221CA0022.NAMP221.PROD.OUTLOOK.COM (2603:10b6:208:2c5::16) To DS7PR12MB5765.namprd12.prod.outlook.com (2603:10b6:8:74::19) X-Microsoft-Original-Message-ID: MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS7PR12MB5765:EE_|PH7PR12MB5903:EE_ X-MS-Office365-Filtering-Correlation-Id: 2eaaac32-f5f9-47bf-bb1c-08dc0fe0e617 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 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X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Jan 2024 00:29:39.0174 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 84df9e7f-e9f6-40af-b435-aaaaaaaaaaaa X-MS-Exchange-CrossTenant-RMS-PersistedConsumerOrg: 00000000-0000-0000-0000-000000000000 X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB5903 X-Spam-Status: No, score=-8.7 required=5.0 tests=BAYES_00,GIT_PATCH_0,KAM_DMARC_STATUS,KAM_INFOUSMEBIZ,SPF_HELO_PASS,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On Sun, Jan 7, 2024 at 3:00=E2=80=AFPM Tatsuyuki Ishi wrote: > > On Dec 29, 2023, at 19:45, Lulu Cai wrote: > > On 2023/12/28 at 10:38 PM, Tatsuyuki Ishi Wrote: > > On Dec 22, 2023, at 20:42, Lulu Cai wrote: > > From: mengqinggang > > The pcalau12i + addi.d of TLS LD/GD/DESC relax to pcaddi. > Relaxation is only performed when the TLS model transition is not possibl= e. > --- > bfd/bfd-in2.h | 3 + > bfd/elfnn-loongarch.c | 174 +++++++- > bfd/elfxx-loongarch.c | 60 +++ > bfd/libbfd.h | 3 + > bfd/reloc.c | 7 + > gas/config/tc-loongarch.c | 8 +- > gas/testsuite/gas/loongarch/macro_op.d | 128 +++--- > gas/testsuite/gas/loongarch/macro_op_32.d | 120 +++--- > .../gas/loongarch/macro_op_large_abs.d | 160 +++---- > .../gas/loongarch/macro_op_large_pc.d | 160 +++---- > include/elf/loongarch.h | 4 + > ld/testsuite/ld-loongarch-elf/macro_op.d | 391 +++++++++--------- > ld/testsuite/ld-loongarch-elf/macro_op_32.d | 120 +++--- > 13 files changed, 795 insertions(+), 543 deletions(-) > > diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h > index 85251aa0edd..782845926ea 100644 > --- a/bfd/bfd-in2.h > +++ b/bfd/bfd-in2.h > @@ -7473,6 +7473,9 @@ enum bfd_reloc_code_real > BFD_RELOC_LARCH_TLS_DESC64_HI12, > BFD_RELOC_LARCH_TLS_DESC_LD, > BFD_RELOC_LARCH_TLS_DESC_CALL, > + BFD_RELOC_LARCH_TLS_LD_PCREL20_S2, > + BFD_RELOC_LARCH_TLS_GD_PCREL20_S2, > + BFD_RELOC_LARCH_TLS_DESC_PCREL20_S2, > BFD_RELOC_UNUSED > }; > typedef enum bfd_reloc_code_real bfd_reloc_code_real_type; > diff --git a/bfd/elfnn-loongarch.c b/bfd/elfnn-loongarch.c > index 1347d13d2e2..bd448cda453 100644 > --- a/bfd/elfnn-loongarch.c > +++ b/bfd/elfnn-loongarch.c > @@ -2285,7 +2285,9 @@ perform_relocation (const Elf_Internal_Rela *rel, a= section *input_section, > case R_LARCH_TLS_DESC_LO12: > case R_LARCH_TLS_DESC64_LO20: > case R_LARCH_TLS_DESC64_HI12: > - > + case R_LARCH_TLS_LD_PCREL20_S2: > + case R_LARCH_TLS_GD_PCREL20_S2: > + case R_LARCH_TLS_DESC_PCREL20_S2: > r =3D loongarch_check_offset (rel, input_section); > if (r !=3D bfd_reloc_ok) > break; > @@ -3674,6 +3676,9 @@ loongarch_elf_relocate_section (bfd *output_bfd, st= ruct bfd_link_info *info, > case R_LARCH_TLS_GD_HI20: > case R_LARCH_TLS_DESC_PC_HI20: > case R_LARCH_TLS_DESC_HI20: > + case R_LARCH_TLS_LD_PCREL20_S2: > + case R_LARCH_TLS_GD_PCREL20_S2: > + case R_LARCH_TLS_DESC_PCREL20_S2: > BFD_ASSERT (rel->r_addend =3D=3D 0); > unresolved_reloc =3D false; > > @@ -3682,7 +3687,8 @@ loongarch_elf_relocate_section (bfd *output_bfd, st= ruct bfd_link_info *info, > is_ie =3D true; > > if (r_type =3D=3D R_LARCH_TLS_DESC_PC_HI20 > - || r_type =3D=3D R_LARCH_TLS_DESC_HI20) > + || r_type =3D=3D R_LARCH_TLS_DESC_HI20 > + || r_type =3D=3D R_LARCH_TLS_DESC_PCREL20_S2) > is_desc =3D true; > > bfd_vma got_off =3D 0; > @@ -3813,7 +3819,11 @@ loongarch_elf_relocate_section (bfd *output_bfd, s= truct bfd_link_info *info, > || r_type =3D=3D R_LARCH_TLS_IE_PC_HI20 > || r_type =3D=3D R_LARCH_TLS_DESC_PC_HI20) > RELOCATE_CALC_PC32_HI20 (relocation, pc); > - > + else if (r_type =3D=3D R_LARCH_TLS_LD_PCREL20_S2 > + || r_type =3D=3D R_LARCH_TLS_GD_PCREL20_S2 > + || r_type =3D=3D R_LARCH_TLS_DESC_PCREL20_S2) > + relocation -=3D pc; > + /* else {} ABS relocations. */ > break; > > case R_LARCH_TLS_DESC_PC_LO12: > @@ -4244,6 +4254,85 @@ loongarch_relax_align (bfd *abfd, asection *sec, > addend - need_nop_bytes, link_info); > } > > +/* Relax pcalau12i + addi.d of TLS LD/GD/DESC to pcaddi. */ > +static bool > +loongarch_relax_tls_ld_gd_desc (bfd *abfd, asection *sec, asection *sym_= sec, > + Elf_Internal_Rela *rel_hi, bfd_vma symval, > + struct bfd_link_info *info, bool *again) > +{ > + bfd_byte *contents =3D elf_section_data (sec)->this_hdr.contents; > + Elf_Internal_Rela *rel_lo =3D rel_hi + 2; > + uint32_t pca =3D bfd_get (32, abfd, contents + rel_hi->r_offset); > + uint32_t add =3D bfd_get (32, abfd, contents + rel_lo->r_offset); > + uint32_t rd =3D pca & 0x1f; > + > + /* This section's output_offset need to subtract the bytes of instruct= ions > + relaxed by the previous sections, so it needs to be updated beforeh= and. > + size_input_section already took care of updating it after relaxatio= n, > + so we additionally update once here. */ > + sec->output_offset =3D sec->output_section->size; > + bfd_vma pc =3D sec_addr (sec) + rel_hi->r_offset; > + > + /* If pc and symbol not in the same segment, add/sub segment alignment= . > + FIXME: if there are multiple readonly segments? */ > + if (!(sym_sec->flags & SEC_READONLY)) > + { > + if (symval > pc) > + pc -=3D info->maxpagesize; > + else if (symval < pc) > + pc +=3D info->maxpagesize; > + } > + > + const uint32_t addi_d =3D 0x02c00000; > + const uint32_t pcaddi =3D 0x18000000; > + > + /* Is pcalau12i + addi.d insns? */ > + if ((ELFNN_R_TYPE (rel_lo->r_info) !=3D R_LARCH_GOT_PC_LO12 > + && ELFNN_R_TYPE (rel_lo->r_info) !=3D R_LARCH_TLS_DESC_PC_LO12) > + || (ELFNN_R_TYPE ((rel_lo + 1)->r_info) !=3D R_LARCH_RELAX) > + || (ELFNN_R_TYPE ((rel_hi + 1)->r_info) !=3D R_LARCH_RELAX) > + || (rel_hi->r_offset + 4 !=3D rel_lo->r_offset) > + || ((add & addi_d) !=3D addi_d) > + /* Is pcalau12i $rd + addi.d $rd,$rd? */ > + || ((add & 0x1f) !=3D rd) > + || (((add >> 5) & 0x1f) !=3D rd) > + /* Can be relaxed to pcaddi? */ > + || (symval & 0x3) /* 4 bytes align. */ > + || ((bfd_signed_vma)(symval - pc) < (bfd_signed_vma)(int32_t)0xffe= 00000) > + || ((bfd_signed_vma)(symval - pc) > (bfd_signed_vma)(int32_t)0x1ff= ffc)) > + return false; > + > + /* Continue next relax trip. */ > + *again =3D true; > + > + pca =3D pcaddi | rd; > + bfd_put (32, abfd, pca, contents + rel_hi->r_offset); > + > + /* Adjust relocations. */ > + switch (ELFNN_R_TYPE (rel_hi->r_info)) > + { > + case R_LARCH_TLS_LD_PC_HI20: > + rel_hi->r_info =3D ELFNN_R_INFO (ELFNN_R_SYM (rel_hi->r_info), > + R_LARCH_TLS_LD_PCREL20_S2); > + break; > + case R_LARCH_TLS_GD_PC_HI20: > + rel_hi->r_info =3D ELFNN_R_INFO (ELFNN_R_SYM (rel_hi->r_info), > + R_LARCH_TLS_GD_PCREL20_S2); > + break; > + case R_LARCH_TLS_DESC_PC_HI20: > + rel_hi->r_info =3D ELFNN_R_INFO (ELFNN_R_SYM (rel_hi->r_info), > + R_LARCH_TLS_DESC_PCREL20_S2); > + break; > + default: > + break; > + } > + rel_lo->r_info =3D ELFNN_R_INFO (0, R_LARCH_NONE); > + > + loongarch_relax_delete_bytes (abfd, sec, rel_lo->r_offset, 4, info); > + > + return true; > +} > + > static bool > loongarch_elf_relax_section (bfd *abfd, asection *sec, > struct bfd_link_info *info, > @@ -4288,15 +4377,23 @@ loongarch_elf_relax_section (bfd *abfd, asection = *sec, > > for (unsigned int i =3D 0; i < sec->reloc_count; i++) > { > - Elf_Internal_Rela *rel =3D relocs + i; > - asection *sym_sec; > + char symtype; > bfd_vma symval; > - unsigned long r_symndx =3D ELFNN_R_SYM (rel->r_info); > - unsigned long r_type =3D ELFNN_R_TYPE (rel->r_info); > + asection *sym_sec; > bool local_got =3D false; > - char symtype; > + Elf_Internal_Rela *rel =3D relocs + i; > struct elf_link_hash_entry *h =3D NULL; > + unsigned long r_type =3D ELFNN_R_TYPE (rel->r_info); > + unsigned long r_symndx =3D ELFNN_R_SYM (rel->r_info); > > + /* Four kind of relocations: > + Normal: symval is the symbol address. > + R_LARCH_ALIGN: symval is the address of the last NOP instruction > + added by this relocation, and then adds 4 more. > + R_LARCH_CALL36: symval is the symbol address for local symbols, > + or the PLT entry address of the symbol. (Todo) > + R_LARCHL_TLS_LD/GD/DESC_PC_HI20: symval is the GOT entry address > + of the symbol. */ > if (r_symndx < symtab_hdr->sh_info) > { > Elf_Internal_Sym *sym =3D (Elf_Internal_Sym *)symtab_hdr->contents > @@ -4304,7 +4401,24 @@ loongarch_elf_relax_section (bfd *abfd, asection *= sec, > if (ELF_ST_TYPE (sym->st_info) =3D=3D STT_GNU_IFUNC) > continue; > > - if (sym->st_shndx =3D=3D SHN_UNDEF || R_LARCH_ALIGN =3D=3D r_type) > + if (R_LARCH_TLS_LD_PC_HI20 =3D=3D r_type > + || R_LARCH_TLS_GD_PC_HI20 =3D=3D r_type > + || R_LARCH_TLS_DESC_PC_HI20 =3D=3D r_type) > + { > + if (loongarch_can_relax_tls (info, r_type, h, abfd, r_symndx)) > + continue; > + else > + { > + sym_sec =3D htab->elf.sgot; > + symval =3D elf_local_got_offsets (abfd)[r_symndx]; > + char tls_type =3D _bfd_loongarch_elf_tls_type (abfd, h, > + r_symndx); > + if (R_LARCH_TLS_DESC_PC_HI20 =3D=3D r_type > + && GOT_TLS_GD_BOTH_P (tls_type)) > + symval +=3D 2 * GOT_ENTRY_SIZE; > + } > + } > + else if (sym->st_shndx =3D=3D SHN_UNDEF || R_LARCH_ALIGN =3D=3D r_type= ) > { > sym_sec =3D sec; > symval =3D rel->r_offset; > @@ -4329,7 +4443,26 @@ loongarch_elf_relax_section (bfd *abfd, asection *= sec, > if (h !=3D NULL && h->type =3D=3D STT_GNU_IFUNC) > continue; > > - if ((h->root.type =3D=3D bfd_link_hash_defined > + /* The GOT entry of tls symbols must in current execute file or > + shared object. */ > + if (R_LARCH_TLS_LD_PC_HI20 =3D=3D r_type > + || R_LARCH_TLS_GD_PC_HI20 =3D=3D r_type > + || R_LARCH_TLS_DESC_PC_HI20 =3D=3D r_type) > + { > + if (loongarch_can_relax_tls (info, r_type, h, abfd, r_symndx)) > + continue; > + else > + { > + sym_sec =3D htab->elf.sgot; > + symval =3D h->got.offset; > + char tls_type =3D _bfd_loongarch_elf_tls_type (abfd, h, > + r_symndx); > + if (R_LARCH_TLS_DESC_PC_HI20 =3D=3D r_type > + && GOT_TLS_GD_BOTH_P (tls_type)) > + symval +=3D 2 * GOT_ENTRY_SIZE; > + } > + } > + else if ((h->root.type =3D=3D bfd_link_hash_defined > || h->root.type =3D=3D bfd_link_hash_defweak) > && h->root.u.def.section !=3D NULL > && h->root.u.def.section->output_section !=3D NULL) > @@ -4358,7 +4491,7 @@ loongarch_elf_relax_section (bfd *abfd, asection *s= ec, > if (symtype !=3D STT_SECTION) > symval +=3D rel->r_addend; > } > - /* For R_LARCH_ALIGN, symval is sec_addr (sym_sec) + rel->r_offset > + /* For R_LARCH_ALIGN, symval is sec_addr (sec) + rel->r_offset > + (alingmeng - 4). > If r_symndx is 0, alignmeng-4 is r_addend. > If r_symndx > 0, alignment-4 is 2^(r_addend & 0xff)-4. */ > @@ -4399,6 +4532,25 @@ loongarch_elf_relax_section (bfd *abfd, asection *= sec, > info, again); > } > break; > + > + case R_LARCH_TLS_LD_PC_HI20: > + if (0 =3D=3D info->relax_pass && (i + 4) <=3D sec->reloc_count) > + loongarch_relax_tls_ld_gd_desc (abfd, sec, sym_sec, rel, symval, > + info, again); > + break; > + > + case R_LARCH_TLS_GD_PC_HI20: > + if (0 =3D=3D info->relax_pass && (i + 4) <=3D sec->reloc_count) > + loongarch_relax_tls_ld_gd_desc (abfd, sec, sym_sec, rel, symval, > + info, again); > + break; > + > + case R_LARCH_TLS_DESC_PC_HI20: > + if (0 =3D=3D info->relax_pass && (i + 4) <=3D sec->reloc_count) > + loongarch_relax_tls_ld_gd_desc (abfd, sec, sym_sec, rel, symval, > + info, again); > + break; > + > default: > break; > } > diff --git a/bfd/elfxx-loongarch.c b/bfd/elfxx-loongarch.c > index 30a941a851f..310e6d62dc0 100644 > --- a/bfd/elfxx-loongarch.c > +++ b/bfd/elfxx-loongarch.c > @@ -1775,6 +1775,60 @@ static loongarch_reloc_howto_type loongarch_howto_= table[] =3D > BFD_RELOC_LARCH_TLS_DESC_CALL, /* bfd_reloc_code_real_type. */ > NULL, /* adjust_reloc_bits. */ > "desc_call"), /* larch_reloc_type_name. */ > > + > + /* For pcaddi, ld_pc_hi20 + ld_pc_lo12 can relax to ld_pcrel20_s2. */ > + LOONGARCH_HOWTO (R_LARCH_TLS_LD_PCREL20_S2, /* type (124). */ > + 2, /* rightshift. */ > + 4, /* size. */ > + 20, /* bitsize. */ > + false, /* pc_relative. */ > + 5, /* bitpos. */ > + complain_overflow_signed, /* complain_on_overflow. */ > + bfd_elf_generic_reloc, /* special_function. */ > + "R_LARCH_TLS_LD_PCREL20_S2", /* name. */ > + false, /* partial_inplace. */ > + 0, /* src_mask. */ > + 0x1ffffe0, /* dst_mask. */ > + true, /* pcrel_offset. */ > + BFD_RELOC_LARCH_TLS_LD_PCREL20_S2, /* bfd_reloc_code_real_type. */ > + reloc_sign_bits, /* adjust_reloc_bits. */ > + "ld_pcrel_20"), /* larch_reloc_type_name. */ > + > + /* For pcaddi, gd_pc_hi20 + gd_pc_lo12 can relax to gd_pcrel20_s2. */ > + LOONGARCH_HOWTO (R_LARCH_TLS_GD_PCREL20_S2, /* type (125). */ > + 2, /* rightshift. */ > + 4, /* size. */ > + 20, /* bitsize. */ > + false, /* pc_relative. */ > + 5, /* bitpos. */ > + complain_overflow_signed, /* complain_on_overflow. */ > + bfd_elf_generic_reloc, /* special_function. */ > + "R_LARCH_TLS_GD_PCREL20_S2", /* name. */ > + false, /* partial_inplace. */ > + 0, /* src_mask. */ > + 0x1ffffe0, /* dst_mask. */ > + true, /* pcrel_offset. */ > + BFD_RELOC_LARCH_TLS_GD_PCREL20_S2, /* bfd_reloc_code_real_type. */ > + reloc_sign_bits, /* adjust_reloc_bits. */ > + "gd_pcrel_20"), /* larch_reloc_type_name. */ > + > + /* For pcaddi, desc_pc_hi20 + desc_pc_lo12 can relax to desc_pcrel20_s= 2. */ > + LOONGARCH_HOWTO (R_LARCH_TLS_DESC_PCREL20_S2, /* type (126). */ > + 2, /* rightshift. */ > + 4, /* size. */ > + 20, /* bitsize. */ > + false, /* pc_relative. */ > + 5, /* bitpos. */ > + complain_overflow_signed, /* complain_on_overflow. */ > + bfd_elf_generic_reloc, /* special_function. */ > + "R_LARCH_TLS_DESC_PCREL20_S2", /* name. */ > + false, /* partial_inplace. */ > + 0, /* src_mask. */ > + 0x1ffffe0, /* dst_mask. */ > + true, /* pcrel_offset. */ > + BFD_RELOC_LARCH_TLS_DESC_PCREL20_S2, /* bfd_reloc_code_real_type. */ > + reloc_sign_bits, /* adjust_reloc_bits. */ > + "desc_pcrel_20"), /* larch_reloc_type_name. */ > }; > > > > I think relaxation relocs is a concept internal to binutils and they shou= ld not be in the same number range as psABI defined relocs. Some linkers (e= .g. mold) doesn=E2=80=99t create new relocs when relaxing and rewrites the = instruction right away, therefore these relocs would have no purpose in the= psABI. > > We recently refactored out all the linker-internal relocs to a different = range [1]; LoongArch might want to follow suit. > > [1]: https://sourceware.org/pipermail/binutils/2023-November/130322.html > > > However, it should be noted that in handwritten assembly, these relocatio= ns can be directly used. > > > Sorry for the delay in reply. I=E2=80=99m not sure if there is any use ca= ses to use relaxation-only relocations in assembly source. It=E2=80=99s one= of the reasons we did away with this in RISC-V [1]. > > [1]: https://github.com/riscv-non-isa/riscv-elf-psabi-doc/issues/398 Agreed. If a relocation type is only used for internal relaxation purposes, it should not be defined in the psABI and there should not be an assembler directive generating it (except .reloc using a hard-coded integer). > > reloc_howto_type * > @@ -1783,7 +1837,9 @@ loongarch_elf_rtype_to_howto (bfd *abfd, unsigned i= nt r_type) > if(r_type < R_LARCH_count) > { > /* For search table fast. */ > > + /* > BFD_ASSERT (ARRAY_SIZE (loongarch_howto_table) =3D=3D R_LARCH_count= ); > + */ > > > > Was this supposed to be commented out and committed as-is? > > > It has been deleted. > > > > if (loongarch_howto_table[r_type].howto.type =3D=3D r_type) > return (reloc_howto_type *)&loongarch_howto_table[r_type]; > @@ -1802,7 +1858,9 @@ loongarch_elf_rtype_to_howto (bfd *abfd, unsigned i= nt r_type) > reloc_howto_type * > loongarch_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED, const char *r_na= me) > { > + /* > BFD_ASSERT (ARRAY_SIZE (loongarch_howto_table) =3D=3D R_LARCH_count); > + */ > > for (size_t i =3D 0; i < ARRAY_SIZE (loongarch_howto_table); i++) > if (loongarch_howto_table[i].howto.name > @@ -1821,7 +1879,9 @@ reloc_howto_type * > loongarch_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED, > bfd_reloc_code_real_type code) > { > + /* > BFD_ASSERT (ARRAY_SIZE (loongarch_howto_table) =3D=3D R_LARCH_count); > + */ > > /* Fast search for new reloc types. */ > if (BFD_RELOC_LARCH_B16 <=3D code && code < BFD_RELOC_LARCH_RELAX) > diff --git a/bfd/libbfd.h b/bfd/libbfd.h > index 71b03da14d9..8dab44110a6 100644 > --- a/bfd/libbfd.h > +++ b/bfd/libbfd.h > @@ -3612,6 +3612,9 @@ static const char *const bfd_reloc_code_real_names[= ] =3D { "@@uninitialized@@", > "BFD_RELOC_LARCH_TLS_DESC64_HI12", > "BFD_RELOC_LARCH_TLS_DESC_LD", > "BFD_RELOC_LARCH_TLS_DESC_CALL", > + "BFD_RELOC_LARCH_TLS_LD_PCREL20_S2", > + "BFD_RELOC_LARCH_TLS_GD_PCREL20_S2", > + "BFD_RELOC_LARCH_TLS_DESC_PCREL20_S2", > "@@overflow: BFD_RELOC_UNUSED@@", > }; > #endif > diff --git a/bfd/reloc.c b/bfd/reloc.c > index f7fe0c7ffe3..6fd0f1fb547 100644 > --- a/bfd/reloc.c > +++ b/bfd/reloc.c > @@ -8324,6 +8324,13 @@ ENUMX > ENUMX > BFD_RELOC_LARCH_TLS_DESC_CALL > > +ENUMX > + BFD_RELOC_LARCH_TLS_LD_PCREL20_S2 > +ENUMX > + BFD_RELOC_LARCH_TLS_GD_PCREL20_S2 > +ENUMX > + BFD_RELOC_LARCH_TLS_DESC_PCREL20_S2 > + > ENUMDOC > LARCH relocations. > > diff --git a/gas/config/tc-loongarch.c b/gas/config/tc-loongarch.c > index 1658025f918..def26daf634 100644 > --- a/gas/config/tc-loongarch.c > +++ b/gas/config/tc-loongarch.c > @@ -682,7 +682,7 @@ loongarch_args_parser_can_match_arg_helper (char esc_= ch1, char esc_ch2, > esc_ch1, esc_ch2, bit_field, arg); > > if (ip->reloc_info[0].type >=3D BFD_RELOC_LARCH_B16 > - && ip->reloc_info[0].type <=3D BFD_RELOC_LARCH_TLS_DESC_CALL) > + && ip->reloc_info[0].type <=3D BFD_RELOC_LARCH_TLS_DESC_PCREL20_S2= ) > { > /* As we compact stack-relocs, it is no need for pop operation. > But break out until here in order to check the imm field. > @@ -694,7 +694,11 @@ loongarch_args_parser_can_match_arg_helper (char esc= _ch1, char esc_ch2, > && (BFD_RELOC_LARCH_PCALA_HI20 =3D=3D reloc_type > || BFD_RELOC_LARCH_PCALA_LO12 =3D=3D reloc_type > || BFD_RELOC_LARCH_GOT_PC_HI20 =3D=3D reloc_type > - || BFD_RELOC_LARCH_GOT_PC_LO12 =3D=3D reloc_type)) > + || BFD_RELOC_LARCH_GOT_PC_LO12 =3D=3D reloc_type > + || BFD_RELOC_LARCH_TLS_LD_PC_HI20 =3D=3D reloc_type > + || BFD_RELOC_LARCH_TLS_GD_PC_HI20 =3D=3D reloc_type > + || BFD_RELOC_LARCH_TLS_DESC_PC_HI20 =3D=3D reloc_type > + || BFD_RELOC_LARCH_TLS_DESC_PC_LO12 =3D=3D reloc_type)) > { > ip->reloc_info[ip->reloc_num].type =3D BFD_RELOC_LARCH_RELAX; > ip->reloc_info[ip->reloc_num].value =3D const_0; > diff --git a/gas/testsuite/gas/loongarch/macro_op.d b/gas/testsuite/gas/l= oongarch/macro_op.d > index 32860864704..47f8f45c663 100644 > --- a/gas/testsuite/gas/loongarch/macro_op.d > +++ b/gas/testsuite/gas/loongarch/macro_op.d > @@ -2,70 +2,72 @@ > #objdump: -dr > #skip: loongarch32-*-* > > > > -- > 2.43.0 > > > > >