[PATCH] fix PLT generation for big endian ARM

[PATCH] fix PLT generation for big endian ARM

[Nicolas Pitre]

This patch allows for both big and little endian ARM modes to generate
correct code.  The current source produces little endian PLT entries even
for big endian targets.


diff -ur ../orig/binutils-2.11.90.0.7/bfd/ChangeLog ./bfd/ChangeLog
--- ../orig/binutils-2.11.90.0.7/bfd/ChangeLog	Fri Apr 27 16:48:40 2001
+++ ./bfd/ChangeLog	Thu May 24 16:25:10 2001
@@ -1,3 +1,7 @@
+2001-05-24  Nicolas Pitre <nico@cam.org>
+
+	* elf32-arm.h: fix PLT generation for big endian ARM
+
 2001-04-27  Sean McNeil <sean@mcneil.com>

 	* config.bfd: Add arm-vxworks target.
diff -ur ../orig/binutils-2.11.90.0.7/bfd/elf32-arm.h ./bfd/elf32-arm.h
--- ../orig/binutils-2.11.90.0.7/bfd/elf32-arm.h	Sat Mar 17 15:59:18 2001
+++ ./bfd/elf32-arm.h	Wed May 23 18:23:03 2001
@@ -78,22 +78,22 @@
    this.  It is set up so that any shared library function that is
    called before the relocation has been set up calls the dynamic
    linker first.  */
-static const bfd_byte elf32_arm_plt0_entry [PLT_ENTRY_SIZE] =
+static const int elf32_arm_plt0_entry [PLT_ENTRY_SIZE/4] =
 {
-  0x04, 0xe0, 0x2d, 0xe5,	/* str   lr, [sp, #-4]!     */
-  0x10, 0xe0, 0x9f, 0xe5,	/* ldr   lr, [pc, #16]      */
-  0x0e, 0xe0, 0x8f, 0xe0,	/* adr   lr, pc, lr         */
-  0x08, 0xf0, 0xbe, 0xe5	/* ldr   pc, [lr, #8]!      */
+	0xe52de004,	/* str   lr, [sp, #-4]!     */
+	0xe59fe010,	/* ldr   lr, [pc, #16]      */
+	0xe08fe00e,	/* add   lr, pc, lr         */
+	0xe5bef008	/* ldr   pc, [lr, #8]!      */
 };

 /* Subsequent entries in a procedure linkage table look like
    this.  */
-static const bfd_byte elf32_arm_plt_entry [PLT_ENTRY_SIZE] =
+static const int elf32_arm_plt_entry [PLT_ENTRY_SIZE/4] =
 {
-  0x04, 0xc0, 0x9f, 0xe5,	/* ldr   ip, [pc, #4]       */
-  0x0c, 0xc0, 0x8f, 0xe0,	/* add   ip, pc, ip         */
-  0x00, 0xf0, 0x9c, 0xe5,	/* ldr   pc, [ip]           */
-  0x00, 0x00, 0x00, 0x00        /* offset to symbol in got  */
+	0xe59fc004,	/* ldr   ip, [pc, #4]       */
+	0xe08fc00c,	/* add   ip, pc, ip         */
+	0xe59cf000,	/* ldr   pc, [ip]           */
+	0x00000000	/* offset to symbol in got  */
 };

 /* The ARM linker needs to keep track of the number of relocs that it
@@ -3165,9 +3165,15 @@
       got_offset = (plt_index + 3) * 4;

       /* Fill in the entry in the procedure linkage table.  */
-      memcpy (splt->contents + h->plt.offset,
-              elf32_arm_plt_entry,
-	      PLT_ENTRY_SIZE);
+      bfd_put_32 (output_bfd,
+		      elf32_arm_plt_entry[0],
+		      splt->contents + h->plt.offset + 0);
+      bfd_put_32 (output_bfd,
+		      elf32_arm_plt_entry[1],
+		      splt->contents + h->plt.offset + 4);
+      bfd_put_32 (output_bfd,
+		      elf32_arm_plt_entry[2],
+		      splt->contents + h->plt.offset + 8);
       bfd_put_32 (output_bfd,
 		      (sgot->output_section->vma
 		       + sgot->output_offset
@@ -3362,8 +3368,12 @@
 	}

       /* Fill in the first entry in the procedure linkage table.  */
-      if (splt->_raw_size > 0)
-	memcpy (splt->contents, elf32_arm_plt0_entry, PLT_ENTRY_SIZE);
+      if (splt->_raw_size > 0) {
+	bfd_put_32 (output_bfd, elf32_arm_plt0_entry[0], splt->contents + 0 );
+	bfd_put_32 (output_bfd, elf32_arm_plt0_entry[1], splt->contents + 4 );
+	bfd_put_32 (output_bfd, elf32_arm_plt0_entry[2], splt->contents + 8 );
+	bfd_put_32 (output_bfd, elf32_arm_plt0_entry[3], splt->contents + 12);
+      }

       /* UnixWare sets the entsize of .plt to 4, although that doesn't
 	 really seem like the right value.  */

Re: [PATCH] fix PLT generation for big endian ARM

[Nick Clifton]

Hi Nicolas,

Thanks very much for submitting this patch.

> +++ ./bfd/ChangeLog	Thu May 24 16:25:10 2001
> @@ -1,3 +1,7 @@
> +2001-05-24  Nicolas Pitre <nico@cam.org>
> +
> +	* elf32-arm.h: fix PLT generation for big endian ARM
> +

Approved and applied.

Note - in the future, please could you submit ChangeLog entries as
plain text, and not context diffs.

Cheers
        Nick

Re: [PATCH] fix PLT generation for big endian ARM

[Philip Blundell]

[-- Attachment #1: Type: text/plain, Size: 258 bytes --]

>> +++ ./bfd/ChangeLog	Thu May 24 16:25:10 2001
>> @@ -1,3 +1,7 @@
>> +2001-05-24  Nicolas Pitre <nico@cam.org>
>> +
>> +	* elf32-arm.h: fix PLT generation for big endian ARM
>> +
>
>Approved and applied.

I've checked this in to the 2.11 branch also.

p.



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>> +++ ./bfd/ChangeLog	Thu May 24 16:25:10 2001
>> @@ -1,3 +1,7 @@
>> +2001-05-24  Nicolas Pitre <nico@cam.org>
>> +
>> +	* elf32-arm.h: fix PLT generation for big endian ARM
>> +
>
>Approved and applied.

I've checked this in to the 2.11 branch also.

p.


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Re: [PATCH] fix PLT generation for big endian ARM

[Philip Blundell]

>> +++ ./bfd/ChangeLog	Thu May 24 16:25:10 2001
>> @@ -1,3 +1,7 @@
>> +2001-05-24  Nicolas Pitre <nico@cam.org>
>> +
>> +	* elf32-arm.h: fix PLT generation for big endian ARM
>> +
>
>Approved and applied.

Did you apply this patch by hand?  Some of the changes seemed to be missing.  
I'll check in a fix.

p.


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