[committed]: Support Co-processor branch relaxation on CRX

[committed]: Support Co-processor branch relaxation on CRX

[Tomer Levi]

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Hi,

The following patch supports relaxation of Co-processor branches on CRX 
cpu.
Committed and checked.

2004-12-23  Tomer Levi  <Tomer.Levi@nsc.com>

        * config/tc-crx.c: Support 'bcop' relaxation (dealt as in 
'cmp&branch' case). 


2004-12-23  Tomer Levi  <Tomer.Levi@nsc.com>

        * crx-opc.c: Mark 'bcop' instruction as RELAXABLE. 


2004-12-23  Tomer Levi  <Tomer.Levi@nsc.com>

        * elf32-crx.c (elf32_crx_relax_section): Support 'bcop' 
relaxation. 



Regards,
      Tomer Levi

Software Engineer                                   phone: 
+49-8141-35-1378
CompactRISC Development Tools  fax:        +49-8141-35-11-1378
National Semiconductor GmbH         mailto:Tomer.Levi@nsc.com
Livry-Gargan Str. 10                                internet: 
http://www.national.com
82256 Fuerstenfeldbruck, Germany

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Index: bfd/elf32-crx.c
===================================================================
RCS file: /cvs/src/src/bfd/elf32-crx.c,v
retrieving revision 1.4
diff -u -p -r1.4 elf32-crx.c
--- bfd/elf32-crx.c	14 Dec 2004 15:36:23 -0000	1.4
+++ bfd/elf32-crx.c	23 Dec 2004 13:43:36 -0000
@@ -1183,7 +1183,9 @@ elf32_crx_relax_section (bfd *abfd, asec
 	      /* Verify it's a 'cmp&branch' opcode.  */
 	      if ((code & 0xfff0) != 0x3180 && (code & 0xfff0) != 0x3190
 	       && (code & 0xfff0) != 0x31a0 && (code & 0xfff0) != 0x31c0
-	       && (code & 0xfff0) != 0x31d0 && (code & 0xfff0) != 0x31e0)
+	       && (code & 0xfff0) != 0x31d0 && (code & 0xfff0) != 0x31e0
+	       /* Or a Co-processor branch ('bcop').  */
+	       && (code & 0xfff0) != 0x3010 && (code & 0xfff0) != 0x3110)
 		continue;
 
 	      /* Note that we've changed the relocs, section contents, etc.  */
Index: gas/config/tc-crx.c
===================================================================
RCS file: /cvs/src/src/gas/config/tc-crx.c,v
retrieving revision 1.12
diff -u -p -r1.12 tc-crx.c
--- gas/config/tc-crx.c	29 Nov 2004 16:23:10 -0000	1.12
+++ gas/config/tc-crx.c	23 Dec 2004 13:43:37 -0000
@@ -134,7 +134,7 @@ const relax_typeS md_relax_table[] =
   {0xfffe, -0x10000, 4, 4},		/* 16 */
   {0xfffffffe, -0xfffffffe, 6, 0},	/* 32 */
 
-  /* cmpbr  */
+  /* cmpbr/bcop  */
   {0xfe, -0x100, 4, 6},			/*  8 */
   {0xfffffe, -0x1000000, 6, 0}		/* 24 */
 };
@@ -707,10 +707,8 @@ process_label_constant (char *str, ins *
 	    crx_ins->rtype = BFD_RELOC_CRX_ABS32;
 	  else if (IS_INSN_TYPE (BRANCH_NEQ_INS))
 	    crx_ins->rtype = BFD_RELOC_CRX_REL4;
-          else if (IS_INSN_TYPE (CMPBR_INS))
+          else if (IS_INSN_TYPE (CMPBR_INS) || IS_INSN_TYPE (COP_BRANCH_INS))
 	    crx_ins->rtype = BFD_RELOC_CRX_REL8_CMP;
-          else if (IS_INSN_TYPE (COP_BRANCH_INS))
-	    crx_ins->rtype = BFD_RELOC_CRX_REL24;
 	  break;
 	
 	case arg_ic:
@@ -1949,8 +1947,8 @@ print_insn (ins *insn)
       /* bal  */
       else if (IS_INSN_TYPE (DCR_BRANCH_INS) || IS_INSN_MNEMONIC ("bal"))
 	relax_subtype = 3;
-      /* cmpbr  */
-      else if (IS_INSN_TYPE (CMPBR_INS))
+      /* cmpbr/bcop  */
+      else if (IS_INSN_TYPE (CMPBR_INS) || IS_INSN_TYPE (COP_BRANCH_INS))
 	relax_subtype = 5;
       else
 	abort ();
Index: opcodes/crx-opc.c
===================================================================
RCS file: /cvs/src/src/opcodes/crx-opc.c,v
retrieving revision 1.9
diff -u -p -r1.9 crx-opc.c
--- opcodes/crx-opc.c	29 Nov 2004 16:34:35 -0000	1.9
+++ opcodes/crx-opc.c	23 Dec 2004 13:43:42 -0000
@@ -542,10 +542,10 @@ const inst crx_instruction[] =
 
   /* CO-processor extensions.  */
   /* opc12 c4 opc4 ui4 disps9 */
-  {"bcop",    2, 0x30107, 12, COP_BRANCH_INS | FMT_4, 
+  {"bcop",    2, 0x30107, 12, COP_BRANCH_INS | FMT_4 | RELAXABLE, 
       {{ui4,8}, {ui4,16}, {disps9,0}}},
   /* opc12 c4 opc4 ui4 disps25 */
-  {"bcop",    3, 0x31107, 12, COP_BRANCH_INS | FMT_4, 
+  {"bcop",    3, 0x31107, 12, COP_BRANCH_INS | FMT_4 | RELAXABLE, 
       {{ui4,8}, {ui4,16}, {disps25,0}}},
   /* opc12 c4 opc4 cpdo r r */
   {"cpdop",   2, 0x3010B, 12, COP_REG_INS | FMT_4,