Re: [Patch] / 0 should send SIGFPE not SIGTRAP...

Re: [Patch] / 0 should send SIGFPE not SIGTRAP...

[David Daney]

I guess I didn't fully read the comment above this section of code.

    /*
     * There is the ancient bug in the MIPS assemblers that the break
     * code starts left to bit 16 instead to bit 6 in the opcode.
     * Gas is bug-compatible ...
     */

I am using gcc-3.3.1/binutils-2.15.  With this toolchain, I get break 
instructions that comply with the MIPS documentation for break instructions:


00000000 <do_div>:
   0:   3c1c0000        lui     gp,0x0
   4:   279c0000        addiu   gp,gp,0
   8:   0399e021        addu    gp,gp,t9
   c:   0085001a        div     zero,a0,a1
  10:   14a00002        bnez    a1,1c <do_div+0x1c>
  14:   00000000        nop
  18:   000001cd        break   0x7
  1c:   00001012        mflo    v0
  20:   03e00008        jr      ra
  24:   00000000        nop
 

What to do?

David Daney

David Daney wrote:

> It might help if I attached the patch.  Here it is...
>
> David Daney wrote:
>
>> I am getting a SIGTRAP whenever an integer divide by 0 happens.  It 
>> should be sending SIGFPE.
>>
>> It looks like kernel/traps.c is a little messed up.
>>
>> The attached patch fixes it for me.
>>
>> The decoding of the break instruction was selecting the wrong bits.  
>> It looks like the trap instruction decoding was messed up also.  The 
>> patch fixes trap also, but I could not figure out how to get gcc to 
>> generate the trap form of division, so that part is untested.
>>
>> David Daney.
>>
>
>------------------------------------------------------------------------
>
>--- ../linux-avtrex/linux/arch/mips/kernel/traps.c	2004-02-26 11:14:09.000000000 -0800
>+++ arch/mips/kernel/traps.c	2004-06-11 10:13:59.000000000 -0700
>@@ -598,7 +598,7 @@
> 	 * code starts left to bit 16 instead to bit 6 in the opcode.
> 	 * Gas is bug-compatible ...
> 	 */
>-	bcode = ((opcode >> 16) & ((1 << 20) - 1));
>+	bcode = ((opcode >> 6) & ((1 << 20) - 1));
> 
> 	/*
> 	 * (A short test says that IRIX 5.3 sends SIGTRAP for all break
>@@ -633,7 +633,7 @@
> 
> 	/* Immediate versions don't provide a code.  */
> 	if (!(opcode & OPCODE))
>-		tcode = ((opcode >> 6) & ((1 << 20) - 1));
>+		tcode = ((opcode >> 6) & ((1 << 10) - 1));
> 
> 	/*
> 	 * (A short test says that IRIX 5.3 sends SIGTRAP for all trap
>  
>

Re: [Patch] / 0 should send SIGFPE not SIGTRAP...

[Maciej W. Rozycki]

On Fri, 11 Jun 2004, David Daney wrote:

> I guess I didn't fully read the comment above this section of code.
> 
>     /*
>      * There is the ancient bug in the MIPS assemblers that the break
>      * code starts left to bit 16 instead to bit 6 in the opcode.
>      * Gas is bug-compatible ...
>      */
> 
> I am using gcc-3.3.1/binutils-2.15.  With this toolchain, I get break 
> instructions that comply with the MIPS documentation for break instructions:

 Well, I did some research and I'm afraid it dates back to a commit from
2000-12-01, when a different interpretation of "break" was introduced for
the MIPS32/64 ISA.  So the interpretation of the "break" instruction
depends on the "-march" setting and moreover, only for instructions
requested explicitly.  For ones emitted implicitly as a result of division
and multiplication macros, the interpretation is always the "traditional"
one (the "c" vs the "B" code).

> 00000000 <do_div>:
>    0:   3c1c0000        lui     gp,0x0
>    4:   279c0000        addiu   gp,gp,0
>    8:   0399e021        addu    gp,gp,t9
>    c:   0085001a        div     zero,a0,a1
>   10:   14a00002        bnez    a1,1c <do_div+0x1c>
>   14:   00000000        nop
>   18:   000001cd        break   0x7
>   1c:   00001012        mflo    v0
>   20:   03e00008        jr      ra
>   24:   00000000        nop
>  
> 
> What to do?

1. I think Linux can intercept both the "traditional" and MIPS32/64 values
-- break codes are not used that extensively this would risk running out
of them.  The set of known ones can be seen in <asm/break.h>.  However,
this won't aid userland trying to interpret code (there may be none such, 
though).

2. Gas should definitely use the codes consistently.  And it's a pity the
ABI got broken -- I think another mnemonic should have been chosen for the
correct implementation of "break", available to any ISA.

3. GCC should probably use traps for anything above MIPS I, anyway.  
Perhaps with an option, like for gas, to select the alternative.

4. Perhaps something else.

  Maciej

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +

Re: [Patch] / 0 should send SIGFPE not SIGTRAP...

[cgd]

At Fri, 11 Jun 2004 19:14:11 +0000 (UTC), "Maciej W. Rozycki" wrote:
> 2. Gas should definitely use the codes consistently.  And it's a pity the
> ABI got broken -- I think another mnemonic should have been chosen for the
> correct implementation of "break", available to any ISA.

in retrospect, the 'B' variation probably wasn't the greatest idea.

If it were removed (leaving 'c' and 'c','q' variations), I don't know
that any real harm would occur.

It may be very confusing to people who expect that the break code will
translate into the instruction in an obvious way, and obviously it
would mess up use of 20-bit codes, but i don't know how prevalent that
is.

Unfortunately, at this point, Linux should probably accept the
divide-by-zero code in both locations.


(Really, from day one, assemblers probably should have accepted a
20-bit code.  I just checked my copy of the Kane r2000/r3000 book, and
it was 20-bit all the way back then.  If i had to guess, i'd guess
that gas was copying a non-gnu assembler's behaviour.  In any case,
water under the bridge.)



cgd

Re: [Patch] / 0 should send SIGFPE not SIGTRAP...

[Maciej W. Rozycki]

On Fri, 11 Jun 2004 cgd@broadcom.com wrote:

> > 2. Gas should definitely use the codes consistently.  And it's a pity the
> > ABI got broken -- I think another mnemonic should have been chosen for the
> > correct implementation of "break", available to any ISA.
> 
> in retrospect, the 'B' variation probably wasn't the greatest idea.

 I guess it may be useful for something to have 20-bit codes available.  
Though except these few special cases, breaks tend to be inserted at the
run time, so it's the interested software that decides how to interpret
them, not gas.

> It may be very confusing to people who expect that the break code will
> translate into the instruction in an obvious way, and obviously it
> would mess up use of 20-bit codes, but i don't know how prevalent that
> is.

 I was surprised at first, too.

> Unfortunately, at this point, Linux should probably accept the
> divide-by-zero code in both locations.

 I think that's not a big trouble for Linux -- the path is rare and not
critical for performance.

> (Really, from day one, assemblers probably should have accepted a
> 20-bit code.  I just checked my copy of the Kane r2000/r3000 book, and
> it was 20-bit all the way back then.  If i had to guess, i'd guess
> that gas was copying a non-gnu assembler's behaviour.  In any case,
> water under the bridge.)

 Definitely they should have.  It's bug-compatibility with the original
MIPS assembler, I'm told.

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +

Re: [Patch] / 0 should send SIGFPE not SIGTRAP...

[David Daney]

[-- Attachment #1: Type: text/plain, Size: 364 bytes --]

Maciej W. Rozycki wrote:

>On Fri, 11 Jun 2004 cgd@broadcom.com wrote:
>  
>
>>Unfortunately, at this point, Linux should probably accept the
>>divide-by-zero code in both locations.
>>    
>>
>
> I think that's not a big trouble for Linux -- the path is rare and not
>critical for performance.
>
>  
>
How about the attached (lightly tested) patch?

David Daney.

[-- Attachment #2: traps.diff --]
[-- Type: text/plain, Size: 2111 bytes --]

*** ../linux-avtrex/linux/arch/mips/kernel/traps.c	2004-02-26 11:14:09.000000000 -0800
--- arch/mips/kernel/traps.c	2004-06-11 13:43:00.000000000 -0700
***************
*** 597,615 ****
  	 * There is the ancient bug in the MIPS assemblers that the break
  	 * code starts left to bit 16 instead to bit 6 in the opcode.
  	 * Gas is bug-compatible ...
! 	 */
! 	bcode = ((opcode >> 16) & ((1 << 20) - 1));
! 
! 	/*
  	 * (A short test says that IRIX 5.3 sends SIGTRAP for all break
  	 * insns, even for break codes that indicate arithmetic failures.
  	 * Weird ...)
  	 * But should we continue the brokenness???  --macro
  	 */
  	switch (bcode) {
! 	case 6:
! 	case 7:
! 		if (bcode == 7)
  			info.si_code = FPE_INTDIV;
  		else
  			info.si_code = FPE_INTOVF;
--- 597,621 ----
  	 * There is the ancient bug in the MIPS assemblers that the break
  	 * code starts left to bit 16 instead to bit 6 in the opcode.
  	 * Gas is bug-compatible ...
! 	 *
  	 * (A short test says that IRIX 5.3 sends SIGTRAP for all break
  	 * insns, even for break codes that indicate arithmetic failures.
  	 * Weird ...)
  	 * But should we continue the brokenness???  --macro
+          *
+          * It seems some assemblers (binutils-2.15 for example) assemble
+          * break correctly.  So we check for the break code in either
+          * position.
+          *
  	 */
+ 
+ 	bcode = ((opcode >> 6) & ((1 << 20) - 1));
  	switch (bcode) {
! 	case 0x0006:
! 	case 0x0007:
!         case 0x1800: /* 6 << 10 */
!         case 0x1c00: /* 7 << 10 */
! 		if (bcode == 0x7 || bcode == 0x1c00)
  			info.si_code = FPE_INTDIV;
  		else
  			info.si_code = FPE_INTOVF;
***************
*** 633,639 ****
  
  	/* Immediate versions don't provide a code.  */
  	if (!(opcode & OPCODE))
! 		tcode = ((opcode >> 6) & ((1 << 20) - 1));
  
  	/*
  	 * (A short test says that IRIX 5.3 sends SIGTRAP for all trap
--- 639,645 ----
  
  	/* Immediate versions don't provide a code.  */
  	if (!(opcode & OPCODE))
! 		tcode = ((opcode >> 6) & ((1 << 10) - 1));
  
  	/*
  	 * (A short test says that IRIX 5.3 sends SIGTRAP for all trap

Re: [Patch] (revised patch) / 0 should send SIGFPE not SIGTRAP

[David Daney]

[-- Attachment #1: Type: text/plain, Size: 260 bytes --]

David Daney wrote:

> How about the attached (lightly tested) patch?
>
I will quit sending patches after this one.  It is equivalent to the 
previous version, except it uses the symbolic names of the break codes 
instead of the numeric values.

David Daney.



[-- Attachment #2: traps.diff --]
[-- Type: text/plain, Size: 2382 bytes --]

*** ../linux-avtrex/linux/arch/mips/kernel/traps.c	2004-02-26 11:14:09.000000000 -0800
--- arch/mips/kernel/traps.c	2004-06-11 14:04:52.000000000 -0700
***************
*** 38,43 ****
--- 38,44 ----
  #include <asm/traps.h>
  #include <asm/uaccess.h>
  #include <asm/mmu_context.h>
+ #include <asm/break.h>
  
  extern asmlinkage void handle_mod(void);
  extern asmlinkage void handle_tlbl(void);
***************
*** 597,615 ****
  	 * There is the ancient bug in the MIPS assemblers that the break
  	 * code starts left to bit 16 instead to bit 6 in the opcode.
  	 * Gas is bug-compatible ...
! 	 */
! 	bcode = ((opcode >> 16) & ((1 << 20) - 1));
! 
! 	/*
  	 * (A short test says that IRIX 5.3 sends SIGTRAP for all break
  	 * insns, even for break codes that indicate arithmetic failures.
  	 * Weird ...)
  	 * But should we continue the brokenness???  --macro
  	 */
  	switch (bcode) {
! 	case 6:
! 	case 7:
! 		if (bcode == 7)
  			info.si_code = FPE_INTDIV;
  		else
  			info.si_code = FPE_INTOVF;
--- 598,622 ----
  	 * There is the ancient bug in the MIPS assemblers that the break
  	 * code starts left to bit 16 instead to bit 6 in the opcode.
  	 * Gas is bug-compatible ...
! 	 *
  	 * (A short test says that IRIX 5.3 sends SIGTRAP for all break
  	 * insns, even for break codes that indicate arithmetic failures.
  	 * Weird ...)
  	 * But should we continue the brokenness???  --macro
+          *
+          * It seems some assemblers (binutils-2.15 for example) assemble
+          * break correctly.  So we check for the break code in either
+          * position.
+          *
  	 */
+ 
+ 	bcode = ((opcode >> 6) & ((1 << 20) - 1));
  	switch (bcode) {
! 	case BRK_OVERFLOW:
! 	case BRK_DIVZERO:
!         case BRK_OVERFLOW << 10:
!         case BRK_DIVZERO << 10:
! 		if (bcode == BRK_DIVZERO || bcode == (BRK_DIVZERO << 10))
  			info.si_code = FPE_INTDIV;
  		else
  			info.si_code = FPE_INTOVF;
***************
*** 633,639 ****
  
  	/* Immediate versions don't provide a code.  */
  	if (!(opcode & OPCODE))
! 		tcode = ((opcode >> 6) & ((1 << 20) - 1));
  
  	/*
  	 * (A short test says that IRIX 5.3 sends SIGTRAP for all trap
--- 640,646 ----
  
  	/* Immediate versions don't provide a code.  */
  	if (!(opcode & OPCODE))
! 		tcode = ((opcode >> 6) & ((1 << 10) - 1));
  
  	/*
  	 * (A short test says that IRIX 5.3 sends SIGTRAP for all trap

Re: [Patch] (revised patch) / 0 should send SIGFPE not SIGTRAP

[Geert Uytterhoeven]

On Fri, 11 Jun 2004, David Daney wrote:
> David Daney wrote:
> > How about the attached (lightly tested) patch?
> >
> I will quit sending patches after this one.  It is equivalent to the
> previous version, except it uses the symbolic names of the break codes
> instead of the numeric values.

Please send one more, where you use `diff -up' :-)

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
							    -- Linus Torvalds

Re: [Patch] (revised patch) / 0 should send SIGFPE not SIGTRAP

[Maciej W. Rozycki]

On Sun, 13 Jun 2004, Geert Uytterhoeven wrote:

> Please send one more, where you use `diff -up' :-)

 No need to -- I've reimplemented it a bit differently meanwhile.  Any 
objections to the following changes?

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +

patch-mips-2.4.26-20040531-mips-bp-tr-0
diff -up --recursive --new-file linux-mips-2.4.26-20040531.macro/arch/mips/kernel/traps.c linux-mips-2.4.26-20040531/arch/mips/kernel/traps.c
--- linux-mips-2.4.26-20040531.macro/arch/mips/kernel/traps.c	2004-03-13 03:56:44.000000000 +0000
+++ linux-mips-2.4.26-20040531/arch/mips/kernel/traps.c	2004-06-13 20:24:32.000000000 +0000
@@ -9,7 +9,7 @@
  * Copyright (C) 1999 Silicon Graphics, Inc.
  * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
  * Copyright (C) 2000, 01 MIPS Technologies, Inc.
- * Copyright (C) 2002, 2003  Maciej W. Rozycki
+ * Copyright (C) 2002, 2003, 2004  Maciej W. Rozycki
  */
 #include <linux/config.h>
 #include <linux/init.h>
@@ -22,6 +22,7 @@
 
 #include <asm/bootinfo.h>
 #include <asm/branch.h>
+#include <asm/break.h>
 #include <asm/cpu.h>
 #include <asm/fpu.h>
 #include <asm/cachectl.h>
@@ -596,9 +597,12 @@ asmlinkage void do_bp(struct pt_regs *re
 	/*
 	 * There is the ancient bug in the MIPS assemblers that the break
 	 * code starts left to bit 16 instead to bit 6 in the opcode.
-	 * Gas is bug-compatible ...
+	 * Gas is bug-compatible, but not always, grrr...
+	 * We handle both cases with a simple heuristics.  --macro
 	 */
-	bcode = ((opcode >> 16) & ((1 << 20) - 1));
+	bcode = ((opcode >> 6) & ((1 << 20) - 1));
+	if (bcode < (1 << 10))
+		bcode <<= 10;
 
 	/*
 	 * (A short test says that IRIX 5.3 sends SIGTRAP for all break
@@ -607,9 +611,9 @@ asmlinkage void do_bp(struct pt_regs *re
 	 * But should we continue the brokenness???  --macro
 	 */
 	switch (bcode) {
-	case 6:
-	case 7:
-		if (bcode == 7)
+	case BRK_OVERFLOW << 10:
+	case BRK_DIVZERO << 10:
+		if (bcode == (BRK_DIVZERO << 10))
 			info.si_code = FPE_INTDIV;
 		else
 			info.si_code = FPE_INTOVF;
@@ -633,7 +637,7 @@ asmlinkage void do_tr(struct pt_regs *re
 
 	/* Immediate versions don't provide a code.  */
 	if (!(opcode & OPCODE))
-		tcode = ((opcode >> 6) & ((1 << 20) - 1));
+		tcode = ((opcode >> 6) & ((1 << 10) - 1));
 
 	/*
 	 * (A short test says that IRIX 5.3 sends SIGTRAP for all trap
@@ -642,9 +646,9 @@ asmlinkage void do_tr(struct pt_regs *re
 	 * But should we continue the brokenness???  --macro
 	 */
 	switch (tcode) {
-	case 6:
-	case 7:
-		if (tcode == 7)
+	case BRK_OVERFLOW:
+	case BRK_DIVZERO:
+		if (tcode == BRK_DIVZERO)
 			info.si_code = FPE_INTDIV;
 		else
 			info.si_code = FPE_INTOVF;
diff -up --recursive --new-file linux-mips-2.4.26-20040531.macro/arch/mips64/kernel/traps.c linux-mips-2.4.26-20040531/arch/mips64/kernel/traps.c
--- linux-mips-2.4.26-20040531.macro/arch/mips64/kernel/traps.c	2004-03-13 03:56:45.000000000 +0000
+++ linux-mips-2.4.26-20040531/arch/mips64/kernel/traps.c	2004-06-13 20:26:01.000000000 +0000
@@ -9,7 +9,7 @@
  * Copyright (C) 1999 Silicon Graphics, Inc.
  * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
  * Copyright (C) 2000, 01 MIPS Technologies, Inc.
- * Copyright (C) 2002, 2003  Maciej W. Rozycki
+ * Copyright (C) 2002, 2003, 2004  Maciej W. Rozycki
  */
 #include <linux/config.h>
 #include <linux/init.h>
@@ -22,6 +22,7 @@
 
 #include <asm/bootinfo.h>
 #include <asm/branch.h>
+#include <asm/break.h>
 #include <asm/cpu.h>
 #include <asm/fpu.h>
 #include <asm/module.h>
@@ -606,9 +607,12 @@ asmlinkage void do_bp(struct pt_regs *re
 	/*
 	 * There is the ancient bug in the MIPS assemblers that the break
 	 * code starts left to bit 16 instead to bit 6 in the opcode.
-	 * Gas is bug-compatible ...
+	 * Gas is bug-compatible, but not always, grrr...
+	 * We handle both cases with a simple heuristics.  --macro
 	 */
-	bcode = ((opcode >> 16) & ((1 << 20) - 1));
+	bcode = ((opcode >> 6) & ((1 << 20) - 1));
+	if (bcode < (1 << 10))
+		bcode <<= 10;
 
 	/*
 	 * (A short test says that IRIX 5.3 sends SIGTRAP for all break
@@ -617,9 +621,9 @@ asmlinkage void do_bp(struct pt_regs *re
 	 * But should we continue the brokenness???  --macro
 	 */
 	switch (bcode) {
-	case 6:
-	case 7:
-		if (bcode == 7)
+	case BRK_OVERFLOW << 10:
+	case BRK_DIVZERO << 10:
+		if (bcode == (BRK_DIVZERO << 10))
 			info.si_code = FPE_INTDIV;
 		else
 			info.si_code = FPE_INTOVF;
@@ -643,7 +647,7 @@ asmlinkage void do_tr(struct pt_regs *re
 
 	/* Immediate versions don't provide a code.  */
 	if (!(opcode & OPCODE))
-		tcode = ((opcode >> 6) & ((1 << 20) - 1));
+		tcode = ((opcode >> 6) & ((1 << 10) - 1));
 
 	/*
 	 * (A short test says that IRIX 5.3 sends SIGTRAP for all trap
@@ -652,9 +656,9 @@ asmlinkage void do_tr(struct pt_regs *re
 	 * But should we continue the brokenness???  --macro
 	 */
 	switch (tcode) {
-	case 6:
-	case 7:
-		if (tcode == 7)
+	case BRK_OVERFLOW:
+	case BRK_DIVZERO:
+		if (tcode == BRK_DIVZERO)
 			info.si_code = FPE_INTDIV;
 		else
 			info.si_code = FPE_INTOVF;

Re: [Patch] / 0 should send SIGFPE not SIGTRAP...

[Maciej W. Rozycki]

On Fri, 11 Jun 2004 cgd@broadcom.com wrote:

> in retrospect, the 'B' variation probably wasn't the greatest idea.
> 
> If it were removed (leaving 'c' and 'c','q' variations), I don't know
> that any real harm would occur.
> 
> It may be very confusing to people who expect that the break code will
> translate into the instruction in an obvious way, and obviously it
> would mess up use of 20-bit codes, but i don't know how prevalent that
> is.
> 
> Unfortunately, at this point, Linux should probably accept the
> divide-by-zero code in both locations.
> 
> 
> (Really, from day one, assemblers probably should have accepted a
> 20-bit code.  I just checked my copy of the Kane r2000/r3000 book, and
> it was 20-bit all the way back then.  If i had to guess, i'd guess
> that gas was copying a non-gnu assembler's behaviour.  In any case,
> water under the bridge.)

 As it's at least annoying to have different break codes for divisions 
expanded by gcc explicitly and ones created implicitly by gas, here's the 
most reasonable (IMO) approach to fix that.  I think it should have been 
implemented this way originally (if at all).

gas/testsuite/:
2004-06-22  Maciej W. Rozycki  <macro@ds2.pg.gda.pl>

	* gas/mips/break20.s: Test the "break20" alias.
	* gas/mips/break20.d: Results for the test.
	* gas/mips/mips32.s: Replace "break" with "break20".
	* gas/mips/set-arch.s: Likewise.
	* gas/mips/mips32.d: Adjust for the new output.
	* gas/mips/set-arch.d: Likewise.

opcodes/:
2004-06-22  Maciej W. Rozycki  <macro@ds2.pg.gda.pl>

	* mips-opc.c (mips_builtin_opcodes): Replace the MIPS32 ISA 
	specific "break" encoding with a "break20" alias accepted for any 
	ISA.

 I decided to give a precedence to "break x,y" over "break20 z" to avoid 
perhaps a bit surprising output in `objdump'.

 The question is: does anyone know of possible troubles with this change?  
Chances are someone depends on the current semantics for
-march=mips32/mips64, but that's fragile anyway as building with a
different setting results in different code.

 Or should we get rid of the 20-bit "break" completely?  The two-argument
version provides the same functionality, although the 10-bit codes to be
used do not map to the 20-bit equivalent "optically" very well.  
Especially if decimal notation is used.

 Note the same problem appears to be the case with "sdbbp".  It could be
handled similarly, but given the limited use of "sdbbp" for
non-MIPS32/MIPS64 ISAs it may not be worth the hassle.  I see no problem
writing a similar fix if desired, though.

  Maciej

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +

binutils-2.15.91-20040615-mips-break20.patch
diff -up --recursive --new-file binutils-2.15.91-20040615.macro/gas/testsuite/gas/mips/break20.d binutils-2.15.91-20040615/gas/testsuite/gas/mips/break20.d
--- binutils-2.15.91-20040615.macro/gas/testsuite/gas/mips/break20.d	2003-05-08 03:25:31.000000000 +0000
+++ binutils-2.15.91-20040615/gas/testsuite/gas/mips/break20.d	2004-06-17 21:03:30.000000000 +0000
@@ -10,9 +10,13 @@ Disassembly of section .text:
 0+0008 <[^>]*> break	0x14
 0+000c <[^>]*> break	0x14,0x28
 0+0010 <[^>]*> break	0x3ff,0x3ff
-0+0014 <[^>]*> sdbbp
-0+0018 <[^>]*> sdbbp
-0+001c <[^>]*> sdbbp	0x14
-0+0020 <[^>]*> sdbbp	0x14,0x28
-0+0024 <[^>]*> sdbbp	0x3ff,0x3ff
+0+0014 <[^>]*> break
+0+0018 <[^>]*> break	0x0,0x14
+0+001c <[^>]*> break	0x14,0x28
+0+0020 <[^>]*> break	0x3ff,0x3ff
+0+0024 <[^>]*> sdbbp
+0+0028 <[^>]*> sdbbp
+0+002c <[^>]*> sdbbp	0x14
+0+0030 <[^>]*> sdbbp	0x14,0x28
+0+0034 <[^>]*> sdbbp	0x3ff,0x3ff
 	...
diff -up --recursive --new-file binutils-2.15.91-20040615.macro/gas/testsuite/gas/mips/break20.s binutils-2.15.91-20040615/gas/testsuite/gas/mips/break20.s
--- binutils-2.15.91-20040615.macro/gas/testsuite/gas/mips/break20.s	1999-08-10 14:24:45.000000000 +0000
+++ binutils-2.15.91-20040615/gas/testsuite/gas/mips/break20.s	2004-06-17 19:57:51.000000000 +0000
@@ -6,6 +6,11 @@ foo:	
 	break	20,40
 	break	1023,1023
 	
+	break20	0
+	break20	20
+	break20	20520
+	break20	1048575
+
 	sdbbp
 	sdbbp	0
 	sdbbp	20
diff -up --recursive --new-file binutils-2.15.91-20040615.macro/gas/testsuite/gas/mips/mips32.d binutils-2.15.91-20040615/gas/testsuite/gas/mips/mips32.d
--- binutils-2.15.91-20040615.macro/gas/testsuite/gas/mips/mips32.d	2003-05-08 03:25:35.000000000 +0000
+++ binutils-2.15.91-20040615/gas/testsuite/gas/mips/mips32.d	2004-06-17 21:15:04.000000000 +0000
@@ -48,7 +48,7 @@ Disassembly of section .text:
 0+0098 <[^>]*> 4359e260 	wait	0x56789
 0+009c <[^>]*> 0000000d 	break
 0+00a0 <[^>]*> 0000000d 	break
-0+00a4 <[^>]*> 0048d14d 	break	0x12345
+0+00a4 <[^>]*> 0048d14d 	break	0x48,0x345
 0+00a8 <[^>]*> 7000003f 	sdbbp
 0+00ac <[^>]*> 7000003f 	sdbbp
 0+00b0 <[^>]*> 7159e27f 	sdbbp	0x56789
diff -up --recursive --new-file binutils-2.15.91-20040615.macro/gas/testsuite/gas/mips/mips32.s binutils-2.15.91-20040615/gas/testsuite/gas/mips/mips32.s
--- binutils-2.15.91-20040615.macro/gas/testsuite/gas/mips/mips32.s	2002-09-05 03:25:40.000000000 +0000
+++ binutils-2.15.91-20040615/gas/testsuite/gas/mips/mips32.s	2004-06-17 21:13:22.000000000 +0000
@@ -62,7 +62,7 @@ text_label:
       # different.
       break
       break   0                       # disassembles without code
-      break   0x12345
+      break20 0x12345
       sdbbp
       sdbbp   0                       # disassembles without code
       sdbbp   0x56789
diff -up --recursive --new-file binutils-2.15.91-20040615.macro/gas/testsuite/gas/mips/set-arch.d binutils-2.15.91-20040615/gas/testsuite/gas/mips/set-arch.d
--- binutils-2.15.91-20040615.macro/gas/testsuite/gas/mips/set-arch.d	2003-10-01 03:25:36.000000000 +0000
+++ binutils-2.15.91-20040615/gas/testsuite/gas/mips/set-arch.d	2004-06-17 21:17:46.000000000 +0000
@@ -160,7 +160,7 @@ Disassembly of section \.text:
 00000260 <[^>]*> 4359e260 	wait	0x56789
 00000264 <[^>]*> 0000000d 	break
 00000268 <[^>]*> 0000000d 	break
-0000026c <[^>]*> 0048d14d 	break	0x12345
+0000026c <[^>]*> 0048d14d 	break	0x48,0x345
 00000270 <[^>]*> 7000003f 	sdbbp
 00000274 <[^>]*> 7000003f 	sdbbp
 00000278 <[^>]*> 7159e27f 	sdbbp	0x56789
diff -up --recursive --new-file binutils-2.15.91-20040615.macro/gas/testsuite/gas/mips/set-arch.s binutils-2.15.91-20040615/gas/testsuite/gas/mips/set-arch.s
--- binutils-2.15.91-20040615.macro/gas/testsuite/gas/mips/set-arch.s	2003-06-29 19:41:33.000000000 +0000
+++ binutils-2.15.91-20040615/gas/testsuite/gas/mips/set-arch.s	2004-06-17 21:18:01.000000000 +0000
@@ -204,7 +204,7 @@ text_label:	
 	# different.
 	break
 	break   0                       # disassembles without code
-	break   0x12345
+	break20 0x12345
 	sdbbp
 	sdbbp   0                       # disassembles without code
 	sdbbp   0x56789
diff -up --recursive --new-file binutils-2.15.91-20040615.macro/opcodes/mips-opc.c binutils-2.15.91-20040615/opcodes/mips-opc.c
--- binutils-2.15.91-20040615.macro/opcodes/mips-opc.c	2003-11-19 04:25:23.000000000 +0000
+++ binutils-2.15.91-20040615/opcodes/mips-opc.c	2004-06-17 19:46:23.000000000 +0000
@@ -274,9 +274,9 @@ const struct mips_opcode mips_builtin_op
 {"bnel",    "s,t,p",	0x54000000, 0xfc000000,	CBL|RD_s|RD_t, 		I2|T3	},
 {"bnel",    "s,I,p",	0,    (int) M_BNEL_I,	INSN_MACRO,		I2|T3	},
 {"break",   "",		0x0000000d, 0xffffffff,	TRAP,			I1	},
-{"break",   "B",        0x0000000d, 0xfc00003f, TRAP,           	I32     },
 {"break",   "c",	0x0000000d, 0xfc00ffff,	TRAP,			I1	},
 {"break",   "c,q",	0x0000000d, 0xfc00003f,	TRAP,			I1	},
+{"break20", "B",        0x0000000d, 0xfc00003f, TRAP,           	I1      },
 {"c.f.d",   "S,T",	0x46200030, 0xffe007ff,	RD_S|RD_T|WR_CC|FP_D,	I1	},
 {"c.f.d",   "M,S,T",    0x46200030, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   I4|I32	},
 {"c.f.s",   "S,T",      0x46000030, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S,   I1      },

Re: [Patch] / 0 should send SIGFPE not SIGTRAP...

[David Daney]

Maciej W. Rozycki wrote:

>On Fri, 11 Jun 2004 cgd@broadcom.com wrote:
>
>  
>
>>in retrospect, the 'B' variation probably wasn't the greatest idea.
>>
>>If it were removed (leaving 'c' and 'c','q' variations), I don't know
>>that any real harm would occur.
>>
>>It may be very confusing to people who expect that the break code will
>>translate into the instruction in an obvious way, and obviously it
>>would mess up use of 20-bit codes, but i don't know how prevalent that
>>is.
>>
>>Unfortunately, at this point, Linux should probably accept the
>>divide-by-zero code in both locations.
>>
>>
>>(Really, from day one, assemblers probably should have accepted a
>>20-bit code.  I just checked my copy of the Kane r2000/r3000 book, and
>>it was 20-bit all the way back then.  If i had to guess, i'd guess
>>that gas was copying a non-gnu assembler's behaviour.  In any case,
>>water under the bridge.)
>>    
>>
>
> As it's at least annoying to have different break codes for divisions 
>expanded by gcc explicitly and ones created implicitly by gas, here's the 
>most reasonable (IMO) approach to fix that.  I think it should have been 
>implemented this way originally (if at all).
>
>gas/testsuite/:
>2004-06-22  Maciej W. Rozycki  <macro@ds2.pg.gda.pl>
>
>	* gas/mips/break20.s: Test the "break20" alias.
>	* gas/mips/break20.d: Results for the test.
>	* gas/mips/mips32.s: Replace "break" with "break20".
>	* gas/mips/set-arch.s: Likewise.
>	* gas/mips/mips32.d: Adjust for the new output.
>	* gas/mips/set-arch.d: Likewise.
>
>opcodes/:
>2004-06-22  Maciej W. Rozycki  <macro@ds2.pg.gda.pl>
>
>	* mips-opc.c (mips_builtin_opcodes): Replace the MIPS32 ISA 
>	specific "break" encoding with a "break20" alias accepted for any 
>	ISA.
>
>  
>
.
.
.
Just out of curiosity, do you propose this patch in lieu of the patch to 
Linux's traps.c?

Or would you do both?

It seems like both would be best, as there are already "broken" binutils 
floating around out there.

Also nobody has objected to the kernel patch...

David Daney.

Re: [Patch] / 0 should send SIGFPE not SIGTRAP...

[Maciej W. Rozycki]

On Wed, 23 Jun 2004, David Daney wrote:

> Just out of curiosity, do you propose this patch in lieu of the patch to 
> Linux's traps.c?
> 
> Or would you do both?

 Both.

> It seems like both would be best, as there are already "broken" binutils 
> floating around out there.

 And broken binaries.

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +

Re: [Patch] / 0 should send SIGFPE not SIGTRAP...

[Richard Sandiford]

"Maciej W. Rozycki" <macro@ds2.pg.gda.pl> writes:
>  Or should we get rid of the 20-bit "break" completely?  The two-argument
> version provides the same functionality, although the 10-bit codes to be
> used do not map to the 20-bit equivalent "optically" very well.  
> Especially if decimal notation is used.

I notice no-one's really responded to this question yet.  FWIW, on gut
instinct, I'd personally prefer to drop the 20-bit break than introduce
a new, non-standard name for it.

Just an opinion though.  I won't argue against anyone saying different. ;)

Richard

Re: [Patch] / 0 should send SIGFPE not SIGTRAP...

[Maciej W. Rozycki]

On Thu, 24 Jun 2004, Richard Sandiford wrote:

> >  Or should we get rid of the 20-bit "break" completely?  The two-argument
> > version provides the same functionality, although the 10-bit codes to be
> > used do not map to the 20-bit equivalent "optically" very well.  
> > Especially if decimal notation is used.
> 
> I notice no-one's really responded to this question yet.  FWIW, on gut
> instinct, I'd personally prefer to drop the 20-bit break than introduce
> a new, non-standard name for it.

 Well, this is essentially what the patch does.  Or do you mean: "drop it
and if anyone screams, consider an alternative?"  I'd find it acceptable,
actually, but it's not my opinion that really matters here.

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +

Re: [Patch] / 0 should send SIGFPE not SIGTRAP...

[cgd]

At Thu, 24 Jun 2004 18:35:21 +0000 (UTC), "Maciej W. Rozycki" wrote:
>  Well, this is essentially what the patch does.  Or do you mean: "drop it
> and if anyone screams, consider an alternative?"  I'd find it acceptable,
> actually, but it's not my opinion that really matters here.

(it's fine w/ me.)

Re: [Patch] / 0 should send SIGFPE not SIGTRAP...

[Maciej W. Rozycki]

On Thu, 24 Jun 2004 cgd@broadcom.com wrote:

> >  Well, this is essentially what the patch does.  Or do you mean: "drop it
> > and if anyone screams, consider an alternative?"  I'd find it acceptable,
> > actually, but it's not my opinion that really matters here.
> 
> (it's fine w/ me.)

 Here's an updated patch I use currently in case this is the solution to
be agreed upon.

opcodes/:
2004-06-28  Maciej W. Rozycki  <macro@linux-mips.org>

	* mips-opc.c (mips_builtin_opcodes): Remove the MIPS32 
	ISA-specific "break" encoding.

gas/testsuite/:
2004-06-28  Maciej W. Rozycki  <macro@linux-mips.org>

	* gas/mips/mips32.s: Adjust for the unified "break" syntax.
	* gas/mips/set-arch.s: Likewise.
	* gas/mips/mips32.d: Adjust for the new output.
	* gas/mips/set-arch.d: Likewise.

  Maciej

binutils-2.15.91-20040625-mips-break20.patch
diff -up --recursive --new-file binutils-2.15.91-20040625.macro/gas/testsuite/gas/mips/mips32.d binutils-2.15.91-20040625/gas/testsuite/gas/mips/mips32.d
--- binutils-2.15.91-20040625.macro/gas/testsuite/gas/mips/mips32.d	2003-05-08 03:25:35.000000000 +0000
+++ binutils-2.15.91-20040625/gas/testsuite/gas/mips/mips32.d	2004-06-17 21:15:04.000000000 +0000
@@ -48,7 +48,7 @@ Disassembly of section .text:
 0+0098 <[^>]*> 4359e260 	wait	0x56789
 0+009c <[^>]*> 0000000d 	break
 0+00a0 <[^>]*> 0000000d 	break
-0+00a4 <[^>]*> 0048d14d 	break	0x12345
+0+00a4 <[^>]*> 0048d14d 	break	0x48,0x345
 0+00a8 <[^>]*> 7000003f 	sdbbp
 0+00ac <[^>]*> 7000003f 	sdbbp
 0+00b0 <[^>]*> 7159e27f 	sdbbp	0x56789
diff -up --recursive --new-file binutils-2.15.91-20040625.macro/gas/testsuite/gas/mips/mips32.s binutils-2.15.91-20040625/gas/testsuite/gas/mips/mips32.s
--- binutils-2.15.91-20040625.macro/gas/testsuite/gas/mips/mips32.s	2002-09-05 03:25:40.000000000 +0000
+++ binutils-2.15.91-20040625/gas/testsuite/gas/mips/mips32.s	2004-06-26 12:41:17.000000000 +0000
@@ -58,11 +58,13 @@ text_label:
       wait    0                       # disassembles without code
       wait    0x56789
 
-      # Instructions in previous ISAs or CPUs which are now slightly
-      # different.
+      # Instructions that used to have compatibility problems.
       break
       break   0                       # disassembles without code
-      break   0x12345
+      break   0x48,0x345
+
+      # Instructions in previous ISAs or CPUs which are now slightly
+      # different.
       sdbbp
       sdbbp   0                       # disassembles without code
       sdbbp   0x56789
diff -up --recursive --new-file binutils-2.15.91-20040625.macro/gas/testsuite/gas/mips/set-arch.d binutils-2.15.91-20040625/gas/testsuite/gas/mips/set-arch.d
--- binutils-2.15.91-20040625.macro/gas/testsuite/gas/mips/set-arch.d	2003-10-01 03:25:36.000000000 +0000
+++ binutils-2.15.91-20040625/gas/testsuite/gas/mips/set-arch.d	2004-06-17 21:17:46.000000000 +0000
@@ -160,7 +160,7 @@ Disassembly of section \.text:
 00000260 <[^>]*> 4359e260 	wait	0x56789
 00000264 <[^>]*> 0000000d 	break
 00000268 <[^>]*> 0000000d 	break
-0000026c <[^>]*> 0048d14d 	break	0x12345
+0000026c <[^>]*> 0048d14d 	break	0x48,0x345
 00000270 <[^>]*> 7000003f 	sdbbp
 00000274 <[^>]*> 7000003f 	sdbbp
 00000278 <[^>]*> 7159e27f 	sdbbp	0x56789
diff -up --recursive --new-file binutils-2.15.91-20040625.macro/gas/testsuite/gas/mips/set-arch.s binutils-2.15.91-20040625/gas/testsuite/gas/mips/set-arch.s
--- binutils-2.15.91-20040625.macro/gas/testsuite/gas/mips/set-arch.s	2003-06-29 19:41:33.000000000 +0000
+++ binutils-2.15.91-20040625/gas/testsuite/gas/mips/set-arch.s	2004-06-26 12:42:22.000000000 +0000
@@ -200,11 +200,13 @@ text_label:	
 	wait    0                       # disassembles without code
 	wait    0x56789
 
-	# Instructions in previous ISAs or CPUs which are now slightly
-	# different.
+	# Instructions that used to have compatibility problems.
 	break
 	break   0                       # disassembles without code
-	break   0x12345
+	break   0x48,0x345
+
+	# Instructions in previous ISAs or CPUs which are now slightly
+	# different.
 	sdbbp
 	sdbbp   0                       # disassembles without code
 	sdbbp   0x56789
diff -up --recursive --new-file binutils-2.15.91-20040625.macro/opcodes/mips-opc.c binutils-2.15.91-20040625/opcodes/mips-opc.c
--- binutils-2.15.91-20040625.macro/opcodes/mips-opc.c	2003-11-19 04:25:23.000000000 +0000
+++ binutils-2.15.91-20040625/opcodes/mips-opc.c	2004-06-26 12:42:46.000000000 +0000
@@ -274,7 +274,6 @@ const struct mips_opcode mips_builtin_op
 {"bnel",    "s,t,p",	0x54000000, 0xfc000000,	CBL|RD_s|RD_t, 		I2|T3	},
 {"bnel",    "s,I,p",	0,    (int) M_BNEL_I,	INSN_MACRO,		I2|T3	},
 {"break",   "",		0x0000000d, 0xffffffff,	TRAP,			I1	},
-{"break",   "B",        0x0000000d, 0xfc00003f, TRAP,           	I32     },
 {"break",   "c",	0x0000000d, 0xfc00ffff,	TRAP,			I1	},
 {"break",   "c,q",	0x0000000d, 0xfc00003f,	TRAP,			I1	},
 {"c.f.d",   "S,T",	0x46200030, 0xffe007ff,	RD_S|RD_T|WR_CC|FP_D,	I1	},

Re: [Patch] / 0 should send SIGFPE not SIGTRAP...

[Thiemo Seufer]

Maciej W. Rozycki wrote:
[snip]
> opcodes/:
> 2004-07-19  Maciej W. Rozycki  <macro@linux-mips.org>
> 
> 	* mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
> 	ISA-specific "break" encoding.
> 
> gas/testsuite/:
> 2004-07-19  Maciej W. Rozycki  <macro@linux-mips.org>
> 
> 	* gas/mips/mips32.s: Adjust for the unified "break" syntax.  Add 
> 	another "break" case.  Update the comment accordingly.
> 	* gas/mips/set-arch.s: Likewise.
> 	* gas/mips/mips32.d: Adjust for the new output.
> 	* gas/mips/set-arch.d: Likewise.
> 
>  OK to apply?

Ok.


Thiemo

Re: [Patch] / 0 should send SIGFPE not SIGTRAP...

[Maciej W. Rozycki]

On Mon, 19 Jul 2004 cgd@broadcom.com wrote:

> At Mon, 19 Jul 2004 14:22:29 +0000 (UTC), "Maciej W. Rozycki" wrote:
> > (this has led to an address shift enlarging the
> > patch significantly, unfortunately).
> 
> maybe add nops to pad, instead?

 Well, addresses have been shifted down, so you'd have to remove 
something.  I suppose the break tests could be moved to the end of file, 
but I fail to see an advantage.  Test cases that embed addresses in output 
patterns are doomed to suffer from such changes.

  Maciej

Re: [Patch] / 0 should send SIGFPE not SIGTRAP...

[cgd]

At Mon, 19 Jul 2004 14:22:29 +0000 (UTC), "Maciej W. Rozycki" wrote:
> (this has led to an address shift enlarging the
> patch significantly, unfortunately).

maybe add nops to pad, instead?


cgd

Re: [Patch] / 0 should send SIGFPE not SIGTRAP...

[Maciej W. Rozycki]

On Mon, 28 Jun 2004 cgd@broadcom.com wrote:

> personally, i'd make the comment on the 'break' testcase in mips32.s a bit
> clearer and more explicit.  e.g. "for a while, break for mips32 
> took a 20 bit code.  But that was incompatible and caused problems, so
> now it's back to the old 10 bit code, or two comma-separated 10 bit codes."

 Here is an update, including your suggested comment changes as well as an
additional test case to assure single-argument "break" instructions have
the code placed correctly (this has led to an address shift enlarging the
patch significantly, unfortunately).  The gas testsuite has been verified
to pass after the change.

opcodes/:
2004-07-19  Maciej W. Rozycki  <macro@linux-mips.org>

	* mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
	ISA-specific "break" encoding.

gas/testsuite/:
2004-07-19  Maciej W. Rozycki  <macro@linux-mips.org>

	* gas/mips/mips32.s: Adjust for the unified "break" syntax.  Add 
	another "break" case.  Update the comment accordingly.
	* gas/mips/set-arch.s: Likewise.
	* gas/mips/mips32.d: Adjust for the new output.
	* gas/mips/set-arch.d: Likewise.

 OK to apply?

  Maciej

binutils-2.15.91-20040715-mips-break20.patch
diff -up --recursive --new-file binutils-2.15.91-20040715.macro/gas/testsuite/gas/mips/mips32.d binutils-2.15.91-20040715/gas/testsuite/gas/mips/mips32.d
--- binutils-2.15.91-20040715.macro/gas/testsuite/gas/mips/mips32.d	2003-05-08 03:25:35.000000000 +0000
+++ binutils-2.15.91-20040715/gas/testsuite/gas/mips/mips32.d	2004-07-18 19:10:00.000000000 +0000
@@ -48,8 +48,9 @@ Disassembly of section .text:
 0+0098 <[^>]*> 4359e260 	wait	0x56789
 0+009c <[^>]*> 0000000d 	break
 0+00a0 <[^>]*> 0000000d 	break
-0+00a4 <[^>]*> 0048d14d 	break	0x12345
-0+00a8 <[^>]*> 7000003f 	sdbbp
+0+00a4 <[^>]*> 0345000d 	break	0x345
+0+00a8 <[^>]*> 0048d14d 	break	0x48,0x345
 0+00ac <[^>]*> 7000003f 	sdbbp
-0+00b0 <[^>]*> 7159e27f 	sdbbp	0x56789
+0+00b0 <[^>]*> 7000003f 	sdbbp
+0+00b4 <[^>]*> 7159e27f 	sdbbp	0x56789
 	...
diff -up --recursive --new-file binutils-2.15.91-20040715.macro/gas/testsuite/gas/mips/mips32.s binutils-2.15.91-20040715/gas/testsuite/gas/mips/mips32.s
--- binutils-2.15.91-20040715.macro/gas/testsuite/gas/mips/mips32.s	2002-09-05 03:25:40.000000000 +0000
+++ binutils-2.15.91-20040715/gas/testsuite/gas/mips/mips32.s	2004-07-18 19:30:04.000000000 +0000
@@ -58,11 +58,17 @@ text_label:
       wait    0                       # disassembles without code
       wait    0x56789
 
-      # Instructions in previous ISAs or CPUs which are now slightly
-      # different.
+      # For a while break for the mips32 ISA interpreted a single argument
+      # as a 20-bit code, placing it in the opcode differently to
+      # traditional ISAs.  This turned out to cause problems, so it has
+      # been removed.  This test is to assure consistent interpretation.
       break
       break   0                       # disassembles without code
-      break   0x12345
+      break   0x345
+      break   0x48,0x345              # this still specifies a 20-bit code
+
+      # Instructions in previous ISAs or CPUs which are now slightly
+      # different.
       sdbbp
       sdbbp   0                       # disassembles without code
       sdbbp   0x56789
diff -up --recursive --new-file binutils-2.15.91-20040715.macro/gas/testsuite/gas/mips/set-arch.d binutils-2.15.91-20040715/gas/testsuite/gas/mips/set-arch.d
--- binutils-2.15.91-20040715.macro/gas/testsuite/gas/mips/set-arch.d	2003-10-01 03:25:36.000000000 +0000
+++ binutils-2.15.91-20040715/gas/testsuite/gas/mips/set-arch.d	2004-07-18 21:41:02.000000000 +0000
@@ -160,207 +160,208 @@ Disassembly of section \.text:
 00000260 <[^>]*> 4359e260 	wait	0x56789
 00000264 <[^>]*> 0000000d 	break
 00000268 <[^>]*> 0000000d 	break
-0000026c <[^>]*> 0048d14d 	break	0x12345
-00000270 <[^>]*> 7000003f 	sdbbp
+0000026c <[^>]*> 0345000d 	break	0x345
+00000270 <[^>]*> 0048d14d 	break	0x48,0x345
 00000274 <[^>]*> 7000003f 	sdbbp
-00000278 <[^>]*> 7159e27f 	sdbbp	0x56789
-0000027c <[^>]*> 000000c0 	sll	zero,zero,0x3
-00000280 <[^>]*> 7ca43980 	0x7ca43980
-00000284 <[^>]*> 7ca46984 	0x7ca46984
-00000288 <[^>]*> 0100fc09 	0x100fc09
-0000028c <[^>]*> 0120a409 	0x120a409
-00000290 <[^>]*> 01000408 	0x1000408
-00000294 <[^>]*> 7c0a003b 	0x7c0a003b
-00000298 <[^>]*> 7c0b083b 	0x7c0b083b
-0000029c <[^>]*> 7c0c103b 	0x7c0c103b
-000002a0 <[^>]*> 7c0d183b 	0x7c0d183b
-000002a4 <[^>]*> 7c0e203b 	0x7c0e203b
-000002a8 <[^>]*> 7c0f283b 	0x7c0f283b
-000002ac <[^>]*> 002acf02 	0x2acf02
-000002b0 <[^>]*> 002ac902 	0x2ac902
-000002b4 <[^>]*> 0004c823 	negu	t9,a0
-000002b8 <[^>]*> 032ac846 	0x32ac846
-000002bc <[^>]*> 008ac846 	0x8ac846
+00000278 <[^>]*> 7000003f 	sdbbp
+0000027c <[^>]*> 7159e27f 	sdbbp	0x56789
+00000280 <[^>]*> 000000c0 	sll	zero,zero,0x3
+00000284 <[^>]*> 7ca43980 	0x7ca43980
+00000288 <[^>]*> 7ca46984 	0x7ca46984
+0000028c <[^>]*> 0100fc09 	0x100fc09
+00000290 <[^>]*> 0120a409 	0x120a409
+00000294 <[^>]*> 01000408 	0x1000408
+00000298 <[^>]*> 7c0a003b 	0x7c0a003b
+0000029c <[^>]*> 7c0b083b 	0x7c0b083b
+000002a0 <[^>]*> 7c0c103b 	0x7c0c103b
+000002a4 <[^>]*> 7c0d183b 	0x7c0d183b
+000002a8 <[^>]*> 7c0e203b 	0x7c0e203b
+000002ac <[^>]*> 7c0f283b 	0x7c0f283b
+000002b0 <[^>]*> 002acf02 	0x2acf02
+000002b4 <[^>]*> 002ac902 	0x2ac902
+000002b8 <[^>]*> 0004c823 	negu	t9,a0
+000002bc <[^>]*> 032ac846 	0x32ac846
 000002c0 <[^>]*> 008ac846 	0x8ac846
-000002c4 <[^>]*> 7c073c20 	0x7c073c20
-000002c8 <[^>]*> 7c0a4420 	0x7c0a4420
-000002cc <[^>]*> 7c073e20 	0x7c073e20
-000002d0 <[^>]*> 7c0a4620 	0x7c0a4620
-000002d4 <[^>]*> 055f5555 	0x55f5555
-000002d8 <[^>]*> 7c0738a0 	0x7c0738a0
-000002dc <[^>]*> 7c0a40a0 	0x7c0a40a0
-000002e0 <[^>]*> 41606000 	0x41606000
+000002c4 <[^>]*> 008ac846 	0x8ac846
+000002c8 <[^>]*> 7c073c20 	0x7c073c20
+000002cc <[^>]*> 7c0a4420 	0x7c0a4420
+000002d0 <[^>]*> 7c073e20 	0x7c073e20
+000002d4 <[^>]*> 7c0a4620 	0x7c0a4620
+000002d8 <[^>]*> 055f5555 	0x55f5555
+000002dc <[^>]*> 7c0738a0 	0x7c0738a0
+000002e0 <[^>]*> 7c0a40a0 	0x7c0a40a0
 000002e4 <[^>]*> 41606000 	0x41606000
-000002e8 <[^>]*> 416a6000 	0x416a6000
-000002ec <[^>]*> 41606020 	0x41606020
+000002e8 <[^>]*> 41606000 	0x41606000
+000002ec <[^>]*> 416a6000 	0x416a6000
 000002f0 <[^>]*> 41606020 	0x41606020
-000002f4 <[^>]*> 416a6020 	0x416a6020
-000002f8 <[^>]*> 41595000 	0x41595000
-000002fc <[^>]*> 41d95000 	0x41d95000
-00000300 <[^>]*> 44710000 	0x44710000
-00000304 <[^>]*> 44f10000 	0x44f10000
-00000308 <[^>]*> 48715555 	0x48715555
-0000030c <[^>]*> 48f15555 	0x48f15555
-00000310 <[^>]*> 70410825 	dclo	at,v0
-00000314 <[^>]*> 70831824 	dclz	v1,a0
-00000318 <[^>]*> 48232000 	dmfc2	v1,\$4
-0000031c <[^>]*> 48242800 	dmfc2	a0,\$5
-00000320 <[^>]*> 48253007 	dmfc2	a1,\$6,7
-00000324 <[^>]*> 48a63800 	dmtc2	a2,\$7
-00000328 <[^>]*> 48a74000 	dmtc2	a3,\$8
-0000032c <[^>]*> 48a84807 	dmtc2	t0,\$9,7
-00000330 <[^>]*> 00850029 	0x850029
-00000334 <[^>]*> 00a60028 	0xa60028
-00000338 <[^>]*> 00002012 	mflo	a0
-0000033c <[^>]*> 00a62029 	0xa62029
-00000340 <[^>]*> 00a62229 	0xa62229
-00000344 <[^>]*> 00a62629 	0xa62629
-00000348 <[^>]*> 00a62269 	0xa62269
-0000034c <[^>]*> 00a62669 	0xa62669
-00000350 <[^>]*> 00a62429 	0xa62429
-00000354 <[^>]*> 00a62069 	0xa62069
-00000358 <[^>]*> 00a62469 	0xa62469
-0000035c <[^>]*> 00002012 	mflo	a0
-00000360 <[^>]*> 00a62028 	0xa62028
-00000364 <[^>]*> 00a62228 	0xa62228
-00000368 <[^>]*> 00a62628 	0xa62628
-0000036c <[^>]*> 00a62268 	0xa62268
-00000370 <[^>]*> 00a62668 	0xa62668
-00000374 <[^>]*> 00a62428 	0xa62428
-00000378 <[^>]*> 00a62068 	0xa62068
-0000037c <[^>]*> 00a62468 	0xa62468
-00000380 <[^>]*> 00a62059 	0xa62059
-00000384 <[^>]*> 00a62258 	0xa62258
-00000388 <[^>]*> 00a62259 	0xa62259
-0000038c <[^>]*> 00a620d8 	0xa620d8
-00000390 <[^>]*> 00a620d9 	0xa620d9
-00000394 <[^>]*> 00a622d8 	0xa622d8
-00000398 <[^>]*> 00a622d9 	0xa622d9
-0000039c <[^>]*> 00a62158 	0xa62158
-000003a0 <[^>]*> 00a62159 	0xa62159
-000003a4 <[^>]*> 00a62358 	0xa62358
-000003a8 <[^>]*> 00a62359 	0xa62359
-000003ac <[^>]*> 00a621d8 	0xa621d8
-000003b0 <[^>]*> 00a621d9 	0xa621d9
-000003b4 <[^>]*> 00a623d8 	0xa623d8
-000003b8 <[^>]*> 00a623d9 	0xa623d9
-000003bc <[^>]*> 00252642 	0x252642
-000003c0 <[^>]*> 00c52046 	0xc52046
-000003c4 <[^>]*> 0025267a 	0x25267a
-000003c8 <[^>]*> 0025267e 	0x25267e
+000002f4 <[^>]*> 41606020 	0x41606020
+000002f8 <[^>]*> 416a6020 	0x416a6020
+000002fc <[^>]*> 41595000 	0x41595000
+00000300 <[^>]*> 41d95000 	0x41d95000
+00000304 <[^>]*> 44710000 	0x44710000
+00000308 <[^>]*> 44f10000 	0x44f10000
+0000030c <[^>]*> 48715555 	0x48715555
+00000310 <[^>]*> 48f15555 	0x48f15555
+00000314 <[^>]*> 70410825 	dclo	at,v0
+00000318 <[^>]*> 70831824 	dclz	v1,a0
+0000031c <[^>]*> 48232000 	dmfc2	v1,\$4
+00000320 <[^>]*> 48242800 	dmfc2	a0,\$5
+00000324 <[^>]*> 48253007 	dmfc2	a1,\$6,7
+00000328 <[^>]*> 48a63800 	dmtc2	a2,\$7
+0000032c <[^>]*> 48a74000 	dmtc2	a3,\$8
+00000330 <[^>]*> 48a84807 	dmtc2	t0,\$9,7
+00000334 <[^>]*> 00850029 	0x850029
+00000338 <[^>]*> 00a60028 	0xa60028
+0000033c <[^>]*> 00002012 	mflo	a0
+00000340 <[^>]*> 00a62029 	0xa62029
+00000344 <[^>]*> 00a62229 	0xa62229
+00000348 <[^>]*> 00a62629 	0xa62629
+0000034c <[^>]*> 00a62269 	0xa62269
+00000350 <[^>]*> 00a62669 	0xa62669
+00000354 <[^>]*> 00a62429 	0xa62429
+00000358 <[^>]*> 00a62069 	0xa62069
+0000035c <[^>]*> 00a62469 	0xa62469
+00000360 <[^>]*> 00002012 	mflo	a0
+00000364 <[^>]*> 00a62028 	0xa62028
+00000368 <[^>]*> 00a62228 	0xa62228
+0000036c <[^>]*> 00a62628 	0xa62628
+00000370 <[^>]*> 00a62268 	0xa62268
+00000374 <[^>]*> 00a62668 	0xa62668
+00000378 <[^>]*> 00a62428 	0xa62428
+0000037c <[^>]*> 00a62068 	0xa62068
+00000380 <[^>]*> 00a62468 	0xa62468
+00000384 <[^>]*> 00a62059 	0xa62059
+00000388 <[^>]*> 00a62258 	0xa62258
+0000038c <[^>]*> 00a62259 	0xa62259
+00000390 <[^>]*> 00a620d8 	0xa620d8
+00000394 <[^>]*> 00a620d9 	0xa620d9
+00000398 <[^>]*> 00a622d8 	0xa622d8
+0000039c <[^>]*> 00a622d9 	0xa622d9
+000003a0 <[^>]*> 00a62158 	0xa62158
+000003a4 <[^>]*> 00a62159 	0xa62159
+000003a8 <[^>]*> 00a62358 	0xa62358
+000003ac <[^>]*> 00a62359 	0xa62359
+000003b0 <[^>]*> 00a621d8 	0xa621d8
+000003b4 <[^>]*> 00a621d9 	0xa621d9
+000003b8 <[^>]*> 00a623d8 	0xa623d8
+000003bc <[^>]*> 00a623d9 	0xa623d9
+000003c0 <[^>]*> 00252642 	0x252642
+000003c4 <[^>]*> 00c52046 	0xc52046
+000003c8 <[^>]*> 0025267a 	0x25267a
 000003cc <[^>]*> 0025267e 	0x25267e
-000003d0 <[^>]*> 00c52056 	0xc52056
-000003d4 <[^>]*> 7000003f 	sdbbp
-000003d8 <[^>]*> 7000003e 	0x7000003e
-000003dc <[^>]*> 7003183d 	0x7003183d
-000003e0 <[^>]*> 7083183d 	0x7083183d
-000003e4 <[^>]*> 4004c803 	mfc0	a0,c0_perfcnt,3
-000003e8 <[^>]*> 4004c802 	mfc0	a0,c0_perfcnt,2
-000003ec <[^>]*> 4084c803 	mtc0	a0,c0_perfcnt,3
-000003f0 <[^>]*> 4084c802 	mtc0	a0,c0_perfcnt,2
-000003f4 <[^>]*> 4ac4100b 	c2	0xc4100b
-000003f8 <[^>]*> 4886208b 	0x4886208b
-000003fc <[^>]*> 4bcf218b 	c2	0x1cf218b
-00000400 <[^>]*> 4bdf310b 	c2	0x1df310b
-00000404 <[^>]*> 4ac4100c 	c2	0xc4100c
-00000408 <[^>]*> 4886208c 	0x4886208c
-0000040c <[^>]*> 4bcf218c 	c2	0x1cf218c
-00000410 <[^>]*> 4bdf310c 	c2	0x1df310c
-00000414 <[^>]*> 4ac20001 	c2	0xc20001
-00000418 <[^>]*> 48862001 	mtc2	a2,\$4,1
-0000041c <[^>]*> 4bcf3001 	c2	0x1cf3001
-00000420 <[^>]*> 4bdf2001 	c2	0x1df2001
-00000424 <[^>]*> 4ac20005 	c2	0xc20005
-00000428 <[^>]*> 48862005 	mtc2	a2,\$4,5
-0000042c <[^>]*> 4bcf3005 	c2	0x1cf3005
-00000430 <[^>]*> 4bdf2005 	c2	0x1df2005
-00000434 <[^>]*> 4ac20004 	c2	0xc20004
-00000438 <[^>]*> 48862004 	mtc2	a2,\$4,4
-0000043c <[^>]*> 4bcf3004 	c2	0x1cf3004
-00000440 <[^>]*> 4bdf2004 	c2	0x1df2004
-00000444 <[^>]*> 4ac41007 	c2	0xc41007
-00000448 <[^>]*> 48862087 	0x48862087
-0000044c <[^>]*> 4bcf2187 	c2	0x1cf2187
-00000450 <[^>]*> 4bdf3107 	c2	0x1df3107
-00000454 <[^>]*> 4ac41006 	c2	0xc41006
-00000458 <[^>]*> 48862086 	0x48862086
-0000045c <[^>]*> 4bcf2186 	c2	0x1cf2186
-00000460 <[^>]*> 4bdf3106 	c2	0x1df3106
-00000464 <[^>]*> 4ac41030 	c2	0xc41030
-00000468 <[^>]*> 488620b0 	0x488620b0
-0000046c <[^>]*> 4bcf21b0 	c2	0x1cf21b0
-00000470 <[^>]*> 4bdf3130 	c2	0x1df3130
-00000474 <[^>]*> 4ac20033 	c2	0xc20033
-00000478 <[^>]*> 48862033 	0x48862033
-0000047c <[^>]*> 4bcf3033 	c2	0x1cf3033
-00000480 <[^>]*> 4bdf2033 	c2	0x1df2033
-00000484 <[^>]*> 4ac20433 	c2	0xc20433
-00000488 <[^>]*> 48862433 	0x48862433
-0000048c <[^>]*> 4bcf3433 	c2	0x1cf3433
-00000490 <[^>]*> 4bdf2433 	c2	0x1df2433
-00000494 <[^>]*> 4ac20032 	c2	0xc20032
-00000498 <[^>]*> 48862032 	0x48862032
-0000049c <[^>]*> 4bcf3032 	c2	0x1cf3032
-000004a0 <[^>]*> 4bdf2032 	c2	0x1df2032
-000004a4 <[^>]*> 4ac20432 	c2	0xc20432
-000004a8 <[^>]*> 48862432 	0x48862432
-000004ac <[^>]*> 4bcf3432 	c2	0x1cf3432
-000004b0 <[^>]*> 4bdf2432 	c2	0x1df2432
-000004b4 <[^>]*> 4ac4100f 	c2	0xc4100f
-000004b8 <[^>]*> 4886208f 	0x4886208f
-000004bc <[^>]*> 4bcf218f 	c2	0x1cf218f
-000004c0 <[^>]*> 4bdf310f 	c2	0x1df310f
-000004c4 <[^>]*> 4ac4100e 	c2	0xc4100e
-000004c8 <[^>]*> 4886208e 	0x4886208e
-000004cc <[^>]*> 4bcf218e 	c2	0x1cf218e
-000004d0 <[^>]*> 4bdf310e 	c2	0x1df310e
-000004d4 <[^>]*> 4ac41002 	c2	0xc41002
-000004d8 <[^>]*> 48862082 	0x48862082
-000004dc <[^>]*> 4bcf2182 	c2	0x1cf2182
-000004e0 <[^>]*> 4bdf3102 	c2	0x1df3102
-000004e4 <[^>]*> 4ac41003 	c2	0xc41003
-000004e8 <[^>]*> 48862083 	0x48862083
-000004ec <[^>]*> 4bcf2183 	c2	0x1cf2183
-000004f0 <[^>]*> 4bdf3103 	c2	0x1df3103
-000004f4 <[^>]*> 4ac4100a 	c2	0xc4100a
-000004f8 <[^>]*> 4886208a 	0x4886208a
-000004fc <[^>]*> 4bcf218a 	c2	0x1cf218a
-00000500 <[^>]*> 4bdf310a 	c2	0x1df310a
-00000504 <[^>]*> 4ac4100d 	c2	0xc4100d
-00000508 <[^>]*> 4886208d 	0x4886208d
-0000050c <[^>]*> 4bcf218d 	c2	0x1cf218d
-00000510 <[^>]*> 4bdf310d 	c2	0x1df310d
-00000514 <[^>]*> 48a41018 	0x48a41018
-00000518 <[^>]*> 4984101f 	0x4984101f
-0000051c <[^>]*> 49c4101f 	0x49c4101f
-00000520 <[^>]*> 4904101f 	0x4904101f
-00000524 <[^>]*> 4944101f 	0x4944101f
-00000528 <[^>]*> 48c62090 	0x48c62090
-0000052c <[^>]*> 4bce3110 	c2	0x1ce3110
-00000530 <[^>]*> 48c62092 	0x48c62092
-00000534 <[^>]*> 4bce3112 	c2	0x1ce3112
-00000538 <[^>]*> 4bcd00a0 	c2	0x1cd00a0
-0000053c <[^>]*> 4a0000bf 	c2	0xbf
-00000540 <[^>]*> 480000bf 	0x480000bf
-00000544 <[^>]*> 490000bf 	bc2f	00000844 <[^>]*>
-00000548 <[^>]*> 4a00103e 	c2	0x103e
-0000054c <[^>]*> 4804103e 	0x4804103e
-00000550 <[^>]*> 00c52046 	0xc52046
-00000554 <[^>]*> 00252442 	0x252442
-00000558 <[^>]*> 00c52056 	0xc52056
-0000055c <[^>]*> 0025207e 	0x25207e
-00000560 <[^>]*> 002520ba 	0x2520ba
-00000564 <[^>]*> 4ca4200f 	prefx	0x4,a0\(a1\)
-00000568 <[^>]*> 42000020 	wait
+000003d0 <[^>]*> 0025267e 	0x25267e
+000003d4 <[^>]*> 00c52056 	0xc52056
+000003d8 <[^>]*> 7000003f 	sdbbp
+000003dc <[^>]*> 7000003e 	0x7000003e
+000003e0 <[^>]*> 7003183d 	0x7003183d
+000003e4 <[^>]*> 7083183d 	0x7083183d
+000003e8 <[^>]*> 4004c803 	mfc0	a0,c0_perfcnt,3
+000003ec <[^>]*> 4004c802 	mfc0	a0,c0_perfcnt,2
+000003f0 <[^>]*> 4084c803 	mtc0	a0,c0_perfcnt,3
+000003f4 <[^>]*> 4084c802 	mtc0	a0,c0_perfcnt,2
+000003f8 <[^>]*> 4ac4100b 	c2	0xc4100b
+000003fc <[^>]*> 4886208b 	0x4886208b
+00000400 <[^>]*> 4bcf218b 	c2	0x1cf218b
+00000404 <[^>]*> 4bdf310b 	c2	0x1df310b
+00000408 <[^>]*> 4ac4100c 	c2	0xc4100c
+0000040c <[^>]*> 4886208c 	0x4886208c
+00000410 <[^>]*> 4bcf218c 	c2	0x1cf218c
+00000414 <[^>]*> 4bdf310c 	c2	0x1df310c
+00000418 <[^>]*> 4ac20001 	c2	0xc20001
+0000041c <[^>]*> 48862001 	mtc2	a2,\$4,1
+00000420 <[^>]*> 4bcf3001 	c2	0x1cf3001
+00000424 <[^>]*> 4bdf2001 	c2	0x1df2001
+00000428 <[^>]*> 4ac20005 	c2	0xc20005
+0000042c <[^>]*> 48862005 	mtc2	a2,\$4,5
+00000430 <[^>]*> 4bcf3005 	c2	0x1cf3005
+00000434 <[^>]*> 4bdf2005 	c2	0x1df2005
+00000438 <[^>]*> 4ac20004 	c2	0xc20004
+0000043c <[^>]*> 48862004 	mtc2	a2,\$4,4
+00000440 <[^>]*> 4bcf3004 	c2	0x1cf3004
+00000444 <[^>]*> 4bdf2004 	c2	0x1df2004
+00000448 <[^>]*> 4ac41007 	c2	0xc41007
+0000044c <[^>]*> 48862087 	0x48862087
+00000450 <[^>]*> 4bcf2187 	c2	0x1cf2187
+00000454 <[^>]*> 4bdf3107 	c2	0x1df3107
+00000458 <[^>]*> 4ac41006 	c2	0xc41006
+0000045c <[^>]*> 48862086 	0x48862086
+00000460 <[^>]*> 4bcf2186 	c2	0x1cf2186
+00000464 <[^>]*> 4bdf3106 	c2	0x1df3106
+00000468 <[^>]*> 4ac41030 	c2	0xc41030
+0000046c <[^>]*> 488620b0 	0x488620b0
+00000470 <[^>]*> 4bcf21b0 	c2	0x1cf21b0
+00000474 <[^>]*> 4bdf3130 	c2	0x1df3130
+00000478 <[^>]*> 4ac20033 	c2	0xc20033
+0000047c <[^>]*> 48862033 	0x48862033
+00000480 <[^>]*> 4bcf3033 	c2	0x1cf3033
+00000484 <[^>]*> 4bdf2033 	c2	0x1df2033
+00000488 <[^>]*> 4ac20433 	c2	0xc20433
+0000048c <[^>]*> 48862433 	0x48862433
+00000490 <[^>]*> 4bcf3433 	c2	0x1cf3433
+00000494 <[^>]*> 4bdf2433 	c2	0x1df2433
+00000498 <[^>]*> 4ac20032 	c2	0xc20032
+0000049c <[^>]*> 48862032 	0x48862032
+000004a0 <[^>]*> 4bcf3032 	c2	0x1cf3032
+000004a4 <[^>]*> 4bdf2032 	c2	0x1df2032
+000004a8 <[^>]*> 4ac20432 	c2	0xc20432
+000004ac <[^>]*> 48862432 	0x48862432
+000004b0 <[^>]*> 4bcf3432 	c2	0x1cf3432
+000004b4 <[^>]*> 4bdf2432 	c2	0x1df2432
+000004b8 <[^>]*> 4ac4100f 	c2	0xc4100f
+000004bc <[^>]*> 4886208f 	0x4886208f
+000004c0 <[^>]*> 4bcf218f 	c2	0x1cf218f
+000004c4 <[^>]*> 4bdf310f 	c2	0x1df310f
+000004c8 <[^>]*> 4ac4100e 	c2	0xc4100e
+000004cc <[^>]*> 4886208e 	0x4886208e
+000004d0 <[^>]*> 4bcf218e 	c2	0x1cf218e
+000004d4 <[^>]*> 4bdf310e 	c2	0x1df310e
+000004d8 <[^>]*> 4ac41002 	c2	0xc41002
+000004dc <[^>]*> 48862082 	0x48862082
+000004e0 <[^>]*> 4bcf2182 	c2	0x1cf2182
+000004e4 <[^>]*> 4bdf3102 	c2	0x1df3102
+000004e8 <[^>]*> 4ac41003 	c2	0xc41003
+000004ec <[^>]*> 48862083 	0x48862083
+000004f0 <[^>]*> 4bcf2183 	c2	0x1cf2183
+000004f4 <[^>]*> 4bdf3103 	c2	0x1df3103
+000004f8 <[^>]*> 4ac4100a 	c2	0xc4100a
+000004fc <[^>]*> 4886208a 	0x4886208a
+00000500 <[^>]*> 4bcf218a 	c2	0x1cf218a
+00000504 <[^>]*> 4bdf310a 	c2	0x1df310a
+00000508 <[^>]*> 4ac4100d 	c2	0xc4100d
+0000050c <[^>]*> 4886208d 	0x4886208d
+00000510 <[^>]*> 4bcf218d 	c2	0x1cf218d
+00000514 <[^>]*> 4bdf310d 	c2	0x1df310d
+00000518 <[^>]*> 48a41018 	0x48a41018
+0000051c <[^>]*> 4984101f 	0x4984101f
+00000520 <[^>]*> 49c4101f 	0x49c4101f
+00000524 <[^>]*> 4904101f 	0x4904101f
+00000528 <[^>]*> 4944101f 	0x4944101f
+0000052c <[^>]*> 48c62090 	0x48c62090
+00000530 <[^>]*> 4bce3110 	c2	0x1ce3110
+00000534 <[^>]*> 48c62092 	0x48c62092
+00000538 <[^>]*> 4bce3112 	c2	0x1ce3112
+0000053c <[^>]*> 4bcd00a0 	c2	0x1cd00a0
+00000540 <[^>]*> 4a0000bf 	c2	0xbf
+00000544 <[^>]*> 480000bf 	0x480000bf
+00000548 <[^>]*> 490000bf 	bc2f	00000848 <[^>]*>
+0000054c <[^>]*> 4a00103e 	c2	0x103e
+00000550 <[^>]*> 4804103e 	0x4804103e
+00000554 <[^>]*> 00c52046 	0xc52046
+00000558 <[^>]*> 00252442 	0x252442
+0000055c <[^>]*> 00c52056 	0xc52056
+00000560 <[^>]*> 0025207e 	0x25207e
+00000564 <[^>]*> 002520ba 	0x2520ba
+00000568 <[^>]*> 4ca4200f 	prefx	0x4,a0\(a1\)
 0000056c <[^>]*> 42000020 	wait
-00000570 <[^>]*> 4359e260 	wait	0x56789
-00000574 <[^>]*> 00000040 	ssnop
-00000578 <[^>]*> 70831821 	clo	v1,a0
-0000057c <[^>]*> 70831825 	dclo	v1,a0
-00000580 <[^>]*> 70831820 	clz	v1,a0
-00000584 <[^>]*> 70831824 	dclz	v1,a0
-00000588 <[^>]*> 4c440005 	luxc1	\$f0,a0\(v0\)
-0000058c <[^>]*> 4c44100d 	suxc1	\$f2,a0\(v0\)
-00000590 <[^>]*> 42000008 	tlbp
-00000594 <[^>]*> 42000001 	tlbr
+00000570 <[^>]*> 42000020 	wait
+00000574 <[^>]*> 4359e260 	wait	0x56789
+00000578 <[^>]*> 00000040 	ssnop
+0000057c <[^>]*> 70831821 	clo	v1,a0
+00000580 <[^>]*> 70831825 	dclo	v1,a0
+00000584 <[^>]*> 70831820 	clz	v1,a0
+00000588 <[^>]*> 70831824 	dclz	v1,a0
+0000058c <[^>]*> 4c440005 	luxc1	\$f0,a0\(v0\)
+00000590 <[^>]*> 4c44100d 	suxc1	\$f2,a0\(v0\)
+00000594 <[^>]*> 42000008 	tlbp
+00000598 <[^>]*> 42000001 	tlbr
 	\.\.\.
diff -up --recursive --new-file binutils-2.15.91-20040715.macro/gas/testsuite/gas/mips/set-arch.s binutils-2.15.91-20040715/gas/testsuite/gas/mips/set-arch.s
--- binutils-2.15.91-20040715.macro/gas/testsuite/gas/mips/set-arch.s	2003-06-29 19:41:33.000000000 +0000
+++ binutils-2.15.91-20040715/gas/testsuite/gas/mips/set-arch.s	2004-07-18 19:21:55.000000000 +0000
@@ -200,11 +200,17 @@ text_label:	
 	wait    0                       # disassembles without code
 	wait    0x56789
 
-	# Instructions in previous ISAs or CPUs which are now slightly
-	# different.
+	# For a while break for the mips32 ISA interpreted a single argument
+	# as a 20-bit code, placing it in the opcode differently to
+	# traditional ISAs.  This turned out to cause problems, so it has
+	# been removed.  This test is to assure consistent interpretation.
 	break
 	break   0                       # disassembles without code
-	break   0x12345
+	break	0x345
+	break	0x48,0x345		# this still specifies a 20-bit code
+
+	# Instructions in previous ISAs or CPUs which are now slightly
+	# different.
 	sdbbp
 	sdbbp   0                       # disassembles without code
 	sdbbp   0x56789
diff -up --recursive --new-file binutils-2.15.91-20040715.macro/opcodes/mips-opc.c binutils-2.15.91-20040715/opcodes/mips-opc.c
--- binutils-2.15.91-20040715.macro/opcodes/mips-opc.c	2003-11-19 04:25:23.000000000 +0000
+++ binutils-2.15.91-20040715/opcodes/mips-opc.c	2004-06-26 12:42:46.000000000 +0000
@@ -274,7 +274,6 @@ const struct mips_opcode mips_builtin_op
 {"bnel",    "s,t,p",	0x54000000, 0xfc000000,	CBL|RD_s|RD_t, 		I2|T3	},
 {"bnel",    "s,I,p",	0,    (int) M_BNEL_I,	INSN_MACRO,		I2|T3	},
 {"break",   "",		0x0000000d, 0xffffffff,	TRAP,			I1	},
-{"break",   "B",        0x0000000d, 0xfc00003f, TRAP,           	I32     },
 {"break",   "c",	0x0000000d, 0xfc00ffff,	TRAP,			I1	},
 {"break",   "c,q",	0x0000000d, 0xfc00003f,	TRAP,			I1	},
 {"c.f.d",   "S,T",	0x46200030, 0xffe007ff,	RD_S|RD_T|WR_CC|FP_D,	I1	},

Re: [Patch] / 0 should send SIGFPE not SIGTRAP...

[Maciej W. Rozycki]

On Mon, 28 Jun 2004 cgd@broadcom.com wrote:

> personally, i'd make the comment on the 'break' testcase in mips32.s a bit
> clearer and more explicit.  e.g. "for a while, break for mips32 
> took a 20 bit code.  But that was incompatible and caused problems, so
> now it's back to the old 10 bit code, or two comma-separated 10 bit codes."

 No problem.

> Otherwise, people might look and say "huh?"

 ;-)

Re: [Patch] / 0 should send SIGFPE not SIGTRAP...

[cgd]

personally, i'd make the comment on the 'break' testcase in mips32.s a bit
clearer and more explicit.  e.g. "for a while, break for mips32 
took a 20 bit code.  But that was incompatible and caused problems, so
now it's back to the old 10 bit code, or two comma-separated 10 bit codes."

Otherwise, people might look and say "huh?"


chris