Fix for iWMMXt tmcr and tmrc instructions

["Joseph S. Myers" <joseph@codesourcery.com>]

The current ARM assembler gives errors for some valid iWMMXt
instructions such as "tmcr wcgr0,r0".  These instructions are
generated by GCC, and some older assembler versions accepted them.
This patch fixes them by adding OP_RIWC_RIWG for the operand types
these instructions accept.  OK to commit?  (In fact, these
instructions are the only uses of OP_RIWC, so another possibility
would be to redefine that to accept both register types.)

gas:
2006-07-26  Joseph Myers  <joseph@codesourcery.com>

	* config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
	(parse_operands): Handle it.
	(insns): Use it for tmcr and tmrc.

gas/testsuite:
2006-07-26  Joseph Myers  <joseph@codesourcery.com>

	* gas/arm/iwmmxt.s: Test tmcr and tmrc with wcgr registers.
	* gas/arm/iwmmxt.d: Update.

Index: gas/config/tc-arm.c
===================================================================
RCS file: /cvs/src/src/gas/config/tc-arm.c,v
retrieving revision 1.280
diff -u -r1.280 tc-arm.c
--- gas/config/tc-arm.c	19 Jul 2006 12:53:33 -0000	1.280
+++ gas/config/tc-arm.c	26 Jul 2006 14:15:34 -0000
@@ -5370,6 +5370,7 @@
   OP_RR_EXi,	/* ARM register or expression with imm prefix */
   OP_RF_IF,	/* FPA register or immediate */
   OP_RIWR_RIWC, /* iWMMXt R or C reg */
+  OP_RIWC_RIWG, /* iWMMXt wC or wCG reg */
 
   /* Optional operands.	 */
   OP_oI7b,	 /* immediate, prefix optional, 0 .. 7 */
@@ -5760,6 +5761,21 @@
 	  }
 	  break;
 
+	case OP_RIWC_RIWG:
+	  {
+	    struct reg_entry *rege = arm_reg_parse_multi (&str);
+	    if (!rege
+		|| (rege->type != REG_TYPE_MMXWC
+		    && rege->type != REG_TYPE_MMXWCG))
+	      {
+		inst.error = _("iWMMXt control register expected");
+		goto failure;
+	      }
+	    inst.operands[i].reg = rege->number;
+	    inst.operands[i].isreg = 1;
+	  }
+	  break;
+
 	  /* Misc */
 	case OP_CPSF:	 val = parse_cps_flags (&str);		break;
 	case OP_ENDI:	 val = parse_endian_specifier (&str);	break;
@@ -15712,7 +15728,7 @@
  cCE(tinsrb,	e600010, 3, (RIWR, RR, I7),	    iwmmxt_tinsr),
  cCE(tinsrh,	e600050, 3, (RIWR, RR, I7),	    iwmmxt_tinsr),
  cCE(tinsrw,	e600090, 3, (RIWR, RR, I7),	    iwmmxt_tinsr),
- cCE(tmcr,	e000110, 2, (RIWC, RR),		    rn_rd),
+ cCE(tmcr,	e000110, 2, (RIWC_RIWG, RR),	    rn_rd),
  cCE(tmcrr,	c400000, 3, (RIWR, RR, RR),	    rm_rd_rn),
  cCE(tmia,	e200010, 3, (RIWR, RR, RR),	    iwmmxt_tmia),
  cCE(tmiaph,	e280010, 3, (RIWR, RR, RR),	    iwmmxt_tmia),
@@ -15723,7 +15739,7 @@
  cCE(tmovmskb,	e100030, 2, (RR, RIWR),		    rd_rn),
  cCE(tmovmskh,	e500030, 2, (RR, RIWR),		    rd_rn),
  cCE(tmovmskw,	e900030, 2, (RR, RIWR),		    rd_rn),
- cCE(tmrc,	e100110, 2, (RR, RIWC),		    rd_rn),
+ cCE(tmrc,	e100110, 2, (RR, RIWC_RIWG),	    rd_rn),
  cCE(tmrrc,	c500000, 3, (RR, RR, RIWR),	    rd_rn_rm),
  cCE(torcb,	e13f150, 1, (RR),		    iwmmxt_tandorc),
  cCE(torch,	e53f150, 1, (RR),		    iwmmxt_tandorc),
Index: gas/testsuite/gas/arm/iwmmxt.d
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/arm/iwmmxt.d,v
retrieving revision 1.6
diff -u -r1.6 iwmmxt.d
--- gas/testsuite/gas/arm/iwmmxt.d	2 May 2006 14:42:30 -0000	1.6
+++ gas/testsuite/gas/arm/iwmmxt.d	26 Jul 2006 14:15:34 -0000
@@ -166,6 +166,6 @@
 0+278 <[^>]*> 0e9540ea[ 	]+wunpckilweq[ 	]+wr4, wr5, wr10
 0+27c <[^>]*> 1e143005[ 	]+wxorne[ 	]+wr3, wr4, wr5
 0+280 <[^>]*> ae377007[ 	]+wandnge[ 	]+wr7, wr7, wr7
-0+284 <[^>]*> e1a00000[ 	]+nop[ 	]+\(mov r0,r0\)
-0+288 <[^>]*> e1a00000[ 	]+nop[ 	]+\(mov r0,r0\)
+0+284 <[^>]*> ee080110[ 	]+tmcr[ 	]+wcgr0, r0
+0+288 <[^>]*> ee1a1110[ 	]+tmrc[ 	]+r1, wcgr2
 0+28c <[^>]*> e1a00000[ 	]+nop[ 	]+\(mov r0,r0\)
Index: gas/testsuite/gas/arm/iwmmxt.s
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/arm/iwmmxt.s,v
retrieving revision 1.5
diff -u -r1.5 iwmmxt.s
--- gas/testsuite/gas/arm/iwmmxt.s	2 May 2006 14:42:30 -0000	1.5
+++ gas/testsuite/gas/arm/iwmmxt.s	26 Jul 2006 14:15:34 -0000
@@ -203,7 +203,8 @@
 
 	wzeroge		wr7
 
+	tmcr		wcgr0, r0
+	tmrc		r1, wcgr2
+
 	@ a.out-required section size padding
 	nop
-	nop
-	nop

-- 
Joseph S. Myers
joseph@codesourcery.com