RE: [RFC] x86: proposal for a new .insn directive

["Jiang, Haochen" <haochen.jiang@intel.com>]

> >>
> >> # TBD: How to specify the Disp8 scaling factor here? (In Intel syntax we can
> simply
> >> #      use memory operand size.)
> >>         .insn EVEX.66.0F38.W0 0x88, 4(%eax), %ymm1      # vexpandps
> 4(%eax), %ymm1

One of the way I think is to add a field at encoding

{VEX,XOP,EVEX}[.<len>][.<prefix>][.<space>][.<w>][.<memory>]

<memory> could be x or y.
If <memory> is omitted, it is implied by register size or it is in Intel syntax.

But the potential problem is that if we have to add a field every time we meet
something special, the directive will turn out to be longer and longer and more
and more complicated. I don't know whether everyone like this.

BRs,
Haochen

> >
> > I think it is a nice feature.  But it will be very difficult to
> > support all complex
> > x86 encoding schemes which change over time.
> 
> Of course, and especially also if yet new schemes would appear. We can
> only possibly encode what we're aware of; but even that may help with
> unknown (or further extended) schemes, compared to today's need of
> resorting to .byte.
> 
> >  We can start with the regular encoding schemes first.
> 
> Well, at the very least immediates need dealing with in some sensible way.
> So at least those two TBDs will need addressing up front (or maybe while
> I'm starting with some initial work here, which I may have time for in
> about two weeks).
> 
> Jan