> -----Original Message-----
> From: Jan Beulich <jbeulich@suse.com>
> Sent: Monday, October 17, 2022 3:20 PM
> To: Jiang, Haochen <haochen.jiang@intel.com>
> Cc: hjl.tools@gmail.com; Hu, Lin1 <lin1.hu@intel.com>;
> binutils@sourceware.org
> Subject: Re: [PATCH 08/10] Support Intel MSRLIST
> 
> On 14.10.2022 11:12, Haochen Jiang wrote:
> > From: "Hu, Lin1" <lin1.hu@intel.com>
> >
> > gas/ChangeLog:
> >
> > 	* NEWS: Support Intel MSRLIST.
> > 	* config/tc-i386.c: Add msrlist.
> > 	* doc/c-i386.texi: Document .msrlist and nomsrlist.
> > 	* testsuite/gas/i386/i386.exp: Add MSRLIST tests.
> > 	* testsuite/gas/i386/x86-64-lockbad-1.l: Add msrlist.
> > 	* testsuite/gas/i386/x86-64-lockbad-1.s: Ditto.
> > 	* testsuite/gas/i386/msrlist-inval.l: New test.
> > 	* testsuite/gas/i386/msrlist-inval.s: Ditto.
> > 	* testsuite/gas/i386/x86-64-msrlist-intel.d: Ditto.
> > 	* testsuite/gas/i386/x86-64-msrlist.d: Ditto.
> > 	* testsuite/gas/i386/x86-64-msrlist.s: Ditto.
> >
> > opcodes/ChangeLog:
> >
> > 	* i386-dis.c (X86_64_0F01_REG_0_MOD_3_RM_6_P_1): New.
> > 	(X86_64_0F01_REG_0_MOD_3_RM_6_P_3): Ditto.
> > 	(prefix_table): New entry for msrlist.
> > 	(x86_64_table): Add X86_64_0F01_REG_0_MOD_3_RM_6_P_1
> > 	and X86_64_0F01_REG_0_MOD_3_RM_6_P_3.
> > 	* i386-gen.c (cpu_flag_init): Add CPU_MSRLIST_FLAGS
> > 	and CPU_ANY_MSRLIST_FLAGS.
> > 	* i386-init.h: Regenerated.
> > 	* i386-opc.h (CpuMSRLIST): New.
> > 	(i386_cpu_flags): Add cpumsrlist.
> > 	* i386-opc.tbl: Add MSRLIST instructions.
> > 	* i386-tbl.h: Regenerated.
> > ---
> >  gas/NEWS                                      |    2 +
> >  gas/config/tc-i386.c                          |    1 +
> >  gas/doc/c-i386.texi                           |    3 +
> >  gas/testsuite/gas/i386/i386.exp               |    3 +
> >  gas/testsuite/gas/i386/msrlist-inval.l        |    3 +
> >  gas/testsuite/gas/i386/msrlist-inval.s        |    7 +
> >  gas/testsuite/gas/i386/x86-64-lockbad-1.l     |  100 +-
> >  gas/testsuite/gas/i386/x86-64-lockbad-1.s     |    4 +
> >  gas/testsuite/gas/i386/x86-64-msrlist-intel.d |   14 +
> >  gas/testsuite/gas/i386/x86-64-msrlist.d       |   14 +
> >  gas/testsuite/gas/i386/x86-64-msrlist.s       |   11 +
> >  opcodes/i386-dis.c                            |   17 +
> >  opcodes/i386-gen.c                            |    5 +
> >  opcodes/i386-init.h                           |  516 +-
> >  opcodes/i386-opc.h                            |    3 +
> >  opcodes/i386-opc.tbl                          |    7 +
> >  opcodes/i386-tbl.h                            | 7844 +++++++++--------
> >  17 files changed, 4350 insertions(+), 4204 deletions(-)  create mode
> > 100644 gas/testsuite/gas/i386/msrlist-inval.l
> >  create mode 100644 gas/testsuite/gas/i386/msrlist-inval.s
> >  create mode 100644 gas/testsuite/gas/i386/x86-64-msrlist-intel.d
> >  create mode 100644 gas/testsuite/gas/i386/x86-64-msrlist.d
> >  create mode 100644 gas/testsuite/gas/i386/x86-64-msrlist.s
> 
> See some of the comments to patch 7, which apply here equally.

Changes are quite same as patch 7.

In tc-i386.c, we changed ANY_MSRLIST to MSRLIST.

Removed lockbad testcases.

Removed not needed allow_index_reg.

Haochen

> 
> Jan