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From: "Jiang, Haochen" <haochen.jiang@intel.com>
To: "Beulich, Jan" <JBeulich@suse.com>, "Cui, Lili" <lili.cui@intel.com>
Cc: "H.J. Lu" <hjl.tools@gmail.com>, Binutils <binutils@sourceware.org>
Subject: RE: [PATCH 4/5] x86/APX: extend SSE2AVX coverage
Date: Wed, 3 Apr 2024 09:17:24 +0000	[thread overview]
Message-ID: <SA1PR11MB5946ED4358CA970566E9A96FEC3D2@SA1PR11MB5946.namprd11.prod.outlook.com> (raw)
In-Reply-To: <7add52dd-e2ab-4a65-8636-f5bb41d4d45c@suse.com>



> On 03.04.2024 09:59, Cui, Lili wrote:
> >>> This conversion is clever, although the mnemonic has changed, but
> >> considering it is controlled by -msse2avx, maybe we can mention in the
> >> option that it might change the mnemonic. Judging from the option name
> >> alone, it is difficult for users to predict that the mnemonic will change
> >> (traditionally, it seems to just add V).
> >>
> >> I don't think doc adjustment is needed here. We already have at least one
> >> example where the mnemonic also changes: CVTPI2PD -> VCVTDQ2PD.
> >>
> >
> > Oh, there has been such a conversion before. Another thing that comes to
> mind is that sse2avx was previously used to support sse to vex conversion.
> This option works on machines that don't support evex. We now extend sse to
> evex, which makes this option unavailable on machines that do not support
> the evex instruction (e.g. hybrid machines like Alderlake). Do you think we
> should add a new option?
> 
> That's a question I've tentatively answered with "No". SSE => VEX requires
> systems supporting AVX. SSE-with-eGPR requires systems with APX.
> SSE-with-eGPR => EVEX similarly can rely on APX being there, and I expect
> all such systems will support at least AVX10/128. If that is deemed a wrong
> assumption, then indeed we may need to consider adding a new option (but
> not -msse2avx512 as you suggest further down, as SSE only ever covers 128-
> bit operations; -msse2avx10 maybe).

Just to clarify one thing, is the behavior change for -msse2avx happen only with
EGPRs?

If answer is no, no matter the assumption is right or not, I suppose the problem is
if we change the behavior for legacy -msse2avx to also promote to EVEX silently,
from my understanding, it will cause on current hybrid clients and upcoming Sierra
Forest and Clearwater Forest, EVEX instructions will appear under these platforms,
which is not aligned with previous behavior for -msse2avx. Eventually it will crash
since on those machines, there are no EVEX instructions. It might be a surprise to
users.

Thx,
Haochen

  reply	other threads:[~2024-04-03  9:17 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-03-22  9:25 [PATCH 0/5] x86/APX: respect -msse2avx Jan Beulich
2024-03-22  9:27 ` [PATCH 1/5] x86/SSE2AVX: respect prefixes Jan Beulich
2024-03-27  8:47   ` Cui, Lili
2024-03-27 11:31     ` Jan Beulich
2024-03-22  9:27 ` [PATCH 2/5] x86/SSE2AVX: move checking Jan Beulich
2024-03-27  9:38   ` Cui, Lili
2024-03-22  9:27 ` [PATCH 3/5] x86: zap value-less Disp8MemShift from non-EVEX templates Jan Beulich
2024-03-22  9:28 ` [PATCH 4/5] x86/APX: extend SSE2AVX coverage Jan Beulich
2024-03-29  9:10   ` Cui, Lili
2024-04-02  8:48     ` Jan Beulich
2024-04-03  7:59       ` Cui, Lili
2024-04-03  8:19         ` Jan Beulich
2024-04-03  9:17           ` Jiang, Haochen [this message]
2024-04-03  9:29             ` Cui, Lili
2024-04-03 10:22             ` Jan Beulich
2024-04-03  9:22           ` Cui, Lili
2024-04-05  7:09     ` Jan Beulich
2024-04-07  1:48       ` Cui, Lili
2024-04-08  6:25         ` Jan Beulich
2024-04-08  7:38           ` Cui, Lili
2024-03-22  9:29 ` [PATCH 5/5] x86: tidy <sse*> templates Jan Beulich

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