From: "Cui, Lili" <lili.cui@intel.com>
To: "Beulich, Jan" <JBeulich@suse.com>
Cc: "H.J. Lu" <hjl.tools@gmail.com>, Binutils <binutils@sourceware.org>
Subject: RE: [PATCH 4/5] x86/APX: extend SSE2AVX coverage
Date: Sun, 7 Apr 2024 01:48:07 +0000 [thread overview]
Message-ID: <SJ0PR11MB56006660363CFEAA5643EBC89E012@SJ0PR11MB5600.namprd11.prod.outlook.com> (raw)
In-Reply-To: <70ec9c47-0825-4dad-b88a-e85bbbd89857@suse.com>
> On 29.03.2024 10:10, Cui, Lili wrote:
> >> Legacy encoded SIMD insns are converted to AVX ones in that mode.
> >> When eGPR-s are in use, i.e. with APX, convert to AVX10 insns (where
> >> available; there are quite a few which can't be converted).
> >>
> >> For GFNI alter the gfni template such that VexW would be emitted even
> >> for the SSE templates: There the attribute is simply meaningless, but
> >> it simplifies the template quite a bit.
> >
> > For this part, although adding VexW to the SSE template is more concise, it
> also breaks the rules and creates hidden dangers, it feels a bit unworthy.
>
> Coming back to this: What rules is this breaking?
>
Normally we only add VexW to VEX and EVEX formats, not to legacy formats. Once someone wants to use VexW to distinguish them, he will find that there is a special one there.
But this is just an assumption, we have other flags to distinguish them. I won't insist on this issue, it won't have much impact.
> I can see your point of "hidden dangers", yet I'm unsure about drawing the
> conclusion that it's "unworthy": The <gfni> template would need dropping
> altogether in the alternative approach, doubling the number of insn
> template lines. That's not _that_ much, but still worthwhile to weigh against
> those latent risks.
>
> > GFNI SSE does not support eGPR-s, I'm not sure if we should give it an error
> instead of converting it.
>
> Well, this would mean not converting various others either. One of the goals,
> however, was to allow conversion of as many of the insns as possible, even if
> their legacy forms has no REX2 representation.
>
Since they are under the sse2mmx option, I think this is OK.
Thanks,
Lili.
next prev parent reply other threads:[~2024-04-07 1:48 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-22 9:25 [PATCH 0/5] x86/APX: respect -msse2avx Jan Beulich
2024-03-22 9:27 ` [PATCH 1/5] x86/SSE2AVX: respect prefixes Jan Beulich
2024-03-27 8:47 ` Cui, Lili
2024-03-27 11:31 ` Jan Beulich
2024-03-22 9:27 ` [PATCH 2/5] x86/SSE2AVX: move checking Jan Beulich
2024-03-27 9:38 ` Cui, Lili
2024-03-22 9:27 ` [PATCH 3/5] x86: zap value-less Disp8MemShift from non-EVEX templates Jan Beulich
2024-03-22 9:28 ` [PATCH 4/5] x86/APX: extend SSE2AVX coverage Jan Beulich
2024-03-29 9:10 ` Cui, Lili
2024-04-02 8:48 ` Jan Beulich
2024-04-03 7:59 ` Cui, Lili
2024-04-03 8:19 ` Jan Beulich
2024-04-03 9:17 ` Jiang, Haochen
2024-04-03 9:29 ` Cui, Lili
2024-04-03 10:22 ` Jan Beulich
2024-04-03 9:22 ` Cui, Lili
2024-04-05 7:09 ` Jan Beulich
2024-04-07 1:48 ` Cui, Lili [this message]
2024-04-08 6:25 ` Jan Beulich
2024-04-08 7:38 ` Cui, Lili
2024-03-22 9:29 ` [PATCH 5/5] x86: tidy <sse*> templates Jan Beulich
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