From: "Cui, Lili" <lili.cui@intel.com>
To: "Beulich, Jan" <JBeulich@suse.com>, Binutils <binutils@sourceware.org>
Cc: "H.J. Lu" <hjl.tools@gmail.com>
Subject: RE: [PATCH] x86/APX: drop stray IgnoreSize
Date: Sun, 18 Feb 2024 01:31:27 +0000 [thread overview]
Message-ID: <SJ0PR11MB5600895486AF251E9C9B86569E522@SJ0PR11MB5600.namprd11.prod.outlook.com> (raw)
In-Reply-To: <00bab805-a894-49cc-8018-f936f12866d6@suse.com>
> -----Original Message-----
> From: Jan Beulich <jbeulich@suse.com>
> Sent: Friday, February 9, 2024 4:11 PM
> To: Binutils <binutils@sourceware.org>
> Cc: H.J. Lu <hjl.tools@gmail.com>; Cui, Lili <lili.cui@intel.com>
> Subject: [PATCH] x86/APX: drop stray IgnoreSize
>
> While necessary on the legacy encodings, the EVEX ones don't need it.
> Even more so when they're available for 64-bit mode only, when the legacy
> encodings have the attribute only for correctly handling things in 16-bit mode.
>
It is indeed redundant, thanks.
Lili.
> --- a/opcodes/i386-opc.tbl
> +++ b/opcodes/i386-opc.tbl
> @@ -2129,12 +2129,12 @@ xcryptofb, 0xf30fa7e8, PadLock, NoSuf|Re
> xstore, 0xfa7c0, PadLock, NoSuf|RepPrefixOk, {}
>
> // Multy-precision Add Carry, rdseed instructions.
> -adcx, 0x6666, ADX&APX_F,
> C|Modrm|CheckOperandSize|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|DstV
> VVV|EVexMap4, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64,
> Reg32|Reg64 }
> +adcx, 0x6666, ADX&APX_F,
> +C|Modrm|CheckOperandSize|No_bSuf|No_wSuf|No_sSuf|DstVVVV|EVex
> Map4, {
> +Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64, Reg32|Reg64 }
> adcx, 0x660f38f6, ADX,
> Modrm|CheckOperandSize|IgnoreSize|No_bSuf|No_wSuf|No_sSuf,
> { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 } -adcx, 0x6666,
> ADX&APX_F,
> Modrm|CheckOperandSize|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|EVexMa
> p4, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 } -adox, 0xf366,
> ADX&APX_F,
> C|Modrm|CheckOperandSize|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|DstV
> VVV|EVexMap4, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64,
> Reg32|Reg64 }
> +adcx, 0x6666, ADX&APX_F,
> +Modrm|CheckOperandSize|No_bSuf|No_wSuf|No_sSuf|EVexMap4, {
> +Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 } adox, 0xf366,
> +ADX&APX_F,
> +C|Modrm|CheckOperandSize|No_bSuf|No_wSuf|No_sSuf|DstVVVV|EVex
> Map4, {
> +Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64, Reg32|Reg64 }
> adox, 0xf30f38f6, ADX,
> Modrm|CheckOperandSize|IgnoreSize|No_bSuf|No_wSuf|No_sSuf,
> { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 } -adox, 0xf366,
> ADX&APX_F,
> Modrm|CheckOperandSize|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|EVexMa
> p4, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 }
> +adox, 0xf366, ADX&APX_F,
> +Modrm|CheckOperandSize|No_bSuf|No_wSuf|No_sSuf|EVexMap4, {
> +Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 }
> rdseed, 0xfc7/7, RdSeed, Modrm|NoSuf, { Reg16|Reg32|Reg64 }
>
> // SMAP instructions.
> @@ -3112,11 +3112,11 @@ rdsspq, 0xf30f1e/1, SHSTK&x64, Modrm|NoS
> saveprevssp, 0xf30f01ea, SHSTK, NoSuf, {} rstorssp, 0xf30f01/5, SHSTK,
> Modrm|NoSuf, { Qword|Unspecified|BaseIndex } wrssd, 0x0f38f6, SHSTK,
> Modrm|IgnoreSize|NoSuf, { Reg32, Dword|Unspecified|BaseIndex } -wrssd,
> 0x66, SHSTK&APX_F, Modrm|IgnoreSize|NoSuf|EVexMap4, { Reg32,
> Dword|Unspecified|BaseIndex }
> +wrssd, 0x66, SHSTK&APX_F, Modrm|NoSuf|EVexMap4, { Reg32,
> +Dword|Unspecified|BaseIndex }
> wrssq, 0x0f38f6, SHSTK&x64, Modrm|NoSuf|Size64, { Reg64,
> Qword|Unspecified|BaseIndex } wrssq, 0x66, SHSTK&APX_F,
> Modrm|NoSuf|Size64|EVexMap4, { Reg64, Qword|Unspecified|BaseIndex }
> wrussd, 0x660f38f5, SHSTK, Modrm|IgnoreSize|NoSuf, { Reg32,
> Dword|Unspecified|BaseIndex } -wrussd, 0x6665, SHSTK&APX_F,
> Modrm|IgnoreSize|NoSuf|EVexMap4, { Reg32,
> Dword|Unspecified|BaseIndex }
> +wrussd, 0x6665, SHSTK&APX_F, Modrm|NoSuf|EVexMap4, { Reg32,
> +Dword|Unspecified|BaseIndex }
> wrussq, 0x660f38f5, SHSTK&x64, Modrm|NoSuf, { Reg64,
> Qword|Unspecified|BaseIndex } wrussq, 0x6665, SHSTK&APX_F,
> Modrm|NoSuf|EVexMap4, { Reg64, Qword|Unspecified|BaseIndex }
> setssbsy, 0xf30f01e8, SHSTK, NoSuf, {} @@ -3166,7 +3166,7 @@ cldemote,
> 0x0f1c/0, CLDEMOTE, Modrm|Anys // MOVDIR[I,64B] instructions.
>
> movdiri, 0xf38f9, MOVDIRI,
> Modrm|CheckOperandSize|IgnoreSize|No_bSuf|No_wSuf|No_sSuf,
> { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex } -movdiri, 0xf9,
> MOVDIRI&APX_F,
> Modrm|CheckOperandSize|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|EVexMa
> p4, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
> +movdiri, 0xf9, MOVDIRI&APX_F,
> +Modrm|CheckOperandSize|No_bSuf|No_wSuf|No_sSuf|EVexMap4,
> { Reg32|Reg64,
> +Dword|Qword|Unspecified|BaseIndex }
> movdir64b, 0x660f38f8, MOVDIR64B, Modrm|AddrPrefixOpReg|NoSuf,
> { Unspecified|BaseIndex, Reg16|Reg32|Reg64 } movdir64b, 0x66f8,
> MOVDIR64B&APX_F, Modrm|AddrPrefixOpReg|NoSuf|EVexMap4,
> { Unspecified|BaseIndex, Reg32|Reg64 }
>
> @@ -3473,13 +3473,13 @@ wrmsrlist, 0xf30f01c6, MSRLIST, NoSuf, { //
> RAO-INT instructions.
>
> aadd, 0xf38fc, RAO_INT, Modrm|IgnoreSize|CheckOperandSize|NoSuf,
> { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex } -aadd, 0xfc,
> RAO_INT&APX_F, Modrm|IgnoreSize|CheckOperandSize|NoSuf|EVexMap4,
> { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
> +aadd, 0xfc, RAO_INT&APX_F, Modrm|CheckOperandSize|NoSuf|EVexMap4,
> {
> +Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
> aand, 0x660f38fc, RAO_INT, Modrm|IgnoreSize|CheckOperandSize|NoSuf,
> { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex } -aand, 0x66fc,
> RAO_INT&APX_F, Modrm|IgnoreSize|CheckOperandSize|NoSuf|EVexMap4,
> { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
> +aand, 0x66fc, RAO_INT&APX_F,
> Modrm|CheckOperandSize|NoSuf|EVexMap4, {
> +Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
> aor, 0xf20f38fc, RAO_INT, Modrm|IgnoreSize|CheckOperandSize|NoSuf,
> { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex } -aor, 0xf2fc,
> RAO_INT&APX_F, Modrm|IgnoreSize|CheckOperandSize|NoSuf|EVexMap4,
> { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
> +aor, 0xf2fc, RAO_INT&APX_F, Modrm|CheckOperandSize|NoSuf|EVexMap4,
> {
> +Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
> axor, 0xf30f38fc, RAO_INT, Modrm|IgnoreSize|CheckOperandSize|NoSuf,
> { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex } -axor, 0xf3fc,
> RAO_INT&APX_F, Modrm|IgnoreSize|CheckOperandSize|NoSuf|EVexMap4,
> { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
> +axor, 0xf3fc, RAO_INT&APX_F,
> Modrm|CheckOperandSize|NoSuf|EVexMap4, {
> +Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
>
> // RAO-INT instructions end.
>
prev parent reply other threads:[~2024-02-18 1:31 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-02-09 8:10 Jan Beulich
2024-02-18 1:31 ` Cui, Lili [this message]
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