RE: [PATCH v4 0/9] Support Intel APX EGPR

["Cui, Lili" <lili.cui@intel.com>]

> On 19.12.2023 13:12, Cui, Lili wrote:
> > *** BLURB HERE ***
> > Future optimizations to be made.
> > 1. The current implementation of vexvvvvv needs to be optimized.
> > 2. The handling of double VEX/EVEX templates in check_register() needs to
> be optimized.
> 
> I hope this is just stale here, and the dependency on templates was now
> removed again from check_register().
> 
> Jan
> 

In fact, I didn't remove it in V4, I didn't find a better place to deal with it. I don't know if you agree with this implementation below.

/* For dual VEX/EVEX templates, evex encoding is required when the input has
   egpr.*/
static INLINE void
vex_with_Egpr_requires_evex_encoding (const insn_template *t)
{
  for (unsigned int op = 0; op < i.operands; op++)
    {
      if (i.types[op].bitfield.class != Reg)
        continue;

      if (i.op[op].regs->reg_flags & RegRex2)
        i.vec_encoding = vex_encoding_evex;
    }

  if ((i.index_reg && (i.index_reg->reg_flags & RegRex2))
      || (i.base_reg && (i.base_reg->reg_flags & RegRex2)))
    i.vec_encoding = vex_encoding_evex;
}

static INLINE void
install_template (const insn_template *t)
{
  unsigned int l;

  i.tm = *t;

  /* Dual VEX/EVEX templates need stripping one of the possible variants.  */
  if (t->opcode_modifier.vex && t->opcode_modifier.evex)
    {
      vex_with_Egpr_requires_evex_encoding (t);


Regards,
Lili.