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From: Alan Modra <amodra@gmail.com>
To: Mark Harmstone <mark@harmstone.com>
Cc: binutils@sourceware.org
Subject: Re: Correct ld-pe/aarch64.d test output
Date: Wed, 18 Jan 2023 16:21:56 +1030	[thread overview]
Message-ID: <Y8eI/MuPBKpmNalz@squeak.grove.modra.org> (raw)
In-Reply-To: <7a7c6672-63ff-ce28-25c2-0f6867565096@harmstone.com>

On Wed, Jan 18, 2023 at 04:35:49AM +0000, Mark Harmstone wrote:
> Thanks Alan, I'll have a look. I've tested it with llvm-mc and lld, and it does match what you've got there.
> 
> The object files were the same, except that llvm-mc doesn't issue relocations for relative jumps within the same file. So it's a linking problem rather than an assembling problem.
> 
> > Is is really a sensible addend with no symbol value confounding?
> 
> Sorry, could you please explain what you mean by this? I'm not sure what "confounding" means in this context.

I mean that many older COFF targets install a combination of the
symbol value and addend in the insn field, almost as if the insn has
been relocated as it would be on final linking, using symbol values as
they are in the relocatable object file.  So the section contents
don't just have the relocation addend if the relocation is against
symbols defined in that object.  What do existing PE assemblers do in
that case?

See the comment I added recently to bfd/coffcode.h above CALC_ADDEND,
and notice the subtraction of symbol section vma and symbol value in
that macro.

-- 
Alan Modra
Australia Development Lab, IBM

      reply	other threads:[~2023-01-18  5:52 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-01-16 13:29 Alan Modra
2023-01-18  4:35 ` Mark Harmstone
2023-01-18  5:51   ` Alan Modra [this message]

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