From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pj1-x1035.google.com (mail-pj1-x1035.google.com [IPv6:2607:f8b0:4864:20::1035]) by sourceware.org (Postfix) with ESMTPS id D4C33383468C for ; Tue, 28 Jun 2022 03:31:49 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org D4C33383468C Received: by mail-pj1-x1035.google.com with SMTP id d14so11286382pjs.3 for ; Mon, 27 Jun 2022 20:31:49 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:from:to:subject:message-id:mime-version :content-disposition; bh=L9205Vr0/cS3cO9/JVVbKEYWCZheFPd5aDlkCXHmVSY=; b=Tf+OcBcYoWRM9iD/OdUd1TOO49lOMPw0lr0LCwMu6iJfYgzj1/Up2gAV/kEt8N6/DR fj6DomTb/e5kxxGPRldTz9r+y5ndxVqCLk5K4HiBVyO5euSr3P59OG+8+UmjXWHTj9Bl xwijB6S/oRCI+mQz0O0EM/atuCumEnF2EuoT+e59/g3Fgds/H9WNqWbXBhAM+X2o1NU5 kbTb6VFjrX4nJ4lA42ZOFEMkTNJ5xJfMNv+DkjyR7l7fnJviB1gHuh0K3suz81NuXRav NiRZ3MPXS4UEIJU5IF3cxXrarfj00H7XtTnG3IgwqZn0WuNWNISVZhzc4SsGMf0Tp2Fb FGMQ== X-Gm-Message-State: AJIora+iQU3yqQxI9mAxZvMH2WuZrMJ2f5dlaRWoYAzpDBS96uERZRml 5Dm56961+96hmLWVfLHMDGsADnaIqZw= X-Google-Smtp-Source: AGRyM1sPtQQO0pLPLf/KSO5NQXZcG2bmAnetMNDFxFgBfSbuaj3Ve2oh7hm0eLuI2ZPgpYwzROVC7w== X-Received: by 2002:a17:903:22d0:b0:16a:3039:adc9 with SMTP id y16-20020a17090322d000b0016a3039adc9mr2741416plg.32.1656387108241; Mon, 27 Jun 2022 20:31:48 -0700 (PDT) Received: from squeak.grove.modra.org ([2406:3400:51d:8cc0:ff85:b5f6:bac4:e58f]) by smtp.gmail.com with ESMTPSA id q11-20020a170902dacb00b001635b86a790sm8116200plx.44.2022.06.27.20.31.47 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Jun 2022 20:31:47 -0700 (PDT) Received: by squeak.grove.modra.org (Postfix, from userid 1000) id 45E31114047D; Tue, 28 Jun 2022 13:01:45 +0930 (ACST) Date: Tue, 28 Jun 2022 13:01:45 +0930 From: Alan Modra To: binutils@sourceware.org Subject: PowerPC64: align plt_branch stubs Message-ID: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline X-Spam-Status: No, score=-3036.3 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 28 Jun 2022 03:31:52 -0000 plt_branch stubs are similar to plt_call stubs in that they branch via bctr. Align them too. bfd/ * elf64-ppc.c (ppc_size_one_stub): Align plt_branch stubs as for plt_call stubs. ld/ * testsuite/ld-powerpc/elfv2exe.d: Adjust for plt_branch changes. * testsuite/ld-powerpc/notoc.d: Likewise. * testsuite/ld-powerpc/notoc.wf: Likewise. * testsuite/ld-powerpc/notoc3.d: Likewise. * testsuite/ld-powerpc/pr23937.d: Likewise. diff --git a/bfd/elf64-ppc.c b/bfd/elf64-ppc.c index 202c941515d..77e8f596d15 100644 --- a/bfd/elf64-ppc.c +++ b/bfd/elf64-ppc.c @@ -12393,6 +12393,8 @@ ppc_size_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg) if (PPC_LO (r2off) != 0) size += 4; } + pad = plt_stub_pad (htab->params->plt_stub_align, stub_offset, size); + stub_offset += pad; } else if (info->emitrelocations) { @@ -12415,6 +12417,38 @@ ppc_size_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg) odd = off & 4; off = targ - off; + if (stub_entry->type.sub == ppc_stub_notoc) + extra = size_power10_offset (off, odd); + else + extra = size_offset (off - 8); + /* Include branch insn plus those in the offset sequence. */ + size += 4 + extra; + + /* If the branch can't reach, use a plt_branch. + The branch insn is at the end, or "extra" bytes along. So + its offset will be "extra" bytes less that that already + calculated. */ + if (off - extra + (1 << 25) >= (bfd_vma) (1 << 26)) + { + stub_entry->type.main = ppc_stub_plt_branch; + size += 4; + pad = plt_stub_pad (htab->params->plt_stub_align, stub_offset, size); + if (pad != 0) + { + stub_offset += pad; + off -= pad; + odd ^= pad & 4; + size -= extra; + if (stub_entry->type.sub == ppc_stub_notoc) + extra = size_power10_offset (off, odd); + else + extra = size_offset (off - 8); + size += extra; + } + } + else if (info->emitrelocations) + stub_entry->group->stub_sec->reloc_count +=1; + if (info->emitrelocations) { unsigned int num_rel; @@ -12426,17 +12460,6 @@ ppc_size_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg) stub_entry->group->stub_sec->flags |= SEC_RELOC; } - if (stub_entry->type.sub == ppc_stub_notoc) - extra = size_power10_offset (off, odd); - else - extra = size_offset (off - 8); - /* Include branch insn plus those in the offset sequence. */ - size += 4 + extra; - /* The branch insn is at the end, or "extra" bytes along. So - its offset will be "extra" bytes less that that already - calculated. */ - off -= extra; - if (stub_entry->type.sub != ppc_stub_notoc) { /* After the bcl, lr has been modified so we need to emit @@ -12451,15 +12474,6 @@ ppc_size_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg) stub_entry->group->eh_size += eh_advance_size (delta) + 6; stub_entry->group->lr_restore = lr_used + 8; } - - /* If the branch can't reach, use a plt_branch. */ - if (off + (1 << 25) >= (bfd_vma) (1 << 26)) - { - stub_entry->type.main = ppc_stub_plt_branch; - size += 4; - } - else if (info->emitrelocations) - stub_entry->group->stub_sec->reloc_count +=1; } else if (stub_entry->type.sub >= ppc_stub_notoc) { diff --git a/ld/testsuite/ld-powerpc/elfv2exe.d b/ld/testsuite/ld-powerpc/elfv2exe.d index 586264d449b..330243c2f5d 100644 --- a/ld/testsuite/ld-powerpc/elfv2exe.d +++ b/ld/testsuite/ld-powerpc/elfv2exe.d @@ -12,18 +12,17 @@ Disassembly of section \.text: .*: (e9 8c 7f f0|f0 7f 8c e9) ld r12,32752\(r12\) .*: (7d 89 03 a6|a6 03 89 7d) mtctr r12 .*: (4e 80 04 20|20 04 80 4e) bctr - -0+100000d0 <.*\.plt_branch\.f2>: +#... +0+100000e0 <.*\.plt_branch\.f2>: .*: (3d 82 ff ff|ff ff 82 3d) addis r12,r2,-1 .*: (e9 8c 7f f8|f8 7f 8c e9) ld r12,32760\(r12\) .*: (7d 89 03 a6|a6 03 89 7d) mtctr r12 .*: (4e 80 04 20|20 04 80 4e) bctr -0+100000e0 <.*\.long_branch\.f5>: +0+100000f0 <.*\.long_branch\.f5>: .*: (f8 41 00 18|18 00 41 f8) std r2,24\(r1\) -.*: (48 00 00 6c|6c 00 00 48) b .* - \.\.\. - +.*: (48 00 00 5c|5c 00 00 48) b .* +#... 0+10000100 <(f1|_start)>: .*: (3c 40 10 02|02 10 40 3c) lis r2,4098 .*: (38 42 82 00|00 82 42 38) addi r2,r2,-32256 diff --git a/ld/testsuite/ld-powerpc/notoc.d b/ld/testsuite/ld-powerpc/notoc.d index 69f17217779..972f958e615 100644 --- a/ld/testsuite/ld-powerpc/notoc.d +++ b/ld/testsuite/ld-powerpc/notoc.d @@ -15,7 +15,7 @@ Disassembly of section \.text: .* <.*\.long_branch\.g1>: .*: (18 00 41 f8|f8 41 00 18) std r2,24\(r1\) .*: (8c 00 00 48|48 00 00 8c) b .* - +#... .* <.*\.plt_branch\.ext>: .*: (a6 02 88 7d|7d 88 02 a6) mflr r12 .*: (05 00 9f 42|42 9f 00 05) bcl .* @@ -25,7 +25,7 @@ Disassembly of section \.text: .*: (ff ff 8c 61|61 8c ff ff) ori r12,r12,65535 .*: (c6 07 9c 79|79 9c 07 c6) sldi r28,r12,32 .*: (ff ef 8c 65|65 8c ef ff) oris r12,r12,61439 -.*: (28 ff 8c 61|61 8c ff 28) ori r12,r12,65320 +.*: (18 ff 8c 61|61 8c ff 18) ori r12,r12,65304 .*: (14 62 8b 7d|7d 8b 62 14) add r12,r11,r12 .*: (a6 03 89 7d|7d 89 03 a6) mtctr r12 .*: (20 04 80 4e|4e 80 04 20) bctr @@ -35,58 +35,57 @@ Disassembly of section \.text: .*: (05 00 9f 42|42 9f 00 05) bcl .* .*: (a6 02 68 7d|7d 68 02 a6) mflr r11 .*: (a6 03 88 7d|7d 88 03 a6) mtlr r12 -.*: (64 00 8b 39|39 8b 00 64) addi r12,r11,100 -.*: (58 00 00 48|48 00 00 58) b .* +.*: (54 00 8b 39|39 8b 00 54) addi r12,r11,84 +.*: (.. .. 00 48|48 00 .. ..) b .* .* <.*\.long_branch\.g2>: .*: (a6 02 88 7d|7d 88 02 a6) mflr r12 .*: (05 00 9f 42|42 9f 00 05) bcl .* .*: (a6 02 68 7d|7d 68 02 a6) mflr r11 .*: (a6 03 88 7d|7d 88 03 a6) mtlr r12 -.*: (80 00 8b 39|39 8b 00 80) addi r12,r11,128 -.*: (74 00 00 48|48 00 00 74) b .* - \.\.\. - +.*: (70 00 8b 39|39 8b 00 70) addi r12,r11,112 +.*: (.. .. 00 48|48 00 .. ..) b .* +#... .* : .*: (01 00 00 48|48 00 00 01) bl .* -.*: (bd ff ff 4b|4b ff ff bd) bl .* <.*\.long_branch\.f2> -.*: (11 00 00 48|48 00 00 11) bl .* -.*: (cd ff ff 4b|4b ff ff cd) bl .* <.*\.long_branch\.g2> -.*: (81 ff ff 4b|4b ff ff 81) bl .* <.*\.plt_branch\.ext> +.*: (.. .. ff 4b|4b ff .. ..) bl .* <.*\.long_branch\.f2> +.*: (.. .. 00 48|48 00 .. ..) bl .* +.*: (.. .. ff 4b|4b ff .. ..) bl .* <.*\.long_branch\.g2> +.*: (.. .. ff 4b|4b ff .. ..) bl .* <.*\.plt_branch\.ext> .*: (20 00 80 4e|4e 80 00 20) blr .* : -.*: (a9 ff ff 4b|4b ff ff a9) bl .* <.*\.long_branch\.f2> -.*: (e5 ff ff 4b|4b ff ff e5) bl .* -.*: (b9 ff ff 4b|4b ff ff b9) bl .* <.*\.long_branch\.g2> -.*: (f5 ff ff 4b|4b ff ff f5) bl .* +.*: (.. .. ff 4b|4b ff .. ..) bl .* <.*\.long_branch\.f2> +.*: (.. .. ff 4b|4b ff .. ..) bl .* +.*: (.. .. ff 4b|4b ff .. ..) bl .* <.*\.long_branch\.g2> +.*: (.. .. ff 4b|4b ff .. ..) bl .* .*: (20 00 80 4e|4e 80 00 20) blr .* : .*: (01 10 40 3c|3c 40 10 01) lis r2,4097 .*: (00 80 42 38|38 42 80 00) addi r2,r2,-32768 -.*: (4d ff ff 4b|4b ff ff 4d) bl .* <.*\.long_branch\.f1> +.*: (.. .. ff 4b|4b ff .. ..) bl .* <.*\.long_branch\.f1> .*: (18 00 41 e8|e8 41 00 18) ld r2,24\(r1\) -.*: (f9 ff ff 4b|4b ff ff f9) bl .* +.*: (.. .. ff 4b|4b ff .. ..) bl .* .*: (00 00 00 60|60 00 00 00) nop -.*: (45 ff ff 4b|4b ff ff 45) bl .* <.*\.long_branch\.g1> +.*: (.. .. ff 4b|4b ff .. ..) bl .* <.*\.long_branch\.g1> .*: (18 00 41 e8|e8 41 00 18) ld r2,24\(r1\) -.*: (1d 00 00 48|48 00 00 1d) bl .* +.*: (.. .. 00 48|48 00 .. ..) bl .* .*: (00 00 00 60|60 00 00 00) nop -.*: (3d ff ff 4b|4b ff ff 3d) bl .* <.*\.plt_branch\.ext> +.*: (.. .. ff 4b|4b ff .. ..) bl .* <.*\.plt_branch\.ext> .*: (00 00 00 60|60 00 00 00) nop .*: (20 00 80 4e|4e 80 00 20) blr .* : .*: (01 10 40 3c|3c 40 10 01) lis r2,4097 .*: (00 80 42 38|38 42 80 00) addi r2,r2,-32768 -.*: (cd ff ff 4b|4b ff ff cd) bl .* +.*: (.. .. ff 4b|4b ff .. ..) bl .* .*: (00 00 00 60|60 00 00 00) nop -.*: (11 ff ff 4b|4b ff ff 11) bl .* <.*\.long_branch\.f1> +.*: (.. .. ff 4b|4b ff .. ..) bl .* <.*\.long_branch\.f1> .*: (18 00 41 e8|e8 41 00 18) ld r2,24\(r1\) -.*: (f1 ff ff 4b|4b ff ff f1) bl .* +.*: (.. .. ff 4b|4b ff .. ..) bl .* .*: (00 00 00 60|60 00 00 00) nop -.*: (09 ff ff 4b|4b ff ff 09) bl .* <.*\.long_branch\.g1> +.*: (.. .. ff 4b|4b ff .. ..) bl .* <.*\.long_branch\.g1> .*: (18 00 41 e8|e8 41 00 18) ld r2,24\(r1\) .*: (20 00 80 4e|4e 80 00 20) blr diff --git a/ld/testsuite/ld-powerpc/notoc.wf b/ld/testsuite/ld-powerpc/notoc.wf index 208d676f442..00bef4c6a2d 100644 --- a/ld/testsuite/ld-powerpc/notoc.wf +++ b/ld/testsuite/ld-powerpc/notoc.wf @@ -11,17 +11,17 @@ Contents of the \.eh_frame section: DW_CFA_def_cfa: r1 ofs 0 00000014 0000000000000024 00000018 FDE cie=00000000 pc=00000000100000c0\.\.0000000010000140 - DW_CFA_advance_loc: 24 to 00000000100000d8 + DW_CFA_advance_loc: 40 to 00000000100000e8 DW_CFA_register: r65 in r12 - DW_CFA_advance_loc: 8 to 00000000100000e0 + DW_CFA_advance_loc: 8 to 00000000100000f0 DW_CFA_restore_extended: r65 - DW_CFA_advance_loc: 40 to 0000000010000108 + DW_CFA_advance_loc: 40 to 0000000010000118 DW_CFA_register: r65 in r12 - DW_CFA_advance_loc: 8 to 0000000010000110 + DW_CFA_advance_loc: 8 to 0000000010000120 DW_CFA_restore_extended: r65 - DW_CFA_advance_loc: 16 to 0000000010000120 + DW_CFA_advance_loc: 16 to 0000000010000130 DW_CFA_register: r65 in r12 - DW_CFA_advance_loc: 8 to 0000000010000128 + DW_CFA_advance_loc: 8 to 0000000010000138 DW_CFA_restore_extended: r65 DW_CFA_nop DW_CFA_nop diff --git a/ld/testsuite/ld-powerpc/notoc3.d b/ld/testsuite/ld-powerpc/notoc3.d index 24cf9bb19c0..dfb10ef2ac9 100644 --- a/ld/testsuite/ld-powerpc/notoc3.d +++ b/ld/testsuite/ld-powerpc/notoc3.d @@ -14,12 +14,12 @@ Disassembly of section \.text: .* <.*\.long_branch\.g1>: .*: (18 00 41 f8|f8 41 00 18) std r2,24\(r1\) .*: (.. .. 00 48|48 00 .. ..) b .* - +#... .* <.*\.plt_branch\.ext>: .*: (00 20 60 3d|3d 60 20 00) lis r11,8192 .*: (00 00 6b 61|61 6b 00 00) ori r11,r11,0 -.*: (ff ef 13 06|06 13 ef ff) pla r12,-268435736 # 0 -.*: (e8 fe 80 39|39 80 fe e8) +.*: (ff ef 13 06|06 13 ef ff) pla r12,-268435752 # 0 +.*: (d8 fe 80 39|39 80 fe d8) .*: (46 17 6b 79|79 6b 17 46) sldi r11,r11,34 .*: (14 62 8b 7d|7d 8b 62 14) add r12,r11,r12 .*: (a6 03 89 7d|7d 89 03 a6) mtctr r12 @@ -30,17 +30,16 @@ Disassembly of section \.text: .* <.*\.long_branch\.f2>: .*: (00 00 00 60|60 00 00 00) nop -.*: (00 00 10 06|06 10 00 00) pla r12,108 # .* -.*: (6c 00 80 39|39 80 00 6c) +.*: (00 00 10 06|06 10 00 00) pla r12,92 # .* +.*: (5c 00 80 39|39 80 00 5c) .*: (.. .. 00 48|48 00 .. ..) b .* .* <.*\.long_branch\.g2>: .*: (00 00 00 60|60 00 00 00) nop -.*: (00 00 10 06|06 10 00 00) pla r12,144 # .* -.*: (90 00 80 39|39 80 00 90) +.*: (00 00 10 06|06 10 00 00) pla r12,128 # .* +.*: (80 00 80 39|39 80 00 80) .*: (.. .. 00 48|48 00 .. ..) b .* #... - .* : .*: (01 00 00 48|48 00 00 01) bl .* .*: (.. .. ff 4b|4b ff .. ..) bl .* <.*\.long_branch\.f2> diff --git a/ld/testsuite/ld-powerpc/pr23937.d b/ld/testsuite/ld-powerpc/pr23937.d index 6ef79e81cf6..4610c28dac1 100644 --- a/ld/testsuite/ld-powerpc/pr23937.d +++ b/ld/testsuite/ld-powerpc/pr23937.d @@ -4,7 +4,7 @@ # Check that the IRELATIVE addend is magic+0, not magic+8 #... -.* R_PPC64_IRELATIVE +10000180 +.* R_PPC64_IRELATIVE +100001a0 #... -.*: 0+10000180 +20 IFUNC +LOCAL +DEFAULT .* magic +.*: 0+100001a0 +20 IFUNC +LOCAL +DEFAULT .* magic #pass -- Alan Modra Australia Development Lab, IBM