From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pg1-x535.google.com (mail-pg1-x535.google.com [IPv6:2607:f8b0:4864:20::535]) by sourceware.org (Postfix) with ESMTPS id D46C43858C74 for ; Wed, 23 Aug 2023 03:16:05 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org D46C43858C74 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-pg1-x535.google.com with SMTP id 41be03b00d2f7-564cd28d48dso2987405a12.0 for ; Tue, 22 Aug 2023 20:16:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1692760565; x=1693365365; h=in-reply-to:content-disposition:mime-version:references:message-id :subject:cc:to:from:date:from:to:cc:subject:date:message-id:reply-to; bh=oWeEK+v+GlGFU2w4sr8M8DSwdbI2tI9Jg65/WHaRC5o=; b=GfP1S97QMNxyxvXpyAboKWln6tUpQfn2gGaqjErv0+XAHTLne6WDl/Am6EmLXC+uvq U20OEVkKGp7jC8Bugn21dXcreiOg+4mjT9jCc3Mr/n0GbZF/EEWg9exYTNzhMdlsc8d/ RMgbwlLGkuC2EswymBTiaXkkhbY3erutG/DXKSSgLwzurJofff1dinQXKgnM2plCu3ko GI410g530sFuayeYnksIXifR5r+SPli3HlYtxYVogVkdRjSOQHNc80fn2f65Wpf3rgu8 WUUHWFh7AhxO/Up53YlSttsHyTAUWc073oAdOdViUL2ZRWrsM6eTHHmTD3lyPHVC0B0/ Ds7w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1692760565; x=1693365365; h=in-reply-to:content-disposition:mime-version:references:message-id :subject:cc:to:from:date:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=oWeEK+v+GlGFU2w4sr8M8DSwdbI2tI9Jg65/WHaRC5o=; b=frLjNfEHjybc3yyMcbJUqzOtWx9y04qQJdd0Gi9t67g+kIk58ZixmeTK88y3SKTtE+ yJjYp2FD1BmcvXQS194tUX7eK6eX3F7B+xXJ8K4Y9V1pkYuef8Oooc1cYrVrAL8KUi7Y /h+CAS5Mciw+HNdi3URpYQip8KdFIC66cw6ZG5U1Iy4lMyqhE0tSgUDaZL0yk5sleJ+N RMz5JbFofUvFNT9++8Tyc/gMPnR5X7yFcBvR47K/mhuREnLx8uPt17aewCGTdGXrmqLK bwZYGdN/IflDzDG2MBSQGOySHDGUHhzu0iqh0vYapNg50I/HmT9BVSkWybHqErBUCQHV MAkA== X-Gm-Message-State: AOJu0YxlTGsSiyx+fO5m/OUcr/sM6eD38XMKnIDZO7WTLSyPQ8vQ4oXX 71RSEY2a3cmGlnZg7oo7fCjBr7tZsTGCDQ== X-Google-Smtp-Source: AGHT+IHdefM0WPZZCzuTtaTkrSX8KY6IVDTB9aMtbpMgQPLbG8zwIOQFPS9rGYY5kFVWUgqW+AfiZg== X-Received: by 2002:a17:90b:4b4f:b0:26d:d81:82fb with SMTP id mi15-20020a17090b4b4f00b0026d0d8182fbmr7730978pjb.29.1692760564585; Tue, 22 Aug 2023 20:16:04 -0700 (PDT) Received: from squeak.grove.modra.org ([2406:3400:51d:8cc0:ead0:eed5:cfa5:cc5d]) by smtp.gmail.com with ESMTPSA id w59-20020a17090a6bc100b002682392506bsm9191986pjj.50.2023.08.22.20.16.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 22 Aug 2023 20:16:04 -0700 (PDT) Received: by squeak.grove.modra.org (Postfix, from userid 1000) id 63BA711423E0; Wed, 23 Aug 2023 12:46:01 +0930 (ACST) Date: Wed, 23 Aug 2023 12:46:01 +0930 From: Alan Modra To: Paul Iannetta Cc: binutils@sourceware.org Subject: Re: [PATCH] kvx: fix 32-bit build and validation Message-ID: References: <20230822160142.ocnjgkuboicpncii@ws2202.lin.mbt.kalray.eu> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20230822160142.ocnjgkuboicpncii@ws2202.lin.mbt.kalray.eu> X-Spam-Status: No, score=-3033.7 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,GIT_PATCH_0,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: I've committed this part of your patch, with a small fix to targets.c needed to get a successful 32-bit host --enable-targets=all build. bfd/ * Makefile.am: Move elf32-kvx.lo from BFD32_BACKENDS to BFD64_BACKENDS. Remove elfxx-kvx.lo from BFD32_BACKENDS. Remove elfxx-kvx.c from BFD32_BACKENDS_CFILES. * Makefile.in: Regenerate. * config.bfd: Adjust targ_defvec and targ_selvecs and gate them behind BFD64. * configure.ac: Add target_size=64 to kvx_elf64_*vec. * configure: Regenerate. * elfnn-kvx.c (elfNN_kvx_stub_name): Cast rel->r_addend to uint64_t to match format string. (elfNN_kvx_relocate_section): Similarly for r_offset, and use PRIx64 in format string. * targets.c (_bfd_target_vector ): Move inside #ifdef BFD64. ld/ * Makefile.am: Move eelf32kvx.c from ALL_EMULATION_SOURCES to ALL_64_EMULATION_SOURCES. * Makefile.in: Regenerate. diff --git a/bfd/Makefile.am b/bfd/Makefile.am index 8b0761db582..378c13198d6 100644 --- a/bfd/Makefile.am +++ b/bfd/Makefile.am @@ -318,7 +318,6 @@ BFD32_BACKENDS = \ elf32-i386.lo \ elf32-ip2k.lo \ elf32-iq2000.lo \ - elf32-kvx.lo \ elf32-lm32.lo \ elf32-m32c.lo \ elf32-m32r.lo \ @@ -359,7 +358,6 @@ BFD32_BACKENDS = \ elf32-z80.lo \ elf32.lo \ elflink.lo \ - elfxx-kvx.lo \ elfxx-sparc.lo \ elfxx-tilegx.lo \ elfxx-x86.lo \ @@ -495,7 +493,6 @@ BFD32_BACKENDS_CFILES = \ elf32-z80.c \ elf32.c \ elflink.c \ - elfxx-kvx.c \ elfxx-sparc.c \ elfxx-tilegx.c \ elfxx-x86.c \ @@ -549,6 +546,7 @@ BFD64_BACKENDS = \ coff64-rs6000.lo \ elf32-aarch64.lo \ elf32-ia64.lo \ + elf32-kvx.lo \ elf32-loongarch.lo \ elf32-mips.lo \ elf32-riscv.lo \ diff --git a/bfd/Makefile.in b/bfd/Makefile.in index cca093e1fef..bb530271fca 100644 --- a/bfd/Makefile.in +++ b/bfd/Makefile.in @@ -774,7 +774,6 @@ BFD32_BACKENDS = \ elf32-i386.lo \ elf32-ip2k.lo \ elf32-iq2000.lo \ - elf32-kvx.lo \ elf32-lm32.lo \ elf32-m32c.lo \ elf32-m32r.lo \ @@ -815,7 +814,6 @@ BFD32_BACKENDS = \ elf32-z80.lo \ elf32.lo \ elflink.lo \ - elfxx-kvx.lo \ elfxx-sparc.lo \ elfxx-tilegx.lo \ elfxx-x86.lo \ @@ -951,7 +949,6 @@ BFD32_BACKENDS_CFILES = \ elf32-z80.c \ elf32.c \ elflink.c \ - elfxx-kvx.c \ elfxx-sparc.c \ elfxx-tilegx.c \ elfxx-x86.c \ @@ -1006,6 +1003,7 @@ BFD64_BACKENDS = \ coff64-rs6000.lo \ elf32-aarch64.lo \ elf32-ia64.lo \ + elf32-kvx.lo \ elf32-loongarch.lo \ elf32-mips.lo \ elf32-riscv.lo \ diff --git a/bfd/config.bfd b/bfd/config.bfd index 30927bdbe23..2a4622219ba 100644 --- a/bfd/config.bfd +++ b/bfd/config.bfd @@ -804,14 +804,13 @@ case "${targ}" in targ_selvecs=kvx_elf32_vec want64=true ;; -#endif kvx-*-*) - targ_defvec=kvx_elf32_vec -#ifdef BFD64 - targ64_selvecs=kvx_elf64_vec -#endif + targ_defvec=kvx_elf64_vec + targ_selvecs="kvx_elf64_vec kvx_elf32_vec" + want64=true ;; +#endif lm32-*-elf | lm32-*-rtems*) targ_defvec=lm32_elf32_vec diff --git a/bfd/configure b/bfd/configure index 489531c0a7f..d43754c4787 100755 --- a/bfd/configure +++ b/bfd/configure @@ -13960,8 +13960,8 @@ do ip2k_elf32_vec) tb="$tb elf32-ip2k.lo elf32.lo $elf" ;; iq2000_elf32_vec) tb="$tb elf32-iq2000.lo elf32.lo $elf" ;; kvx_elf32_vec) tb="$tb elf32-kvx.lo elfxx-kvx.lo elf32.lo $elf $ipa" ;; - kvx_elf64_vec) tb="$tb elf64-kvx.lo elfxx-kvx.lo elf64.lo $elf $ipa" ;; - kvx_elf64_linux_vec) tb="$tb elf64-kvx.lo elfxx-kvx.lo elf64.lo $elf $ipa" ;; + kvx_elf64_vec) tb="$tb elf64-kvx.lo elfxx-kvx.lo elf64.lo $elf $ipa"; target_size=64 ;; + kvx_elf64_linux_vec) tb="$tb elf64-kvx.lo elfxx-kvx.lo elf64.lo $elf $ipa"; target_size=64 ;; lm32_elf32_vec) tb="$tb elf32-lm32.lo elf32.lo $elf" ;; lm32_elf32_fdpic_vec) tb="$tb elf32-lm32.lo elf32.lo $elf" ;; loongarch_elf32_vec) tb="$tb elf32-loongarch.lo elfxx-loongarch.lo elf32.lo elf-ifunc.lo $elf" ;; diff --git a/bfd/configure.ac b/bfd/configure.ac index 0d1cd814af6..3fdd12fe22d 100644 --- a/bfd/configure.ac +++ b/bfd/configure.ac @@ -496,8 +496,8 @@ do ip2k_elf32_vec) tb="$tb elf32-ip2k.lo elf32.lo $elf" ;; iq2000_elf32_vec) tb="$tb elf32-iq2000.lo elf32.lo $elf" ;; kvx_elf32_vec) tb="$tb elf32-kvx.lo elfxx-kvx.lo elf32.lo $elf $ipa" ;; - kvx_elf64_vec) tb="$tb elf64-kvx.lo elfxx-kvx.lo elf64.lo $elf $ipa" ;; - kvx_elf64_linux_vec) tb="$tb elf64-kvx.lo elfxx-kvx.lo elf64.lo $elf $ipa" ;; + kvx_elf64_vec) tb="$tb elf64-kvx.lo elfxx-kvx.lo elf64.lo $elf $ipa"; target_size=64 ;; + kvx_elf64_linux_vec) tb="$tb elf64-kvx.lo elfxx-kvx.lo elf64.lo $elf $ipa"; target_size=64 ;; lm32_elf32_vec) tb="$tb elf32-lm32.lo elf32.lo $elf" ;; lm32_elf32_fdpic_vec) tb="$tb elf32-lm32.lo elf32.lo $elf" ;; loongarch_elf32_vec) tb="$tb elf32-loongarch.lo elfxx-loongarch.lo elf32.lo elf-ifunc.lo $elf" ;; diff --git a/bfd/elfnn-kvx.c b/bfd/elfnn-kvx.c index 467d91fea53..95580d19930 100644 --- a/bfd/elfnn-kvx.c +++ b/bfd/elfnn-kvx.c @@ -736,7 +736,7 @@ elfNN_kvx_stub_name (const asection *input_section, snprintf (stub_name, len, "%08x_%s+%" PRIx64 "x", (unsigned int) input_section->id, hash->root.root.root.string, - rel->r_addend); + (uint64_t) rel->r_addend); } else { @@ -747,7 +747,7 @@ elfNN_kvx_stub_name (const asection *input_section, (unsigned int) input_section->id, (unsigned int) sym_sec->id, (unsigned int) ELFNN_R_SYM (rel->r_info), - rel->r_addend); + (uint64_t) rel->r_addend); } return stub_name; @@ -2568,11 +2568,11 @@ elfNN_kvx_relocate_section (bfd *output_bfd, (*_bfd_error_handler) ((sym_type == STT_TLS /* xgettext:c-format */ - ? _("%pB(%pA+%#lx): %s used with TLS symbol %s") + ? _("%pB(%pA+%#" PRIx64 "): %s used with TLS symbol %s") /* xgettext:c-format */ - : _("%pB(%pA+%#lx): %s used with non-TLS symbol %s")), + : _("%pB(%pA+%#" PRIx64 "): %s used with non-TLS symbol %s")), input_bfd, - input_section, (long) rel->r_offset, howto->name, name); + input_section, (uint64_t) rel->r_offset, howto->name, name); } /* Original aarch64 has relaxation handling for TLS here. */ diff --git a/bfd/targets.c b/bfd/targets.c index 210beddaf11..63b3abbd287 100644 --- a/bfd/targets.c +++ b/bfd/targets.c @@ -1130,9 +1130,8 @@ static const bfd_target * const _bfd_target_vector[] = &ip2k_elf32_vec, &iq2000_elf32_vec, - &kvx_elf32_vec, - #ifdef BFD64 + &kvx_elf32_vec, &kvx_elf64_vec, #endif diff --git a/ld/Makefile.am b/ld/Makefile.am index 07fac968bb7..be456275748 100644 --- a/ld/Makefile.am +++ b/ld/Makefile.am @@ -237,7 +237,6 @@ ALL_EMULATION_SOURCES = \ eelf32ip2k.c \ eelf32iq10.c \ eelf32iq2000.c \ - eelf32kvx.c \ eelf32lm32.c \ eelf32lm32fd.c \ eelf32lppc.c \ @@ -408,6 +407,7 @@ ALL_64_EMULATION_SOURCES = \ eelf32ebmipvxworks.c \ eelf32elmip.c \ eelf32elmipvxworks.c \ + eelf32kvx.c \ eelf32l4300.c \ eelf32lmip.c \ eelf32loongarch.c \ diff --git a/ld/Makefile.in b/ld/Makefile.in index a2aa54b69d8..c6a79774f38 100644 --- a/ld/Makefile.in +++ b/ld/Makefile.in @@ -738,7 +738,6 @@ ALL_EMULATION_SOURCES = \ eelf32ip2k.c \ eelf32iq10.c \ eelf32iq2000.c \ - eelf32kvx.c \ eelf32lm32.c \ eelf32lm32fd.c \ eelf32lppc.c \ @@ -908,6 +907,7 @@ ALL_64_EMULATION_SOURCES = \ eelf32ebmipvxworks.c \ eelf32elmip.c \ eelf32elmipvxworks.c \ + eelf32kvx.c \ eelf32l4300.c \ eelf32lmip.c \ eelf32loongarch.c \ -- Alan Modra Australia Development Lab, IBM