From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx0b-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) by sourceware.org (Postfix) with ESMTPS id 244A6380FAFA for ; Wed, 7 Dec 2022 18:08:05 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 244A6380FAFA Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=linux.ibm.com Received: from pps.filterd (m0098417.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 2B7GkfTC001717 for ; Wed, 7 Dec 2022 18:08:04 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=message-id : date : mime-version : to : from : subject : content-type : content-transfer-encoding; s=pp1; bh=ICcTuOqXOcJbwJSkW63biEybU7JDmzlXqgAx1ADyFa0=; b=c5EN0iNjcof7NpfiGqjCrBqtZNiNUnwMDkHzag93posAWBr7Fg3MUNrhuo3u9l8Xjl5+ ABroJHFLFOPAymb2smi4QF5zEeVOd86rOTC76tPFtZVn289Eg65VqoqcMXF5Qb81+AGV bS0CThNpN/qa9C6WuDrq7AmHwlhMqQSPJ94eS5BKoj2zR1ntOUTRG71Jn4wAg+M2ncXb SfDDl6xqGxtZgq0a/f5eyVOGF52vBPR7jiZom4FDjc7WYOD6X/mYopVVHrMlIc9IqWOS CigZjV79HnU820R20mz5+0knAeBYTSPHyJvxQ4Gfg+PteHjFhgTjVOi1++qfCMyuA3Zt FQ== Received: from ppma03dal.us.ibm.com (b.bd.3ea9.ip4.static.sl-reverse.com [169.62.189.11]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 3maxnat83h-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT) for ; Wed, 07 Dec 2022 18:08:04 +0000 Received: from pps.filterd (ppma03dal.us.ibm.com [127.0.0.1]) by ppma03dal.us.ibm.com (8.17.1.19/8.17.1.19) with ESMTP id 2B7HHTNq032275 for ; Wed, 7 Dec 2022 18:08:03 GMT Received: from smtprelay07.wdc07v.mail.ibm.com ([9.208.129.116]) by ppma03dal.us.ibm.com (PPS) with ESMTPS id 3m9nkughjv-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT) for ; Wed, 07 Dec 2022 18:08:03 +0000 Received: from smtpav04.dal12v.mail.ibm.com (smtpav04.dal12v.mail.ibm.com [10.241.53.103]) by smtprelay07.wdc07v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 2B7I81R962390728 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK) for ; Wed, 7 Dec 2022 18:08:02 GMT Received: from smtpav04.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id A81895805A for ; Wed, 7 Dec 2022 18:08:01 +0000 (GMT) Received: from smtpav04.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 6CD3158064 for ; Wed, 7 Dec 2022 18:08:01 +0000 (GMT) Received: from [9.160.187.177] (unknown [9.160.187.177]) by smtpav04.dal12v.mail.ibm.com (Postfix) with ESMTP for ; Wed, 7 Dec 2022 18:08:01 +0000 (GMT) Message-ID: Date: Wed, 7 Dec 2022 12:08:00 -0600 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:102.0) Gecko/20100101 Thunderbird/102.5.1 Content-Language: en-US To: Binutils From: Peter Bergner Subject: [COMMITTED] PowerPC: Add support for RFC02655 - Saturating Subtract Instruction Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: no53HHkEl1L85L6D5ga4BriYLlLrSyDP X-Proofpoint-GUID: no53HHkEl1L85L6D5ga4BriYLlLrSyDP X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.923,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-12-07_09,2022-12-07_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 bulkscore=0 adultscore=0 impostorscore=0 mlxscore=0 suspectscore=0 priorityscore=1501 phishscore=0 spamscore=0 mlxlogscore=912 malwarescore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2210170000 definitions=main-2212070155 X-Spam-Status: No, score=-10.9 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,GIT_PATCH_0,RCVD_IN_MSPIKE_H2,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: The following patch adds support for Power RFC02655 - Saturating Subtract Instruction. When or if this will ever show up in hardware is not determined or guaranteed, therefore this is enabled using the -mfuture gas option. Peter opcodes/ * ppc-opc.c (XOL): New define. (XOL_MASK): Likewise. (powerpc_opcodes): Add subfus, subfus., subwus, subwus., subdus, subdus. gas/ * testsuite/gas/ppc/rfc02655.s: New test. * testsuite/gas/ppc/rfc02655.d: Likewise * testsuite/gas/ppc/future-raw.s: Likewise. * testsuite/gas/ppc/future-raw.d: Likewise. * testsuite/gas/ppc/ppc.exp: Run them. --- gas/testsuite/gas/ppc/future-raw.d | 15 +++++++++++++++ gas/testsuite/gas/ppc/future-raw.s | 6 ++++++ gas/testsuite/gas/ppc/ppc.exp | 2 ++ gas/testsuite/gas/ppc/rfc02655.d | 19 +++++++++++++++++++ gas/testsuite/gas/ppc/rfc02655.s | 10 ++++++++++ opcodes/ppc-opc.c | 9 +++++++++ 6 files changed, 61 insertions(+) create mode 100644 gas/testsuite/gas/ppc/future-raw.d create mode 100644 gas/testsuite/gas/ppc/future-raw.s create mode 100644 gas/testsuite/gas/ppc/rfc02655.d create mode 100644 gas/testsuite/gas/ppc/rfc02655.s diff --git a/gas/testsuite/gas/ppc/future-raw.d b/gas/testsuite/gas/ppc/future-raw.d new file mode 100644 index 00000000000..c6e71a6f95b --- /dev/null +++ b/gas/testsuite/gas/ppc/future-raw.d @@ -0,0 +1,15 @@ +#as: -mfuture +#objdump: -dr -Mfuture -Mraw +#name: Future tests - raw disassembly + +.* + + +Disassembly of section \.text: + +0+0 <_start>: +.*: (90 58 4c 7d|7d 4c 58 90) subfus r10,0,r12,r11 +.*: (91 58 4c 7d|7d 4c 58 91) subfus\. r10,0,r12,r11 +.*: (90 ac 96 7e|7e 96 ac 90) subfus r20,1,r22,r21 +.*: (91 ac 96 7e|7e 96 ac 91) subfus\. r20,1,r22,r21 +#pass diff --git a/gas/testsuite/gas/ppc/future-raw.s b/gas/testsuite/gas/ppc/future-raw.s new file mode 100644 index 00000000000..578b0ce1256 --- /dev/null +++ b/gas/testsuite/gas/ppc/future-raw.s @@ -0,0 +1,6 @@ + .text +_start: + subwus 10,11,12 + subwus. 10,11,12 + subdus 20,21,22 + subdus. 20,21,22 diff --git a/gas/testsuite/gas/ppc/ppc.exp b/gas/testsuite/gas/ppc/ppc.exp index 3c593eca805..af890de3faf 100644 --- a/gas/testsuite/gas/ppc/ppc.exp +++ b/gas/testsuite/gas/ppc/ppc.exp @@ -146,8 +146,10 @@ run_dump_test "scalarquad" run_dump_test "rop" run_dump_test "rop-checks" run_dump_test "rfc02653" +run_dump_test "rfc02655" run_dump_test "rfc02656" run_dump_test "rfc02658" +run_dump_test "future-raw" run_dump_test "dcbt" run_dump_test "pr27676" diff --git a/gas/testsuite/gas/ppc/rfc02655.d b/gas/testsuite/gas/ppc/rfc02655.d new file mode 100644 index 00000000000..3a1d0082f50 --- /dev/null +++ b/gas/testsuite/gas/ppc/rfc02655.d @@ -0,0 +1,19 @@ +#as: -mfuture +#objdump: -dr -Mfuture +#name: RFC02655 tests + +.* + + +Disassembly of section \.text: + +0+0 <_start>: +.*: (90 58 4c 7d|7d 4c 58 90) subwus r10,r11,r12 +.*: (90 58 4c 7d|7d 4c 58 90) subwus r10,r11,r12 +.*: (91 58 4c 7d|7d 4c 58 91) subwus\. r10,r11,r12 +.*: (91 58 4c 7d|7d 4c 58 91) subwus\. r10,r11,r12 +.*: (90 ac 96 7e|7e 96 ac 90) subdus r20,r21,r22 +.*: (90 ac 96 7e|7e 96 ac 90) subdus r20,r21,r22 +.*: (91 ac 96 7e|7e 96 ac 91) subdus\. r20,r21,r22 +.*: (91 ac 96 7e|7e 96 ac 91) subdus\. r20,r21,r22 +#pass diff --git a/gas/testsuite/gas/ppc/rfc02655.s b/gas/testsuite/gas/ppc/rfc02655.s new file mode 100644 index 00000000000..b80c34e1ef7 --- /dev/null +++ b/gas/testsuite/gas/ppc/rfc02655.s @@ -0,0 +1,10 @@ + .text +_start: + subfus 10,0,12,11 + subwus 10,11,12 + subfus. 10,0,12,11 + subwus. 10,11,12 + subfus 20,1,22,21 + subdus 20,21,22 + subfus. 20,1,22,21 + subdus. 20,21,22 diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c index e25f1d7702d..112c2c3e760 100644 --- a/opcodes/ppc-opc.c +++ b/opcodes/ppc-opc.c @@ -3704,6 +3704,8 @@ const struct powerpc_operand powerpc_operands[] = #define BO16 PSWM /* The pst field in a SVRM form instruction. */ #define pst PSWM + /* The L field in a XO form instruction. */ +#define XOL PSWM { 0x1, 10, 0, 0, 0 }, /* IDX bits for quantization in the pair singles instructions. */ @@ -4775,6 +4777,7 @@ const unsigned int num_powerpc_operands = ARRAY_SIZE (powerpc_operands); | ((((uint64_t)(oe)) & 1) << 10) \ | (((unsigned long)(rc)) & 1)) #define XO_MASK XO (0x3f, 0x1ff, 1, 1) +#define XOL_MASK XO (0x3f, 0x1ff, 0, 1) /* An XO_MASK with the RB field fixed. */ #define XORB_MASK (XO_MASK | RB_MASK) @@ -7212,6 +7215,12 @@ const struct powerpc_opcode powerpc_opcodes[] = { {"td", X(31,68), X_MASK, PPC64, 0, {TO, RA, RB}}, {"lwfcmx", APU(31,71,0), APU_MASK, PPC405, 0, {FCRT, RA, RB}}, +{"subwus", XO(31,72,0,0), XO_MASK, FUTURE, EXT, {RT, RB, RA}}, +{"subwus.", XO(31,72,0,1), XO_MASK, FUTURE, EXT, {RT, RB, RA}}, +{"subdus", XO(31,72,1,0), XO_MASK, FUTURE, EXT, {RT, RB, RA}}, +{"subdus.", XO(31,72,1,1), XO_MASK, FUTURE, EXT, {RT, RB, RA}}, +{"subfus", XO(31,72,0,0), XOL_MASK, FUTURE, 0, {RT, XOL, RA, RB}}, +{"subfus.", XO(31,72,0,1), XOL_MASK, FUTURE, 0, {RT, XOL, RA, RB}}, {"mulhd", XO(31,73,0,0), XO_MASK, PPC64, 0, {RT, RA, RB}}, {"mulhd.", XO(31,73,0,1), XO_MASK, PPC64, 0, {RT, RA, RB}}, -- 2.27.0