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* Rename PowerPC64 pcrel GOT TLS relocations
@ 2020-06-06  5:12 Alan Modra
  2020-06-06  7:21 ` Fangrui Song
       [not found] ` <MWHPR12MB1456E96F004CB70690CB6EE4CB870@MWHPR12MB1456.namprd12.prod.outlook.com>
  0 siblings, 2 replies; 7+ messages in thread
From: Alan Modra @ 2020-06-06  5:12 UTC (permalink / raw)
  To: binutils

These relocations should have had REL in their names, to reflect the
fact that they are pc-relative.  Fix that now by adding _PCREL.
I've added some back-compatibility code to support anyone using
.reloc with the old relocations.

include/
	* elf/ppc64.h (elf_ppc64_reloc_type): Rename
	R_PPC64_GOT_TLSGD34 to R_PPC64_GOT_TLSGD_PCREL34,
	R_PPC64_GOT_TLSLD34 to R_PPC64_GOT_TLSLD_PCREL34,
	R_PPC64_GOT_TPREL34 to R_PPC64_GOT_TPREL_PCREL34, and
	R_PPC64_GOT_DTPREL34 to R_PPC64_GOT_DTPREL_PCREL34.
bfd/
	* reloc.c: Rename
	BFD_RELOC_PPC64_GOT_TLSGD34 to BFD_RELOC_PPC64_GOT_TLSGD_PCREL34,
	BFD_RELOC_PPC64_GOT_TLSLD34 to BFD_RELOC_PPC64_GOT_TLSLD_PCREL34,
	BFD_RELOC_PPC64_GOT_TPREL34 to BFD_RELOC_PPC64_GOT_TPREL_PCREL34,
	BFD_RELOC_PPC64_GOT_DTPREL34 to BFD_RELOC_PPC64_GOT_DTPREL_PCREL34.
	* elf64-ppc.c: Update throughout for reloc renaming.
	(ppc64_elf_reloc_name_lookup): Handle old reloc names.
	* libbfd.h: Regenerate.
	* bfd-in2.h: Regenerate.
gas/
	* config/tc-ppc.c: Update throughout for reloc renaming.
elfcpp/
	* powerpc.h: Rename
	R_PPC64_GOT_TLSGD34 to R_PPC64_GOT_TLSGD_PCREL34,
	R_PPC64_GOT_TLSLD34 to R_PPC64_GOT_TLSLD_PCREL34,
	R_PPC64_GOT_TPREL34 to R_PPC64_GOT_TPREL_PCREL34, and
	R_PPC64_GOT_DTPREL34 to R_PPC64_GOT_DTPREL_PCREL34.
gold/
	* powerpc.cc: Update throughout for reloc renaming.

diff --git a/bfd/elf64-ppc.c b/bfd/elf64-ppc.c
index 769afc5aa5..e28546deb5 100644
--- a/bfd/elf64-ppc.c
+++ b/bfd/elf64-ppc.c
@@ -930,16 +930,16 @@ static reloc_howto_type ppc64_elf_howto_raw[] =
   HOW (R_PPC64_DTPREL34, 4, 34, 0x3ffff0000ffffULL, 0, FALSE, signed,
        ppc64_elf_unhandled_reloc),
 
-  HOW (R_PPC64_GOT_TLSGD34, 4, 34, 0x3ffff0000ffffULL, 0, TRUE, signed,
+  HOW (R_PPC64_GOT_TLSGD_PCREL34, 4, 34, 0x3ffff0000ffffULL, 0, TRUE, signed,
        ppc64_elf_unhandled_reloc),
 
-  HOW (R_PPC64_GOT_TLSLD34, 4, 34, 0x3ffff0000ffffULL, 0, TRUE, signed,
+  HOW (R_PPC64_GOT_TLSLD_PCREL34, 4, 34, 0x3ffff0000ffffULL, 0, TRUE, signed,
        ppc64_elf_unhandled_reloc),
 
-  HOW (R_PPC64_GOT_TPREL34, 4, 34, 0x3ffff0000ffffULL, 0, TRUE, signed,
+  HOW (R_PPC64_GOT_TPREL_PCREL34, 4, 34, 0x3ffff0000ffffULL, 0, TRUE, signed,
        ppc64_elf_unhandled_reloc),
 
-  HOW (R_PPC64_GOT_DTPREL34, 4, 34, 0x3ffff0000ffffULL, 0, TRUE, signed,
+  HOW (R_PPC64_GOT_DTPREL_PCREL34, 4, 34, 0x3ffff0000ffffULL, 0, TRUE, signed,
        ppc64_elf_unhandled_reloc),
 
   HOW (R_PPC64_ADDR16_HIGHER34, 1, 16, 0xffff, 34, FALSE, dont,
@@ -999,8 +999,7 @@ ppc_howto_init (void)
 }
 
 static reloc_howto_type *
-ppc64_elf_reloc_type_lookup (bfd *abfd,
-			     bfd_reloc_code_real_type code)
+ppc64_elf_reloc_type_lookup (bfd *abfd, bfd_reloc_code_real_type code)
 {
   enum elf_ppc64_reloc_type r = R_PPC64_NONE;
 
@@ -1280,13 +1279,13 @@ ppc64_elf_reloc_type_lookup (bfd *abfd,
       break;
     case BFD_RELOC_PPC64_DTPREL34:		r = R_PPC64_DTPREL34;
       break;
-    case BFD_RELOC_PPC64_GOT_TLSGD34:		r = R_PPC64_GOT_TLSGD34;
+    case BFD_RELOC_PPC64_GOT_TLSGD_PCREL34:	r = R_PPC64_GOT_TLSGD_PCREL34;
       break;
-    case BFD_RELOC_PPC64_GOT_TLSLD34:		r = R_PPC64_GOT_TLSLD34;
+    case BFD_RELOC_PPC64_GOT_TLSLD_PCREL34:	r = R_PPC64_GOT_TLSLD_PCREL34;
       break;
-    case BFD_RELOC_PPC64_GOT_TPREL34:		r = R_PPC64_GOT_TPREL34;
+    case BFD_RELOC_PPC64_GOT_TPREL_PCREL34:	r = R_PPC64_GOT_TPREL_PCREL34;
       break;
-    case BFD_RELOC_PPC64_GOT_DTPREL34:		r = R_PPC64_GOT_DTPREL34;
+    case BFD_RELOC_PPC64_GOT_DTPREL_PCREL34:	r = R_PPC64_GOT_DTPREL_PCREL34;
       break;
     case BFD_RELOC_PPC64_ADDR16_HIGHER34:	r = R_PPC64_ADDR16_HIGHER34;
       break;
@@ -1318,16 +1317,33 @@ ppc64_elf_reloc_type_lookup (bfd *abfd,
 };
 
 static reloc_howto_type *
-ppc64_elf_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
-			     const char *r_name)
+ppc64_elf_reloc_name_lookup (bfd *abfd, const char *r_name)
 {
   unsigned int i;
+  static char *compat_map[][2] = {
+    { "R_PPC64_GOT_TLSGD34", "R_PPC64_GOT_TLSGD_PCREL34" },
+    { "R_PPC64_GOT_TLSLD34", "R_PPC64_GOT_TLSLD_PCREL34" },
+    { "R_PPC64_GOT_TPREL34", "R_PPC64_GOT_TPREL_PCREL34" },
+    { "R_PPC64_GOT_DTPREL34", "R_PPC64_GOT_DTPREL_PCREL34" }
+  };
 
   for (i = 0; i < ARRAY_SIZE (ppc64_elf_howto_raw); i++)
     if (ppc64_elf_howto_raw[i].name != NULL
 	&& strcasecmp (ppc64_elf_howto_raw[i].name, r_name) == 0)
       return &ppc64_elf_howto_raw[i];
 
+  /* Handle old names of relocations in case they were used by
+     .reloc directives.
+     FIXME: Remove this soon.  Mapping the reloc names is very likely
+     completely unnecessary.  */
+  for (i = 0; i < ARRAY_SIZE (compat_map); i++)
+    if (strcasecmp (compat_map[i][0], r_name) == 0)
+      {
+	_bfd_error_handler (_("warning: %s should be used rather than %s"),
+			    compat_map[i][1], compat_map[i][0]);
+	return ppc64_elf_reloc_name_lookup (abfd, compat_map[i][1]);
+      }
+
   return NULL;
 }
 
@@ -4584,10 +4600,10 @@ ppc64_elf_check_relocs (bfd *abfd, struct bfd_link_info *info,
 	case R_PPC64_DTPREL34:
 	case R_PPC64_PCREL34:
 	case R_PPC64_GOT_PCREL34:
-	case R_PPC64_GOT_TLSGD34:
-	case R_PPC64_GOT_TLSLD34:
-	case R_PPC64_GOT_TPREL34:
-	case R_PPC64_GOT_DTPREL34:
+	case R_PPC64_GOT_TLSGD_PCREL34:
+	case R_PPC64_GOT_TLSLD_PCREL34:
+	case R_PPC64_GOT_TPREL_PCREL34:
+	case R_PPC64_GOT_DTPREL_PCREL34:
 	case R_PPC64_PLT_PCREL34:
 	case R_PPC64_PLT_PCREL34_NOTOC:
 	case R_PPC64_PCREL28:
@@ -4671,7 +4687,7 @@ ppc64_elf_check_relocs (bfd *abfd, struct bfd_link_info *info,
 	case R_PPC64_GOT_TLSLD16_LO:
 	case R_PPC64_GOT_TLSLD16_HI:
 	case R_PPC64_GOT_TLSLD16_HA:
-	case R_PPC64_GOT_TLSLD34:
+	case R_PPC64_GOT_TLSLD_PCREL34:
 	  tls_type = TLS_TLS | TLS_LD;
 	  goto dogottls;
 
@@ -4679,7 +4695,7 @@ ppc64_elf_check_relocs (bfd *abfd, struct bfd_link_info *info,
 	case R_PPC64_GOT_TLSGD16_LO:
 	case R_PPC64_GOT_TLSGD16_HI:
 	case R_PPC64_GOT_TLSGD16_HA:
-	case R_PPC64_GOT_TLSGD34:
+	case R_PPC64_GOT_TLSGD_PCREL34:
 	  tls_type = TLS_TLS | TLS_GD;
 	  goto dogottls;
 
@@ -4687,7 +4703,7 @@ ppc64_elf_check_relocs (bfd *abfd, struct bfd_link_info *info,
 	case R_PPC64_GOT_TPREL16_LO_DS:
 	case R_PPC64_GOT_TPREL16_HI:
 	case R_PPC64_GOT_TPREL16_HA:
-	case R_PPC64_GOT_TPREL34:
+	case R_PPC64_GOT_TPREL_PCREL34:
 	  if (bfd_link_dll (info))
 	    info->flags |= DF_STATIC_TLS;
 	  tls_type = TLS_TLS | TLS_TPREL;
@@ -4697,7 +4713,7 @@ ppc64_elf_check_relocs (bfd *abfd, struct bfd_link_info *info,
 	case R_PPC64_GOT_DTPREL16_LO_DS:
 	case R_PPC64_GOT_DTPREL16_HI:
 	case R_PPC64_GOT_DTPREL16_HA:
-	case R_PPC64_GOT_DTPREL34:
+	case R_PPC64_GOT_DTPREL_PCREL34:
 	  tls_type = TLS_TLS | TLS_DTPREL;
 	dogottls:
 	  sec->has_tls_reloc = 1;
@@ -8015,7 +8031,7 @@ ppc64_elf_tls_optimize (struct bfd_link_info *info)
 		    {
 		    case R_PPC64_GOT_TLSLD16:
 		    case R_PPC64_GOT_TLSLD16_LO:
-		    case R_PPC64_GOT_TLSLD34:
+		    case R_PPC64_GOT_TLSLD_PCREL34:
 		      expecting_tls_get_addr = 1;
 		      found_tls_get_addr_arg = 1;
 		      /* Fall through.  */
@@ -8036,7 +8052,7 @@ ppc64_elf_tls_optimize (struct bfd_link_info *info)
 
 		    case R_PPC64_GOT_TLSGD16:
 		    case R_PPC64_GOT_TLSGD16_LO:
-		    case R_PPC64_GOT_TLSGD34:
+		    case R_PPC64_GOT_TLSGD_PCREL34:
 		      expecting_tls_get_addr = 1;
 		      found_tls_get_addr_arg = 1;
 		      /* Fall through. */
@@ -8053,7 +8069,7 @@ ppc64_elf_tls_optimize (struct bfd_link_info *info)
 		      tls_type = TLS_TLS | TLS_GD;
 		      break;
 
-		    case R_PPC64_GOT_TPREL34:
+		    case R_PPC64_GOT_TPREL_PCREL34:
 		    case R_PPC64_GOT_TPREL16_DS:
 		    case R_PPC64_GOT_TPREL16_LO_DS:
 		    case R_PPC64_GOT_TPREL16_HI:
@@ -15019,7 +15035,7 @@ ppc64_elf_relocate_section (bfd *output_bfd,
 	    }
 	  break;
 
-	case R_PPC64_GOT_TPREL34:
+	case R_PPC64_GOT_TPREL_PCREL34:
 	  if ((tls_mask & TLS_TLS) != 0
 	      && (tls_mask & TLS_TPREL) == 0)
 	    {
@@ -15212,7 +15228,7 @@ ppc64_elf_relocate_section (bfd *output_bfd,
 	    }
 	  break;
 
-	case R_PPC64_GOT_TLSGD34:
+	case R_PPC64_GOT_TLSGD_PCREL34:
 	  if ((tls_mask & TLS_TLS) != 0 && (tls_mask & TLS_GD) == 0)
 	    {
 	      pinsn = bfd_get_32 (input_bfd, contents + rel->r_offset);
@@ -15222,7 +15238,7 @@ ppc64_elf_relocate_section (bfd *output_bfd,
 		{
 		  /* IE, pla -> pld  */
 		  pinsn += (-2ULL << 56) + (57ULL << 26) - (14ULL << 26);
-		  r_type = R_PPC64_GOT_TPREL34;
+		  r_type = R_PPC64_GOT_TPREL_PCREL34;
 		}
 	      else
 		{
@@ -15238,7 +15254,7 @@ ppc64_elf_relocate_section (bfd *output_bfd,
 	    }
 	  break;
 
-	case R_PPC64_GOT_TLSLD34:
+	case R_PPC64_GOT_TLSLD_PCREL34:
 	  if ((tls_mask & TLS_TLS) != 0 && (tls_mask & TLS_LD) == 0)
 	    {
 	      pinsn = bfd_get_32 (input_bfd, contents + rel->r_offset);
@@ -15974,7 +15990,7 @@ ppc64_elf_relocate_section (bfd *output_bfd,
 	case R_PPC64_GOT_TLSGD16_LO:
 	case R_PPC64_GOT_TLSGD16_HI:
 	case R_PPC64_GOT_TLSGD16_HA:
-	case R_PPC64_GOT_TLSGD34:
+	case R_PPC64_GOT_TLSGD_PCREL34:
 	  tls_type = TLS_TLS | TLS_GD;
 	  goto dogot;
 
@@ -15982,7 +15998,7 @@ ppc64_elf_relocate_section (bfd *output_bfd,
 	case R_PPC64_GOT_TLSLD16_LO:
 	case R_PPC64_GOT_TLSLD16_HI:
 	case R_PPC64_GOT_TLSLD16_HA:
-	case R_PPC64_GOT_TLSLD34:
+	case R_PPC64_GOT_TLSLD_PCREL34:
 	  tls_type = TLS_TLS | TLS_LD;
 	  goto dogot;
 
@@ -15990,7 +16006,7 @@ ppc64_elf_relocate_section (bfd *output_bfd,
 	case R_PPC64_GOT_TPREL16_LO_DS:
 	case R_PPC64_GOT_TPREL16_HI:
 	case R_PPC64_GOT_TPREL16_HA:
-	case R_PPC64_GOT_TPREL34:
+	case R_PPC64_GOT_TPREL_PCREL34:
 	  tls_type = TLS_TLS | TLS_TPREL;
 	  goto dogot;
 
@@ -15998,7 +16014,7 @@ ppc64_elf_relocate_section (bfd *output_bfd,
 	case R_PPC64_GOT_DTPREL16_LO_DS:
 	case R_PPC64_GOT_DTPREL16_HI:
 	case R_PPC64_GOT_DTPREL16_HA:
-	case R_PPC64_GOT_DTPREL34:
+	case R_PPC64_GOT_DTPREL_PCREL34:
 	  tls_type = TLS_TLS | TLS_DTPREL;
 	  goto dogot;
 
@@ -16197,10 +16213,10 @@ ppc64_elf_relocate_section (bfd *output_bfd,
 	    relocation = got->output_section->vma + got->output_offset + off;
 	    addend = 0;
 	    if (!(r_type == R_PPC64_GOT_PCREL34
-		  || r_type == R_PPC64_GOT_TLSGD34
-		  || r_type == R_PPC64_GOT_TLSLD34
-		  || r_type == R_PPC64_GOT_TPREL34
-		  || r_type == R_PPC64_GOT_DTPREL34))
+		  || r_type == R_PPC64_GOT_TLSGD_PCREL34
+		  || r_type == R_PPC64_GOT_TLSLD_PCREL34
+		  || r_type == R_PPC64_GOT_TPREL_PCREL34
+		  || r_type == R_PPC64_GOT_DTPREL_PCREL34))
 	      addend = -(TOCstart + htab->sec_info[input_section->id].toc_off);
 	  }
 	  break;
@@ -17022,10 +17038,10 @@ ppc64_elf_relocate_section (bfd *output_bfd,
 	case R_PPC64_GOT_PCREL34:
 	case R_PPC64_TPREL34:
 	case R_PPC64_DTPREL34:
-	case R_PPC64_GOT_TLSGD34:
-	case R_PPC64_GOT_TLSLD34:
-	case R_PPC64_GOT_TPREL34:
-	case R_PPC64_GOT_DTPREL34:
+	case R_PPC64_GOT_TLSGD_PCREL34:
+	case R_PPC64_GOT_TLSLD_PCREL34:
+	case R_PPC64_GOT_TPREL_PCREL34:
+	case R_PPC64_GOT_DTPREL_PCREL34:
 	case R_PPC64_PLT_PCREL34:
 	case R_PPC64_PLT_PCREL34_NOTOC:
 	case R_PPC64_D28:
diff --git a/bfd/reloc.c b/bfd/reloc.c
index f5df8e2ab3..9aba84ca81 100644
--- a/bfd/reloc.c
+++ b/bfd/reloc.c
@@ -3025,13 +3025,13 @@ ENUMX
 ENUMX
   BFD_RELOC_PPC64_DTPREL34
 ENUMX
-  BFD_RELOC_PPC64_GOT_TLSGD34
+  BFD_RELOC_PPC64_GOT_TLSGD_PCREL34
 ENUMX
-  BFD_RELOC_PPC64_GOT_TLSLD34
+  BFD_RELOC_PPC64_GOT_TLSLD_PCREL34
 ENUMX
-  BFD_RELOC_PPC64_GOT_TPREL34
+  BFD_RELOC_PPC64_GOT_TPREL_PCREL34
 ENUMX
-  BFD_RELOC_PPC64_GOT_DTPREL34
+  BFD_RELOC_PPC64_GOT_DTPREL_PCREL34
 ENUMX
   BFD_RELOC_PPC64_TLS_PCREL
 ENUMDOC
diff --git a/elfcpp/powerpc.h b/elfcpp/powerpc.h
index 8426a5b583..2ab73625f9 100644
--- a/elfcpp/powerpc.h
+++ b/elfcpp/powerpc.h
@@ -205,10 +205,10 @@ enum
   R_PPC64_PCREL28 = 145,
   R_PPC64_TPREL34 = 146,
   R_PPC64_DTPREL34 = 147,
-  R_PPC64_GOT_TLSGD34 = 148,
-  R_PPC64_GOT_TLSLD34 = 149,
-  R_PPC64_GOT_TPREL34 = 150,
-  R_PPC64_GOT_DTPREL34 = 151,
+  R_PPC64_GOT_TLSGD_PCREL34 = 148,
+  R_PPC64_GOT_TLSLD_PCREL34 = 149,
+  R_PPC64_GOT_TPREL_PCREL34 = 150,
+  R_PPC64_GOT_DTPREL_PCREL34 = 151,
 
   R_PPC_VLE_REL8 = 216,
   R_PPC_VLE_REL15 = 217,
diff --git a/gas/config/tc-ppc.c b/gas/config/tc-ppc.c
index 4a07f0bd75..5f9d44d928 100644
--- a/gas/config/tc-ppc.c
+++ b/gas/config/tc-ppc.c
@@ -2233,10 +2233,10 @@ ppc_elf_suffix (char **str_p, expressionS *exp_p)
     MAP64 ("got@pcrel",		BFD_RELOC_PPC64_GOT_PCREL34),
     MAP64 ("plt@pcrel",		BFD_RELOC_PPC64_PLT_PCREL34),
     MAP64 ("tls@pcrel",		BFD_RELOC_PPC64_TLS_PCREL),
-    MAP64 ("got@tlsgd@pcrel",	BFD_RELOC_PPC64_GOT_TLSGD34),
-    MAP64 ("got@tlsld@pcrel",	BFD_RELOC_PPC64_GOT_TLSLD34),
-    MAP64 ("got@tprel@pcrel",	BFD_RELOC_PPC64_GOT_TPREL34),
-    MAP64 ("got@dtprel@pcrel",	BFD_RELOC_PPC64_GOT_DTPREL34),
+    MAP64 ("got@tlsgd@pcrel",	BFD_RELOC_PPC64_GOT_TLSGD_PCREL34),
+    MAP64 ("got@tlsld@pcrel",	BFD_RELOC_PPC64_GOT_TLSLD_PCREL34),
+    MAP64 ("got@tprel@pcrel",	BFD_RELOC_PPC64_GOT_TPREL_PCREL34),
+    MAP64 ("got@dtprel@pcrel",	BFD_RELOC_PPC64_GOT_DTPREL_PCREL34),
     MAP64 ("higher34",		BFD_RELOC_PPC64_ADDR16_HIGHER34),
     MAP64 ("highera34",		BFD_RELOC_PPC64_ADDR16_HIGHERA34),
     MAP64 ("highest34",		BFD_RELOC_PPC64_ADDR16_HIGHEST34),
@@ -3219,10 +3219,10 @@ fixup_size (bfd_reloc_code_real_type reloc, bfd_boolean *pc_relative)
     case BFD_RELOC_64_PCREL:
     case BFD_RELOC_64_PLT_PCREL:
     case BFD_RELOC_PPC64_GOT_PCREL34:
-    case BFD_RELOC_PPC64_GOT_TLSGD34:
-    case BFD_RELOC_PPC64_GOT_TLSLD34:
-    case BFD_RELOC_PPC64_GOT_TPREL34:
-    case BFD_RELOC_PPC64_GOT_DTPREL34:
+    case BFD_RELOC_PPC64_GOT_TLSGD_PCREL34:
+    case BFD_RELOC_PPC64_GOT_TLSLD_PCREL34:
+    case BFD_RELOC_PPC64_GOT_TPREL_PCREL34:
+    case BFD_RELOC_PPC64_GOT_DTPREL_PCREL34:
     case BFD_RELOC_PPC64_PCREL28:
     case BFD_RELOC_PPC64_PCREL34:
     case BFD_RELOC_PPC64_PLT_PCREL34:
@@ -3804,10 +3804,10 @@ md_assemble (char *str)
 		  /* Fall through.  */
 		case BFD_RELOC_PPC64_GOT_PCREL34:
 		case BFD_RELOC_PPC64_PLT_PCREL34:
-		case BFD_RELOC_PPC64_GOT_TLSGD34:
-		case BFD_RELOC_PPC64_GOT_TLSLD34:
-		case BFD_RELOC_PPC64_GOT_TPREL34:
-		case BFD_RELOC_PPC64_GOT_DTPREL34:
+		case BFD_RELOC_PPC64_GOT_TLSGD_PCREL34:
+		case BFD_RELOC_PPC64_GOT_TLSLD_PCREL34:
+		case BFD_RELOC_PPC64_GOT_TPREL_PCREL34:
+		case BFD_RELOC_PPC64_GOT_DTPREL_PCREL34:
 		  if (operand->bitm != 0x3ffffffffULL
 		      || (operand->flags & PPC_OPERAND_NEGATIVE) != 0)
 		    as_warn (_("%s unsupported on this instruction"), "@pcrel");
@@ -7532,10 +7532,10 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg)
 	case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
 	case BFD_RELOC_PPC64_TPREL34:
 	case BFD_RELOC_PPC64_DTPREL34:
-	case BFD_RELOC_PPC64_GOT_TLSGD34:
-	case BFD_RELOC_PPC64_GOT_TLSLD34:
-	case BFD_RELOC_PPC64_GOT_TPREL34:
-	case BFD_RELOC_PPC64_GOT_DTPREL34:
+	case BFD_RELOC_PPC64_GOT_TLSGD_PCREL34:
+	case BFD_RELOC_PPC64_GOT_TLSLD_PCREL34:
+	case BFD_RELOC_PPC64_GOT_TPREL_PCREL34:
+	case BFD_RELOC_PPC64_GOT_DTPREL_PCREL34:
 	  gas_assert (fixP->fx_addsy != NULL);
 	  S_SET_THREAD_LOCAL (fixP->fx_addsy);
 	  fieldval = 0;
diff --git a/gold/powerpc.cc b/gold/powerpc.cc
index 318c41744b..80f222db19 100644
--- a/gold/powerpc.cc
+++ b/gold/powerpc.cc
@@ -7286,10 +7286,10 @@ Target_powerpc<size, big_endian>::Scan::get_reference_flags(
     case elfcpp::R_PPC64_TLSLD:
     case elfcpp::R_PPC64_TPREL34:
     case elfcpp::R_PPC64_DTPREL34:
-    case elfcpp::R_PPC64_GOT_TLSGD34:
-    case elfcpp::R_PPC64_GOT_TLSLD34:
-    case elfcpp::R_PPC64_GOT_TPREL34:
-    case elfcpp::R_PPC64_GOT_DTPREL34:
+    case elfcpp::R_PPC64_GOT_TLSGD_PCREL34:
+    case elfcpp::R_PPC64_GOT_TLSLD_PCREL34:
+    case elfcpp::R_PPC64_GOT_TPREL_PCREL34:
+    case elfcpp::R_PPC64_GOT_DTPREL_PCREL34:
       ref = Symbol::TLS_REF;
       break;
 
@@ -7883,7 +7883,7 @@ Target_powerpc<size, big_endian>::Scan::local(
       target->got_section(symtab, layout);
       break;
 
-    case elfcpp::R_PPC64_GOT_TLSGD34:
+    case elfcpp::R_PPC64_GOT_TLSGD_PCREL34:
     case elfcpp::R_POWERPC_GOT_TLSGD16:
     case elfcpp::R_POWERPC_GOT_TLSGD16_LO:
     case elfcpp::R_POWERPC_GOT_TLSGD16_HI:
@@ -7908,7 +7908,7 @@ Target_powerpc<size, big_endian>::Scan::local(
       }
       break;
 
-    case elfcpp::R_PPC64_GOT_TLSLD34:
+    case elfcpp::R_PPC64_GOT_TLSLD_PCREL34:
     case elfcpp::R_POWERPC_GOT_TLSLD16:
     case elfcpp::R_POWERPC_GOT_TLSLD16_LO:
     case elfcpp::R_POWERPC_GOT_TLSLD16_HI:
@@ -7932,7 +7932,7 @@ Target_powerpc<size, big_endian>::Scan::local(
       }
       break;
 
-    case elfcpp::R_PPC64_GOT_DTPREL34:
+    case elfcpp::R_PPC64_GOT_DTPREL_PCREL34:
     case elfcpp::R_POWERPC_GOT_DTPREL16:
     case elfcpp::R_POWERPC_GOT_DTPREL16_LO:
     case elfcpp::R_POWERPC_GOT_DTPREL16_HI:
@@ -7945,7 +7945,7 @@ Target_powerpc<size, big_endian>::Scan::local(
       }
       break;
 
-    case elfcpp::R_PPC64_GOT_TPREL34:
+    case elfcpp::R_PPC64_GOT_TPREL_PCREL34:
     case elfcpp::R_POWERPC_GOT_TPREL16:
     case elfcpp::R_POWERPC_GOT_TPREL16_LO:
     case elfcpp::R_POWERPC_GOT_TPREL16_HI:
@@ -8177,10 +8177,10 @@ Target_powerpc<size, big_endian>::Scan::local(
     case elfcpp::R_PPC64_PLT_PCREL34:
     case elfcpp::R_PPC64_PLT_PCREL34_NOTOC:
     case elfcpp::R_PPC64_GOT_PCREL34:
-    case elfcpp::R_PPC64_GOT_TLSGD34:
-    case elfcpp::R_PPC64_GOT_TLSLD34:
-    case elfcpp::R_PPC64_GOT_DTPREL34:
-    case elfcpp::R_PPC64_GOT_TPREL34:
+    case elfcpp::R_PPC64_GOT_TLSGD_PCREL34:
+    case elfcpp::R_PPC64_GOT_TLSLD_PCREL34:
+    case elfcpp::R_PPC64_GOT_DTPREL_PCREL34:
+    case elfcpp::R_PPC64_GOT_TPREL_PCREL34:
       target->set_power10_stubs();
       break;
     default:
@@ -8616,7 +8616,7 @@ Target_powerpc<size, big_endian>::Scan::global(
       target->got_section(symtab, layout);
       break;
 
-    case elfcpp::R_PPC64_GOT_TLSGD34:
+    case elfcpp::R_PPC64_GOT_TLSGD_PCREL34:
     case elfcpp::R_POWERPC_GOT_TLSGD16:
     case elfcpp::R_POWERPC_GOT_TLSGD16_LO:
     case elfcpp::R_POWERPC_GOT_TLSGD16_HI:
@@ -8665,7 +8665,7 @@ Target_powerpc<size, big_endian>::Scan::global(
       }
       break;
 
-    case elfcpp::R_PPC64_GOT_TLSLD34:
+    case elfcpp::R_PPC64_GOT_TLSLD_PCREL34:
     case elfcpp::R_POWERPC_GOT_TLSLD16:
     case elfcpp::R_POWERPC_GOT_TLSLD16_LO:
     case elfcpp::R_POWERPC_GOT_TLSLD16_HI:
@@ -8689,7 +8689,7 @@ Target_powerpc<size, big_endian>::Scan::global(
       }
       break;
 
-    case elfcpp::R_PPC64_GOT_DTPREL34:
+    case elfcpp::R_PPC64_GOT_DTPREL_PCREL34:
     case elfcpp::R_POWERPC_GOT_DTPREL16:
     case elfcpp::R_POWERPC_GOT_DTPREL16_LO:
     case elfcpp::R_POWERPC_GOT_DTPREL16_HI:
@@ -8709,7 +8709,7 @@ Target_powerpc<size, big_endian>::Scan::global(
       }
       break;
 
-    case elfcpp::R_PPC64_GOT_TPREL34:
+    case elfcpp::R_PPC64_GOT_TPREL_PCREL34:
     case elfcpp::R_POWERPC_GOT_TPREL16:
     case elfcpp::R_POWERPC_GOT_TPREL16_LO:
     case elfcpp::R_POWERPC_GOT_TPREL16_HI:
@@ -8935,10 +8935,10 @@ Target_powerpc<size, big_endian>::Scan::global(
     case elfcpp::R_PPC64_PLT_PCREL34:
     case elfcpp::R_PPC64_PLT_PCREL34_NOTOC:
     case elfcpp::R_PPC64_GOT_PCREL34:
-    case elfcpp::R_PPC64_GOT_TLSGD34:
-    case elfcpp::R_PPC64_GOT_TLSLD34:
-    case elfcpp::R_PPC64_GOT_DTPREL34:
-    case elfcpp::R_PPC64_GOT_TPREL34:
+    case elfcpp::R_PPC64_GOT_TLSGD_PCREL34:
+    case elfcpp::R_PPC64_GOT_TLSLD_PCREL34:
+    case elfcpp::R_PPC64_GOT_DTPREL_PCREL34:
+    case elfcpp::R_PPC64_GOT_TPREL_PCREL34:
       target->set_power10_stubs();
       break;
     default:
@@ -10263,7 +10263,7 @@ Target_powerpc<size, big_endian>::Relocate::relocate(
 	   || r_type == elfcpp::R_POWERPC_GOT_TLSGD16_LO
 	   || r_type == elfcpp::R_POWERPC_GOT_TLSGD16_HI
 	   || r_type == elfcpp::R_POWERPC_GOT_TLSGD16_HA
-	   || r_type == elfcpp::R_PPC64_GOT_TLSGD34)
+	   || r_type == elfcpp::R_PPC64_GOT_TLSGD_PCREL34)
     {
       // First instruction of a global dynamic sequence, arg setup insn.
       const bool final = gsym == NULL || gsym->final_value_is_known();
@@ -10285,14 +10285,14 @@ Target_powerpc<size, big_endian>::Relocate::relocate(
 	      gold_assert(object->local_has_got_offset(r_sym, got_type));
 	      value = object->local_got_offset(r_sym, got_type);
 	    }
-	  if (r_type == elfcpp::R_PPC64_GOT_TLSGD34)
+	  if (r_type == elfcpp::R_PPC64_GOT_TLSGD_PCREL34)
 	    value += target->got_section()->address();
 	  else
 	    value -= target->got_section()->got_base_offset(object);
 	}
       if (tls_type == tls::TLSOPT_TO_IE)
 	{
-	  if (r_type == elfcpp::R_PPC64_GOT_TLSGD34)
+	  if (r_type == elfcpp::R_PPC64_GOT_TLSGD_PCREL34)
 	    {
 	      Insn* iview = reinterpret_cast<Insn*>(view);
 	      uint64_t pinsn = elfcpp::Swap<32, big_endian>::readval(iview);
@@ -10303,7 +10303,7 @@ Target_powerpc<size, big_endian>::Relocate::relocate(
 	      elfcpp::Swap<32, big_endian>::writeval(iview, pinsn >> 32);
 	      elfcpp::Swap<32, big_endian>::writeval(iview + 1,
 						     pinsn & 0xffffffff);
-	      r_type = elfcpp::R_PPC64_GOT_TPREL34;
+	      r_type = elfcpp::R_PPC64_GOT_TPREL_PCREL34;
 	    }
 	  else
 	    {
@@ -10325,7 +10325,7 @@ Target_powerpc<size, big_endian>::Relocate::relocate(
 	}
       else if (tls_type == tls::TLSOPT_TO_LE)
 	{
-	  if (r_type == elfcpp::R_PPC64_GOT_TLSGD34)
+	  if (r_type == elfcpp::R_PPC64_GOT_TLSGD_PCREL34)
 	    {
 	      Insn* iview = reinterpret_cast<Insn*>(view);
 	      uint64_t pinsn = elfcpp::Swap<32, big_endian>::readval(iview);
@@ -10369,14 +10369,14 @@ Target_powerpc<size, big_endian>::Relocate::relocate(
 	   || r_type == elfcpp::R_POWERPC_GOT_TLSLD16_LO
 	   || r_type == elfcpp::R_POWERPC_GOT_TLSLD16_HI
 	   || r_type == elfcpp::R_POWERPC_GOT_TLSLD16_HA
-	   || r_type == elfcpp::R_PPC64_GOT_TLSLD34)
+	   || r_type == elfcpp::R_PPC64_GOT_TLSLD_PCREL34)
     {
       // First instruction of a local dynamic sequence, arg setup insn.
       const tls::Tls_optimization tls_type = target->optimize_tls_ld();
       if (tls_type == tls::TLSOPT_NONE)
 	{
 	  value = target->tlsld_got_offset();
-	  if (r_type == elfcpp::R_PPC64_GOT_TLSLD34)
+	  if (r_type == elfcpp::R_PPC64_GOT_TLSLD_PCREL34)
 	    value += target->got_section()->address();
 	  else
 	    value -= target->got_section()->got_base_offset(object);
@@ -10384,7 +10384,7 @@ Target_powerpc<size, big_endian>::Relocate::relocate(
       else
 	{
 	  gold_assert(tls_type == tls::TLSOPT_TO_LE);
-	  if (r_type == elfcpp::R_PPC64_GOT_TLSLD34)
+	  if (r_type == elfcpp::R_PPC64_GOT_TLSLD_PCREL34)
 	    {
 	      Insn* iview = reinterpret_cast<Insn*>(view);
 	      uint64_t pinsn = elfcpp::Swap<32, big_endian>::readval(iview);
@@ -10425,7 +10425,7 @@ Target_powerpc<size, big_endian>::Relocate::relocate(
 	   || r_type == elfcpp::R_POWERPC_GOT_DTPREL16_LO
 	   || r_type == elfcpp::R_POWERPC_GOT_DTPREL16_HI
 	   || r_type == elfcpp::R_POWERPC_GOT_DTPREL16_HA
-	   || r_type == elfcpp::R_PPC64_GOT_DTPREL34)
+	   || r_type == elfcpp::R_PPC64_GOT_DTPREL_PCREL34)
     {
       // Accesses relative to a local dynamic sequence address,
       // no optimisation here.
@@ -10439,7 +10439,7 @@ Target_powerpc<size, big_endian>::Relocate::relocate(
 	  gold_assert(object->local_has_got_offset(r_sym, GOT_TYPE_DTPREL));
 	  value = object->local_got_offset(r_sym, GOT_TYPE_DTPREL);
 	}
-      if (r_type == elfcpp::R_PPC64_GOT_DTPREL34)
+      if (r_type == elfcpp::R_PPC64_GOT_DTPREL_PCREL34)
 	value += target->got_section()->address();
       else
 	value -= target->got_section()->got_base_offset(object);
@@ -10448,7 +10448,7 @@ Target_powerpc<size, big_endian>::Relocate::relocate(
 	   || r_type == elfcpp::R_POWERPC_GOT_TPREL16_LO
 	   || r_type == elfcpp::R_POWERPC_GOT_TPREL16_HI
 	   || r_type == elfcpp::R_POWERPC_GOT_TPREL16_HA
-	   || r_type == elfcpp::R_PPC64_GOT_TPREL34)
+	   || r_type == elfcpp::R_PPC64_GOT_TPREL_PCREL34)
     {
       // First instruction of initial exec sequence.
       const bool final = gsym == NULL || gsym->final_value_is_known();
@@ -10465,7 +10465,7 @@ Target_powerpc<size, big_endian>::Relocate::relocate(
 	      gold_assert(object->local_has_got_offset(r_sym, GOT_TYPE_TPREL));
 	      value = object->local_got_offset(r_sym, GOT_TYPE_TPREL);
 	    }
-	  if (r_type == elfcpp::R_PPC64_GOT_TPREL34)
+	  if (r_type == elfcpp::R_PPC64_GOT_TPREL_PCREL34)
 	    value += target->got_section()->address();
 	  else
 	    value -= target->got_section()->got_base_offset(object);
@@ -10473,7 +10473,7 @@ Target_powerpc<size, big_endian>::Relocate::relocate(
       else
 	{
 	  gold_assert(tls_type == tls::TLSOPT_TO_LE);
-	  if (r_type == elfcpp::R_PPC64_GOT_TPREL34)
+	  if (r_type == elfcpp::R_PPC64_GOT_TPREL_PCREL34)
 	    {
 	      Insn* iview = reinterpret_cast<Insn*>(view);
 	      uint64_t pinsn = elfcpp::Swap<32, big_endian>::readval(iview);
@@ -10745,10 +10745,10 @@ Target_powerpc<size, big_endian>::Relocate::relocate(
     case elfcpp::R_PPC64_PLT_PCREL34:
     case elfcpp::R_PPC64_PLT_PCREL34_NOTOC:
     case elfcpp::R_PPC64_PCREL28:
-    case elfcpp::R_PPC64_GOT_TLSGD34:
-    case elfcpp::R_PPC64_GOT_TLSLD34:
-    case elfcpp::R_PPC64_GOT_TPREL34:
-    case elfcpp::R_PPC64_GOT_DTPREL34:
+    case elfcpp::R_PPC64_GOT_TLSGD_PCREL34:
+    case elfcpp::R_PPC64_GOT_TLSLD_PCREL34:
+    case elfcpp::R_PPC64_GOT_TPREL_PCREL34:
+    case elfcpp::R_PPC64_GOT_DTPREL_PCREL34:
     case elfcpp::R_PPC64_REL16_HIGHER34:
     case elfcpp::R_PPC64_REL16_HIGHERA34:
     case elfcpp::R_PPC64_REL16_HIGHEST34:
@@ -11285,10 +11285,10 @@ Target_powerpc<size, big_endian>::Relocate::relocate(
     case elfcpp::R_PPC64_PCREL28:
     case elfcpp::R_PPC64_TPREL34:
     case elfcpp::R_PPC64_DTPREL34:
-    case elfcpp::R_PPC64_GOT_TLSGD34:
-    case elfcpp::R_PPC64_GOT_TLSLD34:
-    case elfcpp::R_PPC64_GOT_TPREL34:
-    case elfcpp::R_PPC64_GOT_DTPREL34:
+    case elfcpp::R_PPC64_GOT_TLSGD_PCREL34:
+    case elfcpp::R_PPC64_GOT_TLSLD_PCREL34:
+    case elfcpp::R_PPC64_GOT_TPREL_PCREL34:
+    case elfcpp::R_PPC64_GOT_DTPREL_PCREL34:
       overflow = Reloc::CHECK_SIGNED;
       break;
     }
@@ -11587,10 +11587,10 @@ Target_powerpc<size, big_endian>::Relocate::relocate(
     case elfcpp::R_PPC64_PLT_PCREL34_NOTOC:
     case elfcpp::R_PPC64_TPREL34:
     case elfcpp::R_PPC64_DTPREL34:
-    case elfcpp::R_PPC64_GOT_TLSGD34:
-    case elfcpp::R_PPC64_GOT_TLSLD34:
-    case elfcpp::R_PPC64_GOT_TPREL34:
-    case elfcpp::R_PPC64_GOT_DTPREL34:
+    case elfcpp::R_PPC64_GOT_TLSGD_PCREL34:
+    case elfcpp::R_PPC64_GOT_TLSLD_PCREL34:
+    case elfcpp::R_PPC64_GOT_TPREL_PCREL34:
+    case elfcpp::R_PPC64_GOT_DTPREL_PCREL34:
       if (size == 32)
 	goto unsupp;
       status = Reloc::addr34(view, value, overflow);
diff --git a/include/elf/ppc64.h b/include/elf/ppc64.h
index 22991c8eb4..f7034ec24b 100644
--- a/include/elf/ppc64.h
+++ b/include/elf/ppc64.h
@@ -183,10 +183,10 @@ START_RELOC_NUMBERS (elf_ppc64_reloc_type)
   RELOC_NUMBER (R_PPC64_PCREL28,	   145)
   RELOC_NUMBER (R_PPC64_TPREL34,	   146)
   RELOC_NUMBER (R_PPC64_DTPREL34,	   147)
-  RELOC_NUMBER (R_PPC64_GOT_TLSGD34,	   148)
-  RELOC_NUMBER (R_PPC64_GOT_TLSLD34,	   149)
-  RELOC_NUMBER (R_PPC64_GOT_TPREL34,	   150)
-  RELOC_NUMBER (R_PPC64_GOT_DTPREL34,	   151)
+  RELOC_NUMBER (R_PPC64_GOT_TLSGD_PCREL34, 148)
+  RELOC_NUMBER (R_PPC64_GOT_TLSLD_PCREL34, 149)
+  RELOC_NUMBER (R_PPC64_GOT_TPREL_PCREL34, 150)
+  RELOC_NUMBER (R_PPC64_GOT_DTPREL_PCREL34, 151)
 
 #ifndef RELOC_MACROS_GEN_FUNC
 /* Relocation only used internally by gas or ld.  If you need to use
@@ -225,7 +225,7 @@ END_RELOC_NUMBERS (R_PPC64_max)
 #define IS_PPC64_TLS_RELOC(R)						\
   (((R) >= R_PPC64_TLS && (R) <= R_PPC64_DTPREL16_HIGHESTA)		\
    || ((R) >= R_PPC64_TPREL16_HIGH && (R) <= R_PPC64_DTPREL16_HIGHA)	\
-   || ((R) >= R_PPC64_TPREL34 && (R) <= R_PPC64_GOT_DTPREL34))
+   || ((R) >= R_PPC64_TPREL34 && (R) <= R_PPC64_GOT_DTPREL_PCREL34))
 
 /* e_flags bits specifying ABI.
    1 for original function descriptor using ABI,

-- 
Alan Modra
Australia Development Lab, IBM

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: Rename PowerPC64 pcrel GOT TLS relocations
  2020-06-06  5:12 Rename PowerPC64 pcrel GOT TLS relocations Alan Modra
@ 2020-06-06  7:21 ` Fangrui Song
       [not found] ` <MWHPR12MB1456E96F004CB70690CB6EE4CB870@MWHPR12MB1456.namprd12.prod.outlook.com>
  1 sibling, 0 replies; 7+ messages in thread
From: Fangrui Song @ 2020-06-06  7:21 UTC (permalink / raw)
  To: Alan Modra; +Cc: binutils

On Fri, Jun 5, 2020 at 10:12 PM Alan Modra via Binutils
<binutils@sourceware.org> wrote:
>
> These relocations should have had REL in their names, to reflect the
> fact that they are pc-relative.  Fix that now by adding _PCREL.
> I've added some back-compatibility code to support anyone using
> .reloc with the old relocations.

https://openpowerfoundation.org/?resource_lib=64-bit-elf-v2-abi-specification-power-architecture
(Revision 1.4, June 22, 2017) hasn't been updated for nearly three
years.
For these relocation types, which specification is defining them?

FWIW both https://gitlab.com/x86-psABIs/x86-64-ABI and
https://developer.arm.com/docs/ihi0056/g/elf-for-the-arm-64-bit-architecture-aarch64-abi-2019q4-documentation
are updated quite frequently.

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: Rename PowerPC64 pcrel GOT TLS relocations
       [not found] ` <MWHPR12MB1456E96F004CB70690CB6EE4CB870@MWHPR12MB1456.namprd12.prod.outlook.com>
@ 2020-06-06  8:02   ` Alan Modra
  2020-06-07 18:30     ` Bill Schmidt
  0 siblings, 1 reply; 7+ messages in thread
From: Alan Modra @ 2020-06-06  8:02 UTC (permalink / raw)
  To: Fangrui Song; +Cc: binutils

On Sat, Jun 06, 2020 at 12:21:29AM -0700, Fangrui Song wrote:
> On Fri, Jun 5, 2020 at 10:12 PM Alan Modra via Binutils
> <binutils@sourceware.org> wrote:
> >
> > These relocations should have had REL in their names, to reflect the
> > fact that they are pc-relative.  Fix that now by adding _PCREL.
> > I've added some back-compatibility code to support anyone using
> > .reloc with the old relocations.
> 
> https://openpowerfoundation.org/?resource_lib=64-bit-elf-v2-abi-specification-power-architecture
> (Revision 1.4, June 22, 2017) hasn't been updated for nearly three
> years.
> For these relocation types, which specification is defining them?

The ELFv2 ABI has been updated to include Power10 related information,
and should be released soon.

-- 
Alan Modra
Australia Development Lab, IBM

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: Rename PowerPC64 pcrel GOT TLS relocations
  2020-06-06  8:02   ` Alan Modra
@ 2020-06-07 18:30     ` Bill Schmidt
  2020-06-07 19:17       ` Fangrui Song
       [not found]       ` <MWHPR12MB14568AF20BD3E813FE493F9DCB840@MWHPR12MB1456.namprd12.prod.outlook.com>
  0 siblings, 2 replies; 7+ messages in thread
From: Bill Schmidt @ 2020-06-07 18:30 UTC (permalink / raw)
  To: Alan Modra, Fangrui Song; +Cc: binutils

On 6/6/20 3:02 AM, Alan Modra via Binutils wrote:
> On Sat, Jun 06, 2020 at 12:21:29AM -0700, Fangrui Song wrote:
>> On Fri, Jun 5, 2020 at 10:12 PM Alan Modra via Binutils
>> <binutils@sourceware.org> wrote:
>>> These relocations should have had REL in their names, to reflect the
>>> fact that they are pc-relative.  Fix that now by adding _PCREL.
>>> I've added some back-compatibility code to support anyone using
>>> .reloc with the old relocations.
>> https://openpowerfoundation.org/?resource_lib=64-bit-elf-v2-abi-specification-power-architecture
>> (Revision 1.4, June 22, 2017) hasn't been updated for nearly three
>> years.
>> For these relocation types, which specification is defining them?
> The ELFv2 ABI has been updated to include Power10 related information,
> and should be released soon.
>
...with the only caveat that "soon" is a matter of some months, just due 
to the publication process at OpenPOWER Foundation.  A specification 
document gets a lot of scrutiny and has to go through several foundation 
committees and a public review period.

We're now at the point where we're having internal reviews at IBM to 
ensure everything we say is what we mean to say, after which I'll be 
shepherding the document through the publication process. At best guess 
from prior experience, the final document should be available in the 
autumn.  The public review period will probably get started in 2-3 
months, at which point you can use the review document as reference for 
the relocations.  Meantime the source code serves as intent.

Bureaucracy and process... but ultimately it does help with the quality 
of the document.

Thanks,
Bill


^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: Rename PowerPC64 pcrel GOT TLS relocations
  2020-06-07 18:30     ` Bill Schmidt
@ 2020-06-07 19:17       ` Fangrui Song
       [not found]       ` <MWHPR12MB14568AF20BD3E813FE493F9DCB840@MWHPR12MB1456.namprd12.prod.outlook.com>
  1 sibling, 0 replies; 7+ messages in thread
From: Fangrui Song @ 2020-06-07 19:17 UTC (permalink / raw)
  To: wschmidt; +Cc: Alan Modra, binutils

On Sun, Jun 7, 2020 at 11:30 AM Bill Schmidt <wschmidt@linux.ibm.com> wrote:
>
> On 6/6/20 3:02 AM, Alan Modra via Binutils wrote:
> > On Sat, Jun 06, 2020 at 12:21:29AM -0700, Fangrui Song wrote:
> >> On Fri, Jun 5, 2020 at 10:12 PM Alan Modra via Binutils
> >> <binutils@sourceware.org> wrote:
> >>> These relocations should have had REL in their names, to reflect the
> >>> fact that they are pc-relative.  Fix that now by adding _PCREL.
> >>> I've added some back-compatibility code to support anyone using
> >>> .reloc with the old relocations.
> >> https://openpowerfoundation.org/?resource_lib=64-bit-elf-v2-abi-specification-power-architecture
> >> (Revision 1.4, June 22, 2017) hasn't been updated for nearly three
> >> years.
> >> For these relocation types, which specification is defining them?
> > The ELFv2 ABI has been updated to include Power10 related information,
> > and should be released soon.
> >
> ...with the only caveat that "soon" is a matter of some months, just due
> to the publication process at OpenPOWER Foundation.  A specification
> document gets a lot of scrutiny and has to go through several foundation
> committees and a public review period.
>
> We're now at the point where we're having internal reviews at IBM to
> ensure everything we say is what we mean to say, after which I'll be
> shepherding the document through the publication process. At best guess
> from prior experience, the final document should be available in the
> autumn.  The public review period will probably get started in 2-3
> months, at which point you can use the review document as reference for
> the relocations.  Meantime the source code serves as intent.
>
> Bureaucracy and process... but ultimately it does help with the quality
> of the document.
>
> Thanks,
> Bill

Bill, thanks for the information.

A follow-up question: how can I subscribe to the updates when the
public review period starts? I registered an account on
openpowerfoundation.org a while ago. Now I clicked
https://members.openpowerfoundation.org/wg/OPF/document/search?q=64-bit+elf&yt2=Search
, searched for "64-bit elf", and I got "Power Architecture 64-Bit ELF
V2 ABI Specification.pdf" posted on Monday, August 24, 2015, 8:47 AM,
which is older than the 2017 version. This version is probably
irrelevant. A bit wrestling with the website gave me
https://members.openpowerfoundation.org/wg/OPF/mail/thread/8117 ,
which says

Click here to submit a comment or subscribe to the comment email
distribution list for the 64-Bit ELF V2 ABI Specification: Power
Architecture:

    syssw-elfv2abi@mailinglist.openpowerfoundation.org

This seems to be more promising. So I sent an email to this address
with "subscribe" in the subject, but I haven't received a confirmation
email yet. How can I know whether I am subscribed? Additionally, if
this is a mailing list (probably private), can a user with an account
on openpowerfoundation.org browse the archive? Thanks.

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: Rename PowerPC64 pcrel GOT TLS relocations
       [not found]       ` <MWHPR12MB14568AF20BD3E813FE493F9DCB840@MWHPR12MB1456.namprd12.prod.outlook.com>
@ 2020-06-07 20:39         ` Bill Schmidt
  2020-06-08 14:19         ` Bill Schmidt
  1 sibling, 0 replies; 7+ messages in thread
From: Bill Schmidt @ 2020-06-07 20:39 UTC (permalink / raw)
  To: Fangrui Song; +Cc: Alan Modra, binutils


On 6/7/20 2:17 PM, Fangrui Song wrote:
> On Sun, Jun 7, 2020 at 11:30 AM Bill Schmidt <wschmidt@linux.ibm.com> wrote:
>> On 6/6/20 3:02 AM, Alan Modra via Binutils wrote:
>>> On Sat, Jun 06, 2020 at 12:21:29AM -0700, Fangrui Song wrote:
>>>> On Fri, Jun 5, 2020 at 10:12 PM Alan Modra via Binutils
>>>> <binutils@sourceware.org> wrote:
>>>>> These relocations should have had REL in their names, to reflect the
>>>>> fact that they are pc-relative.  Fix that now by adding _PCREL.
>>>>> I've added some back-compatibility code to support anyone using
>>>>> .reloc with the old relocations.
>>>> https://openpowerfoundation.org/?resource_lib=64-bit-elf-v2-abi-specification-power-architecture
>>>> (Revision 1.4, June 22, 2017) hasn't been updated for nearly three
>>>> years.
>>>> For these relocation types, which specification is defining them?
>>> The ELFv2 ABI has been updated to include Power10 related information,
>>> and should be released soon.
>>>
>> ...with the only caveat that "soon" is a matter of some months, just due
>> to the publication process at OpenPOWER Foundation.  A specification
>> document gets a lot of scrutiny and has to go through several foundation
>> committees and a public review period.
>>
>> We're now at the point where we're having internal reviews at IBM to
>> ensure everything we say is what we mean to say, after which I'll be
>> shepherding the document through the publication process. At best guess
>> from prior experience, the final document should be available in the
>> autumn.  The public review period will probably get started in 2-3
>> months, at which point you can use the review document as reference for
>> the relocations.  Meantime the source code serves as intent.
>>
>> Bureaucracy and process... but ultimately it does help with the quality
>> of the document.
>>
>> Thanks,
>> Bill
> Bill, thanks for the information.
>
> A follow-up question: how can I subscribe to the updates when the
> public review period starts? I registered an account on
> openpowerfoundation.org a while ago. Now I clicked
> https://members.openpowerfoundation.org/wg/OPF/document/search?q=64-bit+elf&yt2=Search
> , searched for "64-bit elf", and I got "Power Architecture 64-Bit ELF
> V2 ABI Specification.pdf" posted on Monday, August 24, 2015, 8:47 AM,
> which is older than the 2017 version. This version is probably
> irrelevant. A bit wrestling with the website gave me
> https://members.openpowerfoundation.org/wg/OPF/mail/thread/8117 ,
> which says
>
> Click here to submit a comment or subscribe to the comment email
> distribution list for the 64-Bit ELF V2 ABI Specification: Power
> Architecture:
>
>      syssw-elfv2abi@mailinglist.openpowerfoundation.org
>
> This seems to be more promising. So I sent an email to this address
> with "subscribe" in the subject, but I haven't received a confirmation
> email yet. How can I know whether I am subscribed? Additionally, if
> this is a mailing list (probably private), can a user with an account
> on openpowerfoundation.org browse the archive? Thanks.

Subscribing was correct -- I see your request out there.  I am now 
desperately hunting for my moderator password...  I'll get this taken 
care of, but I might need to get a new moderator password set up first.  
The traffic volume was apparently too low for this to stick in my mind.  
I apologize for my poor organization.  Anyway, it should take effect 
soon, and there will be an announcement on the mailing list when the 
document enters the public review period.

I think you'll be able to see the archive, but I can't answer that with 
authority until I sort out my authentication issue. Apologies!

Bill


^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: Rename PowerPC64 pcrel GOT TLS relocations
       [not found]       ` <MWHPR12MB14568AF20BD3E813FE493F9DCB840@MWHPR12MB1456.namprd12.prod.outlook.com>
  2020-06-07 20:39         ` Bill Schmidt
@ 2020-06-08 14:19         ` Bill Schmidt
  1 sibling, 0 replies; 7+ messages in thread
From: Bill Schmidt @ 2020-06-08 14:19 UTC (permalink / raw)
  To: Fangrui Song; +Cc: Alan Modra, binutils


On 6/7/20 2:17 PM, Fangrui Song wrote:
> On Sun, Jun 7, 2020 at 11:30 AM Bill Schmidt <wschmidt@linux.ibm.com> wrote:
>> On 6/6/20 3:02 AM, Alan Modra via Binutils wrote:
>>> On Sat, Jun 06, 2020 at 12:21:29AM -0700, Fangrui Song wrote:
>>>> On Fri, Jun 5, 2020 at 10:12 PM Alan Modra via Binutils
>>>> <binutils@sourceware.org> wrote:
>>>>> These relocations should have had REL in their names, to reflect the
>>>>> fact that they are pc-relative.  Fix that now by adding _PCREL.
>>>>> I've added some back-compatibility code to support anyone using
>>>>> .reloc with the old relocations.
>>>> https://openpowerfoundation.org/?resource_lib=64-bit-elf-v2-abi-specification-power-architecture
>>>> (Revision 1.4, June 22, 2017) hasn't been updated for nearly three
>>>> years.
>>>> For these relocation types, which specification is defining them?
>>> The ELFv2 ABI has been updated to include Power10 related information,
>>> and should be released soon.
>>>
>> ...with the only caveat that "soon" is a matter of some months, just due
>> to the publication process at OpenPOWER Foundation.  A specification
>> document gets a lot of scrutiny and has to go through several foundation
>> committees and a public review period.
>>
>> We're now at the point where we're having internal reviews at IBM to
>> ensure everything we say is what we mean to say, after which I'll be
>> shepherding the document through the publication process. At best guess
>> from prior experience, the final document should be available in the
>> autumn.  The public review period will probably get started in 2-3
>> months, at which point you can use the review document as reference for
>> the relocations.  Meantime the source code serves as intent.
>>
>> Bureaucracy and process... but ultimately it does help with the quality
>> of the document.
>>
>> Thanks,
>> Bill
> Bill, thanks for the information.
>
> A follow-up question: how can I subscribe to the updates when the
> public review period starts? I registered an account on
> openpowerfoundation.org a while ago. Now I clicked
> https://members.openpowerfoundation.org/wg/OPF/document/search?q=64-bit+elf&yt2=Search
> , searched for "64-bit elf", and I got "Power Architecture 64-Bit ELF
> V2 ABI Specification.pdf" posted on Monday, August 24, 2015, 8:47 AM,
> which is older than the 2017 version. This version is probably
> irrelevant. A bit wrestling with the website gave me
> https://members.openpowerfoundation.org/wg/OPF/mail/thread/8117 ,
> which says
>
> Click here to submit a comment or subscribe to the comment email
> distribution list for the 64-Bit ELF V2 ABI Specification: Power
> Architecture:
>
>      syssw-elfv2abi@mailinglist.openpowerfoundation.org
>
> This seems to be more promising. So I sent an email to this address
> with "subscribe" in the subject, but I haven't received a confirmation
> email yet. How can I know whether I am subscribed? Additionally, if
> this is a mailing list (probably private), can a user with an account
> on openpowerfoundation.org browse the archive? Thanks.

I've corrected my authentication issue.  Seeing your note, this wasn't 
the correct way to subscribe.  Please go to 
http://lists.mailinglist.openpowerfoundation.org/mailman/listinfo/syssw-elfv2abi, 
fill out the form in the center of the page, and press the Subscribe button.

Thanks,
Bill


^ permalink raw reply	[flat|nested] 7+ messages in thread

end of thread, other threads:[~2020-06-08 14:19 UTC | newest]

Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-06-06  5:12 Rename PowerPC64 pcrel GOT TLS relocations Alan Modra
2020-06-06  7:21 ` Fangrui Song
     [not found] ` <MWHPR12MB1456E96F004CB70690CB6EE4CB870@MWHPR12MB1456.namprd12.prod.outlook.com>
2020-06-06  8:02   ` Alan Modra
2020-06-07 18:30     ` Bill Schmidt
2020-06-07 19:17       ` Fangrui Song
     [not found]       ` <MWHPR12MB14568AF20BD3E813FE493F9DCB840@MWHPR12MB1456.namprd12.prod.outlook.com>
2020-06-07 20:39         ` Bill Schmidt
2020-06-08 14:19         ` Bill Schmidt

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