From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx0b-00069f02.pphosted.com (mx0b-00069f02.pphosted.com [205.220.177.32]) by sourceware.org (Postfix) with ESMTPS id 5F6D1385C6CD for ; Wed, 3 Jul 2024 20:10:32 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 5F6D1385C6CD Authentication-Results: sourceware.org; dmarc=pass (p=reject dis=none) header.from=oracle.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=oracle.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 5F6D1385C6CD Authentication-Results: server2.sourceware.org; arc=pass smtp.remote-ip=205.220.177.32 ARC-Seal: i=2; a=rsa-sha256; d=sourceware.org; s=key; t=1720037439; cv=pass; b=eQ161kEHYZXbTVg6nkQevMwUCuLcLlQJFJLqAaaBW7TuKXmeFlb/S+Fl+mwBThOgzbzV+F74hEfhIp4Da4xZlqNIqC0M7eIPBhJxHwq1VVB/ReLbW93sx+2S3WE+AeKXBJhvj/Hdu0h+QPkGt/5AJZz01wTwV4b5/7At7hNxLn0= ARC-Message-Signature: i=2; a=rsa-sha256; d=sourceware.org; s=key; t=1720037439; c=relaxed/simple; bh=uKGRIP9YoDpAnFWLMV3lWL2KXs9t62kUEJ/Kp9eAqAc=; h=DKIM-Signature:DKIM-Signature:Message-ID:Date:Subject:To:From: MIME-Version; b=wKrrtPOUiQiI+6Sv11Qe6qQIsCWfzSoKwlSrVr3ZcNBXtPt6NSlAUwGW9efRvDeN5YMTm/b3T5xSCqiUIZZq7+FtaypH3W8fgCNl8ZTBMMFCnRywJPJ2X7Wnyq/n0deejuaAzXiCgX8D0TAVEY16aEMBX40ocnAZR3IZisVlhsU= ARC-Authentication-Results: i=2; server2.sourceware.org Received: from pps.filterd (m0246630.ppops.net [127.0.0.1]) by mx0b-00069f02.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 463JfpQg013523; Wed, 3 Jul 2024 20:10:20 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oracle.com; h= content-type:message-id:date:subject:to:cc:references:from :in-reply-to:mime-version; s=corp-2023-11-20; bh=HscnHnSpPcv+kWU lHrXOWMKVcm4rx7ecXa44uqYENYg=; b=i9l0fIooZSwtd1fxdyrcuKfpx8WnghI 56+1TAtdRJ/t6zEb0EFXeF6R2aJoycaIxE0rcqv8qLxD/eSznopyeRwXLicfMZgT UdrBSI3Rpp8csGNErCgJX9+zN67pW8dl2r/d17I89QU3tz7OhO0ylM4t2G1JsvV/ a797mGk3MBM2Xuva9WFHxhx3J2Zb1ub6CWiT06VNrCi9n0bkKXJwQ5FOUZCS0Gdg 16ErJVTZ3qPgsoaSgPZlOrsM9Hzu2JDENpd3lFAeT4KP0MkpaGbJ+ZWC5P2gtB1J vTJxVeFidoYGjKe+Ee8pNKWH0Phesk9spew1CKT1Xm+X1gFo9a1uEeA== Received: from iadpaimrmta01.imrmtpd1.prodappiadaev1.oraclevcn.com (iadpaimrmta01.appoci.oracle.com [130.35.100.223]) by mx0b-00069f02.pphosted.com (PPS) with ESMTPS id 404nxgjhmx-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 03 Jul 2024 20:10:20 +0000 (GMT) Received: from pps.filterd (iadpaimrmta01.imrmtpd1.prodappiadaev1.oraclevcn.com [127.0.0.1]) by iadpaimrmta01.imrmtpd1.prodappiadaev1.oraclevcn.com (8.17.1.19/8.17.1.19) with ESMTP id 463IkUAm023471; Wed, 3 Jul 2024 20:10:19 GMT Received: from nam10-bn7-obe.outbound.protection.outlook.com (mail-bn7nam10lp2042.outbound.protection.outlook.com [104.47.70.42]) by iadpaimrmta01.imrmtpd1.prodappiadaev1.oraclevcn.com (PPS) with ESMTPS id 404n10k3nd-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 03 Jul 2024 20:10:19 +0000 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=IOSS4zye01odnJ6dmGYHJNmp2H/gvOkb1fKva8X9dBtulQIWMLWW2mKJHSsploONv+AF+e6pb1jj6JNNp7YM2vC8S0cp91s//c/fNKpCwPBIq6xDl2qGDxPlkxt6Miy+44ml/usVsHiIaUrlEwUyBaeSN0ROH0uhZOkfgUZuswWXI26mCdvQVnoH9KBZkuycGKVS6B3fRTmSMF7wLbqMmwSA5kKztjQWM/fc/xaQlbgP5GYKsTOwW7XuPoFf5bzmqHiexIz9Qlel00kf6cv1RSv6OCaOkv3/lrd7E3pVp1WM/ivt0Axe/tWlX1lIC+z/3Qy1korxUBz0mPCpDZesPA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=HscnHnSpPcv+kWUlHrXOWMKVcm4rx7ecXa44uqYENYg=; b=fQxQPu4jFL6M7SGIFnXYlbOipkwyjloo3R77apjTc/JniOtDUqECqUxmMQr4fS8Bk89kXtyb38Gx/Hv8AVXmFSUk2bl/2+kNSzD9De8peZb65mgRmVkPHZIRxlPkDRYAWT9pwfA3/jCHVV2YNNWK0QfsOR55vjKdj0oVjJ44P9nN9XyMD+kUo+G17DnKLYJgcdj8TQz3z4omgzDo0MHtCLV0LS9ihre0Yk6OI+V2vUcSF/hOcaQqVeqaQ8vOFFuqG66H1ccEG0TYLUHjuYXhrwA5ZKbQlXWBVyO6jyIpg+JG+HHpmPvHjaHxix7/GuFGTM1HL82M7YY1Pj5FJ4oMmg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=oracle.com; dmarc=pass action=none header.from=oracle.com; dkim=pass header.d=oracle.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oracle.onmicrosoft.com; s=selector2-oracle-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=HscnHnSpPcv+kWUlHrXOWMKVcm4rx7ecXa44uqYENYg=; b=rCfbs1B5IhSR8h4vafolKrGU83yJfgjqSojKt+L6aNPF1PmTs/uNkOkX+Vz5R7dP3QvlrjUv+g4oxWuaML5rpqHeVb+SP5GQfSHlHPcfClLPq4tt1UIpeCZrHE1nPHK/y1rMiY83nXIGToYcBFfUIrd9UBQpUg2IJzxYTLjkIoU= Received: from SA2PR10MB4636.namprd10.prod.outlook.com (2603:10b6:806:11e::10) by PH0PR10MB5546.namprd10.prod.outlook.com (2603:10b6:510:d9::8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7719.32; Wed, 3 Jul 2024 20:10:14 +0000 Received: from SA2PR10MB4636.namprd10.prod.outlook.com ([fe80::1b3d:bd64:9100:c3fb]) by SA2PR10MB4636.namprd10.prod.outlook.com ([fe80::1b3d:bd64:9100:c3fb%4]) with mapi id 15.20.7719.029; Wed, 3 Jul 2024 20:10:14 +0000 Content-Type: multipart/alternative; boundary="------------KTIRSriEt5vlG0bdMdpqqLB4" Message-ID: Date: Wed, 3 Jul 2024 13:10:04 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.4.0 Subject: Re: [PATCH] [RFC]RISC-V:[gprofng] Mimal support gprofng for riscv Content-Language: en-US To: Yixuan Chen Cc: binutils@sourceware.org, ruud.vanderpas@oracle.com, jiawei@iscas.ac.cn, shihua@iscas.ac.cn, shiyulong@iscas.ac.cn References: <20240630093702.7955-1-oriachiuan@gmail.com> <6c887255-4fc0-a6c1-6dda-e21ea2d734a8@oracle.com> From: Vladimir Mezentsev In-Reply-To: X-ClientProxiedBy: LO4P123CA0400.GBRP123.PROD.OUTLOOK.COM (2603:10a6:600:189::9) To SA2PR10MB4636.namprd10.prod.outlook.com (2603:10b6:806:11e::10) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA2PR10MB4636:EE_|PH0PR10MB5546:EE_ X-MS-Office365-Filtering-Correlation-Id: b182a4b0-7d9b-45ae-6c76-08dc9b9c2546 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|366016|1800799024; X-Microsoft-Antispam-Message-Info: =?utf-8?B?MXkvb3BNeTh0UmpsV2g4eFUzS2U5Y25wcVBHWWd6VjY1dEdyeWpyNnpGL3NP?= =?utf-8?B?UEZqSE54WGxyK3pLSDEreGEyc1FPUTl6QWhMZzVpQXNDVXljazNYNko4c2RS?= =?utf-8?B?SXJVcjA1cUJoNnFlcVRkbDBlSzVaUUs0S1hMZnZJcERWajVaRWdMUG9BbDJa?= =?utf-8?B?NVpOeUFKNTEyMFgzWjljVytnY1VVR0U0a1JNSFlheWYvMHhybjBrdElyWDBQ?= =?utf-8?B?dGVhV2JHWUFBSnhSUTE1T0hGU2kxMGc4VnVBdFY3L3Q1OUNvYUxKMWtHRGIv?= =?utf-8?B?SW5uRHZJKzZ5MVc2TlM1MTdVandxZUV1ZzM3Q0tldGpoSGdDWThFdFIrMWtS?= =?utf-8?B?SjBOQ3Y2S0FoTXlkQXVwRllNMGxGMkJLTXBtQWlqUWx1Z1F3bWYzR3Y0WThN?= =?utf-8?B?OVZXQ2k1QmxBT2tIWk9FTnE4b2RGLzV1TFVHdWZaY0R3QzNlanAwdVB5aEEx?= =?utf-8?B?OHlpVnlzQ2JTaUFpaTAzdnhWd1ZFQm9BVFd0RWo1YWxPNnV5QmI1bmRGUjQv?= =?utf-8?B?VmIxY3dXV3FBVWhCRXRUVFY5RFpQUkxjTkswbmNuY0I5K0ZjMVdIQlcxeC9m?= =?utf-8?B?RnU4OWtvc3RYTWRmYW9TMmlIcDJNRWxIUUdHSzBNb1I1ekVyOHFDWXVOQ0Rl?= =?utf-8?B?OGdUbDFVTWxKMXNYLzBGSFRyWTdDVGFyQU10eG1kRGZFcmpBbFNnUEYxd211?= =?utf-8?B?bjZLUk52cVVXSldiZkcvVnZ2MVlxalZXZmx6c1NxWlVRajNSOVN4UmYwQ2pt?= =?utf-8?B?d3VjclowSHVVVkdORmZYcG5qZnVOQ0c4T0JRWU9TN0ErOFUwb2hHeU9pMDFj?= =?utf-8?B?MXQ3YXhmVHpNbU1tSUFjWkdzNnVkOWMyTCtrdWt6UFo1UUFiNXJTTDBaT3Fo?= =?utf-8?B?WEx5NTBseWZGcUgrSHl0NEQrRkVDaitPeWV4aHhOcDU2UTBwZVFDU0NwcjdK?= =?utf-8?B?Q0N3aUp1d3hvdm9uVlQxM2pMVFBacnVNb0p1Tm1JSVdQdVJ1Y3VHYk9INUJX?= =?utf-8?B?bmc0NWh1Z2xGQ3owQW9Nem5DZkVVZThzT2VmUkQ0a0tWRzhPWFJFcTlZRUVB?= =?utf-8?B?K096dFBiQkhNZkdQYlRFWFE3RDZlWitZb1NxRndPVnNaN0J3djViOFZJWG1Q?= =?utf-8?B?c0FWcURtYTZDdENteDVGeVY0MDNER2dpTHZyY2hTSXpnYUh1WTZxUFB6QmdU?= =?utf-8?B?QUpMQUt3MzFIZzhOWm1HSk5ndmJtVC9VZGZaaUxPN1BmZDJHNTVDeDZyejMy?= =?utf-8?B?azQxQitZeW9GTlU4K0hwTHNnSklkM0RUN0pKUnJjMktMa042d2xZQlBqY05m?= =?utf-8?B?dWRHRTVSTVUrNjBaRm9neS9KcGhGUVpBa3FUR0lJWHhiUDBpbGtjdUtqc1Z4?= =?utf-8?B?NUl3c3YzYVFlaXdhbmxKSWJFZWlXTWxrMUpscURzblk2WWlIdEk5T1g5NUV2?= =?utf-8?B?bXdhY0hIWk9QUk1UL3UxWlRscTlKb1MyTDViV3IxS1RIWExnMW5TaFZINm1D?= =?utf-8?B?Tm5UUEdBTzZETFBaU3ZRVFVkWERWM0VyMXBRZmdEaDl5K0ZZTTVuNHNhZTk0?= =?utf-8?B?V2NEaFFHL1ZxWGFVZUZ1RWNYQVNlUTlnRWxWZ3JTUXNCWU50aDB0bWN5MURm?= =?utf-8?B?L2VNTkFaWG5zYmltbDZTY1RRc1c0QjF0bEc1TDYzYW5tZVhoS3dGSWUzVUJy?= =?utf-8?B?cVRmZ2ZpdHBNbmkxMFlyNDFZcCtreklFUHpXbnJLa21IMWttNjlDWEgxeVhF?= =?utf-8?Q?1kwrfBt7EHo7FhtyNE=3D?= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:SA2PR10MB4636.namprd10.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(376014)(366016)(1800799024);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?B?S3lSd2drT0FJM3ZsRVYyS0xIQ3RGL2FIcUkySnhwNVA5SkJyRXA0N3h4V1hh?= =?utf-8?B?OW9zZklmd1l4NEVSL3JkNWtPUVYxSEtCTWpQVkIra2hXYTJKZGhvUkVoaGVa?= =?utf-8?B?TUwxV2J4RSs2cDdxSGhmdnUzeWlCdW1ab1BqV3BEWDFFMnNXYjk4MCtzYU1Z?= =?utf-8?B?Y2hKNlpaZWJxYTcrUWt3SzRTOU0wWHUwZVc1RnhXQnRFWGxDZmFZNHR3WHJ2?= =?utf-8?B?SjIzOTFKTjBWb3FrOHJLeXdsTHZyR21RMUo5YThRUGNJdVovYURWbnQrR2pV?= =?utf-8?B?akNkTlE1SzBnRlZ3NERRMERXK2sxOURIRXZtZzQ2SUtqMnZiV2lrYlJPanAw?= =?utf-8?B?RC94alpKcmtOQzAzRCtjbldZRUdXRW96a1NDY3BJRFNnek51aHhYSDR3cXVk?= =?utf-8?B?b1A5bm1DdUc1a1NEdXBaYVcyS0oraGE0QUpucVM0VFJYYUliMEIvditDeGZN?= =?utf-8?B?T056RE10b1lRNnkwbXpjMHNDbFV6SWpVQXc2b3hac1dFSEExWnRyUmVPWHRP?= =?utf-8?B?b3dHVWRRSXF5a1oySDArayszTHAzZCtsSXJOTm52Qlo2UFBndGx3S2VGVVFC?= =?utf-8?B?MzN3d1plODI2NW9zcFJwcWs5cDMzZlVvd3d1L3RtNmlTNDUwMzN5MkI0bFBw?= =?utf-8?B?NDd2bjF0Y28veEh5bk1DUlRWcXppakdqcEo2N3YwbDFtc2JjVnE3a1hDZFJM?= =?utf-8?B?aVA2ZXFlVCs5SitDa1N3RzVaak4vTjAzMDhDMEJTcnNlRlBJU01rOFZtSlNZ?= =?utf-8?B?anFHcjhLNTB1ODNocnJ3Yy9Yc3R1Zkl0OEZXa3h3czhwS3lhTkJjYzNoTXZp?= =?utf-8?B?QnpTbUM3MU82N1daRVpXK2Zjdjl1UThWaWFaTmdvNnMvSU5pd050RkIwU0xM?= =?utf-8?B?enV1ZkhzZ2NlajVjbXlUdmNOSFl1WkhUTEpPNitVcXVCaVptdHNYbDFUV1Jl?= =?utf-8?B?cVFrVXJ5Y0ZrNmZjVithOXRZbnRDVVNFbGkyMmpVM3hOaWY2dGxlQUFaeGh3?= =?utf-8?B?dWdabGU4TWVEQUxpMmU4Q21tMk8xOEV1QUdRUEdyWmJNNFMzTjFhV2swcm1w?= =?utf-8?B?dGQrM25ZZDJlbHFNMTYwV2FKSy94cG1pUDI2OVJLZVpnVGRYMGxUYlpyMnBY?= =?utf-8?B?dHg0RjV1dzVCMU1XbVpJOFc2YnY0bUw3NFdIM1RxQkhLUnFtVFBZOTJtTnB4?= =?utf-8?B?dUJtb1N6dHo5TWxvTzZjM1FxZFdHWGRabHYxTWo3ZnZ4VC9mUmFOTlhudXAr?= =?utf-8?B?U3Yva3M0NTJWMGtZVjd4YWJxV2ZpZFNlL2FsWkN0d3E5akRJOU9KQkpHMkdE?= =?utf-8?B?U1FuZVFNd0ZmTVJRNkl3RThHZ3dXQ3RCOTU2SDVOTkdYK0QyUndnZFlyQ0x4?= =?utf-8?B?N1kxNWFxdnRFT0s5bWt2aUVKeXozSC93a2Q2VVo2bzJEdmlwMlVPdjNtZlFX?= =?utf-8?B?RFM3TEhVNlR5UUcrQm44WjBCbktrcnlVQktQWUJFWG04QUlsQ25COHNROVZV?= =?utf-8?B?NHRhejhrRWlodjQ3OTVZanhweFE0eXVhT09KNnVGODZaRXA4YnVRNmJJNm1S?= =?utf-8?B?NmRnbjRNSm00aEpFMW44VW8vV0xwVDFNV2NRLzBvRFVUMUxFQW9sVTJJQW5u?= =?utf-8?B?T0tmMGgwaC9TYkZtbUs4N09FZTZ6aER5RHl1ekJQSmN2N1U4ejVGek91R3ZN?= =?utf-8?B?Wm9mUjFqMGY5Zy9Wdlk4eGppR3FQMG1XWkdSWFZtc1laK2xtL1RTT0tSdk90?= =?utf-8?B?K1hCUUxpN3pnNVBaZVBueURGclhHT0dyY1ZQK2lNanpCM3dvbzcrN2ZoSDlG?= =?utf-8?B?YkRiYTFwdkQxUk1XdnN4bFhLOVdSR0lqYk5aZU5mL0pZa1VSK1hMeHFhK1Vk?= =?utf-8?B?bUpBTWZGM1lwdXBybVNsc2NnZU8yem81a0ozZzRjUWtVSVNlMk8wUGN2a3Qy?= =?utf-8?B?SGJDSkhLWDc3YjdLckpmTFhVK25vK1hMSXNDTUwxYVZhTHFiSWIveHphZWlG?= =?utf-8?B?aklkeDNNVUE3VU5kT0VTOUExTi9kNkczVkpTMFNMZTMwT2JMU2JoOUpVNmFt?= =?utf-8?B?cnlpLzd3T24yUVQxbnMvYzhWODdKMFdUM2phUFFEVzVvUlB5RFl5R0JIcW5s?= =?utf-8?B?VWhJYXJFMFB6d0FuVWNvK2Y3WkhrYitHY2ljOUxWNmt6ZXZVMElyVWowZVB5?= =?utf-8?Q?fqnOiC0iLWXaeiAWt0aPjLoOeTkfEGtlI7EY1rw4sFxQ?= X-MS-Exchange-AntiSpam-ExternalHop-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-ExternalHop-MessageData-0: WY+H/O2Wj7Geg1Ge0m6Q4Eqc7/eovRzSBy78690aotL5oc2jZhWDiLLiGogj/t/3XkZkJkubfJ7nHVdv0igGBya8wuwgn65CNoSgfRo9AeJAkuYgwyJrADWxLCwaWiA+dg326GBXHaeaktN7MoIECFhCpysuT+SM8NODqvId15S6wiTlsRkhIzfvP7iPBcqK8Dv/DnLBBfIPNcTJnDQYRNLSddoju28QDLMsZfYs+QaTPcz6NTZDrUN2eYMo/YpWrc1Fz0pdXy1oxH1quJM9n2ITcF3TkFNvaItZ6ASIFjsOhdxat/V/8Pa8D5hKV64bfDpkUJt4LZ/GQFZ0dGDv1+GSCJa60ifDNXZoyYNjb/aGvNiIo/rkEUzfU3BESm6nke38lGlHfIn+qcK0Fxc1ntNc9Xmr2uiZ9tQ5fuSpj2rCo7INGE/y1rH/rhdhHtw7D1DlDeB7eEd1zvqas/9dj1rdkvHGK1AhaeKc/+HbaPjVnJvpzXwcJI92GWcdlBmJxael4jAAV+dPLj2tc3Hfj3MUbzC5SSYBStgfBMl8zz8YKlZ56Zsb6JAank8o7zMXl1ftUGc3wSv19C7Utii6og/mv/BIWpLl+FAaILzc7N8= X-OriginatorOrg: oracle.com X-MS-Exchange-CrossTenant-Network-Message-Id: b182a4b0-7d9b-45ae-6c76-08dc9b9c2546 X-MS-Exchange-CrossTenant-AuthSource: SA2PR10MB4636.namprd10.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Jul 2024 20:10:13.9693 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 4e2c6054-71cb-48f1-bd6c-3a9705aca71b X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: CaiT0sPFt+//XE33qBYpCQ4IRxmC1b0NozrbOu7G3zwiEs+IgdbfS999/u+uU3qdfFGia+90kHvT95VJ7c9bwK+jO15vLQwWQ4CVjH57GPA= X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH0PR10MB5546 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-07-03_14,2024-07-03_01,2024-05-17_01 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 mlxlogscore=999 phishscore=0 bulkscore=0 adultscore=0 malwarescore=0 spamscore=0 suspectscore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2406180000 definitions=main-2407030148 X-Proofpoint-GUID: 0YLQdVoFZB3iXcaFbzH6Kh6Pq8rHiw98 X-Proofpoint-ORIG-GUID: 0YLQdVoFZB3iXcaFbzH6Kh6Pq8rHiw98 X-Spam-Status: No, score=-12.8 required=5.0 tests=BAYES_00,BODY_8BITS,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,GIT_PATCH_0,HTML_MESSAGE,KAM_SHORT,NICE_REPLY_A,RCVD_IN_DNSWL_LOW,RCVD_IN_MSPIKE_H4,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_NONE,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: --------------KTIRSriEt5vlG0bdMdpqqLB4 Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Hi Yixuan Chen, On 7/3/24 05:38, Yixuan Chen wrote: > Hi Vladimir, > > Thank you very much for your guide. > > Now I use the binutils-gdb master branch to port. But the `Collector > version : `2.41.50'` doesn't change with binutils-gdb version. > The third line of the log could see the binutils version. > > Here comes the log: > ``` > Making all in gp-display-html > make[4]: Entering directory > '/home/xyenchi/binutils-gdb/build/gprofng/gp-display-html' > sed -e 's/BINUTILS_VERSION/2.42.50/' < > ../../../gprofng/gp-display-html/gp-display-html.in > > gp-display-html > chmod +x gp-display-html > make[4]: Leaving directory > '/home/xyenchi/binutils-gdb/build/gprofng/gp-display-html' > Making all in doc > make[4]: Entering directory '/home/xyenchi/binutils-gdb/build/gprofng/doc' > make[4]: Nothing to be done for 'all'. > make[4]: Leaving directory '/home/xyenchi/binutils-gdb/build/gprofng/doc' > make[4]: Entering directory '/home/xyenchi/binutils-gdb/build/gprofng' > make[4]: Leaving directory '/home/xyenchi/binutils-gdb/build/gprofng' > make[3]: Leaving directory '/home/xyenchi/binutils-gdb/build/gprofng' > make[2]: Leaving directory '/home/xyenchi/binutils-gdb/build/gprofng' > make[1]: Leaving directory '/home/xyenchi/binutils-gdb/build' > [xyenchi@qemu-riscv build]$ rm -rf test.1.er/ > [xyenchi@qemu-riscv build]$ ./gprofng/src/gp-collect-app echo 1 This is wrong. You are using the built version of gprofng. But you must use the installed version. For example: cd /home/xyenchi/binutils-gdb/build/ rm -rf * ../configure --prefix=`pwd`/INSTALL  [THE_OTHER_CONFIGURE_OPTIONS] make make install /home/xyenchi/binutils-gdb/build/INSTALL/bin/gprofng collect app -O test.1.er echo 1 *We recommend using `gprofng collect app` instead of calling gp-collect-app directly.* /home/xyenchi/binutils-gdb/build/INSTALL/bin/gprofng display text -func -exp -head test.1.er/ The problem is:   gp-collect-app sets LD_PRELOAD=/libgp-collector.so before starting the user application.   It looks like you did the installation for the old sources and did not reinstall gprofng.   In this case, you used the old libgp-collector.so (2.41.50). Thank you for fixing gprofng. -Vladimir > Creating experiment directory test.1.er (Process > ID: 127275) ... > 1 ./gprofng/src/gp-display-text -func -exp -head test.1.er/v > build]$ ./gprofng/src/gp-display-text -func -exp > -head test.1.er/ > Functions sorted by metric: Exclusive Total CPU Time > > Excl. Total   Incl. Total    Name > CPU           CPU >  sec.      %   sec.      % > 0.      0.    0.      0.     > > ID Sel    PID Experiment > == === ====== ========== >  1 yes 127275 test.1.er/ > Experiment: test.1.er/ > No errors > No warnings > No archive command run > > Target command (64-bit): 'echo 1' > Process pid 127275, ppid 399, pgrp 127275, sid 391 > Current working directory: /home/xyenchi/binutils-gdb/build > Collector version: `2.41.50'; experiment version 12.4 (64-bit) > Host `qemu-riscv', OS `Linux 6.7.0-rc8', page size 4096, architecture > `riscv64' >   0 CPUs, clock speed 0 MHz. >   Memory: 4096267 pages @  4096 = 16001 MB. > Data collection parameters: >   Clock-profiling, interval = 10007 microsecs. >   Periodic sampling, 1 secs. >   Follow descendant processes from: fork|exec|combo > > Experiment started Wed Jul  3 20:09:17 2024 > > Experiment Ended: 0.022871300 > Data Collection Duration: 0.022871300 > ``` > > I only find this code to change the collector > version:https://github.com/bminor/binutils-gdb/blob/afa87be0fc751c158d666a48a9077d26d6ec8666/gprofng/src/Experiment.cc#L1224 > but I don't known how to fix, could you give me some suggestion? > > Best regards, > Yixuan Chen > > Vladimir Mezentsev 于2024年7月2日周二 > 03:39写道: > > Thank you for your work on gprofng. > See my comments below. > > > On 6/30/24 02:37, XYenChi wrote: >> Minimal support RISC-V. Test with qemu. >> >> Result show: >> [xyenchi@qemu-riscv build]$ ./gprofng/src/gp-display-text -fu1.er/p -headtest.2.er/ >> Functions sorted by metric: Exclusive Total CPU Time >> >> Excl. Total Incl. Total Name >> CPU CPU >> sec. % sec. % >> 0. 0. 0. 0. >> >> ID Sel PID Experiment >> == === ====== ========== >> 1 yes 145674test.1.er/ >> Experiment:test.1.er/ >> No errors >> No warnings >> No archive command run >> >> Target command (64-bit): 'echo 1' >> Process pid 145674, ppid 399, pgrp 145674, sid 392 >> Current working directory: /home/xyenchi/binutils-gdb/build >> Collector version: `2.41.50'; experiment version 12.4 (64-bit) > > It looks like you are using an old version of the binutils-gdb source. > The current version is 2.42.50. > > >> Host `qemu-riscv', OS `Linux 6.7.0-rc8', page size 4096, architecture `riscv64' >> 0 CPUs, clock speed 0 MHz. >> Memory: 4096267 pages @ 4096 = 16001 MB. >> Data collection parameters: >> Clock-profiling, interval = 10007 microsecs. >> Periodic sampling, 1 secs. >> Follow descendant processes from: fork|exec|combo >> >> Experiment started Thu Jun 27 16:23:20 2024 >> >> Experiment Ended: 0.040909200 >> Data Collection Duration: 0.040909200 >> >> If build with `allow_undefined_flag=true`, result will be: >> >> [xyenchi@qemu-riscv build]$ ./gprofng/src/gp-display-text -fu1.er/p -headtest.2.er/ >> Functions sorted by metric: Exclusive Total CPU Time >> >> Excl. Total Incl. Total Name >> CPU CPU >> sec. % sec. % >> 0. 0. 0. 0. >> >> ID Sel PID Experiment >> == === ====== ========== >> 1 yes 145674test.1.er/ >> Experiment:test.1.er/ >> No errors >> No warnings >> No archive command run >> >> Target command (64-bit): 'echo 1' >> Process pid 145674, ppid 399, pgrp 145674, sid 392 >> Current working directory: /home/xyenchi/binutils-gdb/build >> Collector version: `2.41.50'; experiment version 12.4 (64-bit) >> Host `qemu-riscv', OS `Linux 6.7.0-rc8', page size 4096, architecture `riscv64' >> 0 CPUs, clock speed 0 MHz. >> Memory: 4096267 pages @ 4096 = 16001 MB. >> Data collection parameters: >> Clock-profiling, interval = 10007 microsecs. >> Periodic sampling, 1 secs. >> Follow descendant processes from: fork|exec|combo >> >> Experiment started Thu Jun 27 16:23:20 2024 >> >> Experiment Ended: 0.040909200 >> Data Collection Duration: 0.040909200 >> >> ChangeLog: >> Minimal support gprofng for RISC-V. >> >> 2024-06-28 Yixuan Chen >> >> * configure: Add RISC-V configure. >> *configure.ac : Add RISC-V configure. >> >> Unknown ChangeLog: >> >> 2024-06-28 Yixuan Chen >> >> * gprofng/common/core_pcbe.c (core_pcbe_init): Add RISC-V vendor. >> (defined): Add RISC-V condition. >> * gprofng/common/cpuid.c (defined): Add head file to use hwprobe. >> (my_cpuid): Add riscv hwprobe. >> * gprofng/common/gp-defs.h (TOK_A_RISCV): Add RISC-V. >> (defined): Add RISC-V. >> (ARCH_RISCV): Add RISC-V. >> * gprofng/common/hwc_cpus.h: Add RISC-V vendor id. >> * gprofng/common/hwcfuncs.h (HW_INTERVAL_TYPE): fix typo. >> * gprofng/configure: Add RISC-V. >> * gprofng/configure.ac : Add RISC-V. >> * gprofng/libcollector/hwprofile.h (ARCH): Add riscv register calling. >> (CONTEXT_PC): Add riscv register calling. >> (CONTEXT_FP): Add riscv register calling. >> (CONTEXT_SP): Add riscv register calling. >> (SETFUNCTIONCONTEXT): Add riscv uc_mcontext calling. >> * gprofng/libcollector/libcol_util.c (__collector_util_init): fix libc calling >> * gprofng/libcollector/libcol_util.h (__collector_cas_32): Add RISC-V. >> (ARCH): >> * gprofng/libcollector/unwind.c (ARCH): Add RISC-V. >> (GET_PC): Add riscv register calling. >> (GET_SP): Add riscv register calling. >> (GET_FP): Add riscv register calling. >> (FILL_CONTEXT): Add riscv uc_mcontext calling. >> * gprofng/src/DbeSession.cc (ARCH): >> * gprofng/src/Disasm.cc (Disasm::disasm_open): Add RISC-V. >> * gprofng/src/Experiment.cc (Experiment::ExperimentHandler::startElement): Add RISC-V. >> * gprofng/src/checks.cc (ARCH): Add RISC-V. >> * gprofng/src/collctrl.cc (_SC_CPUID_MAX): Add if not define _SC_CPUID_MAX condition. Set CPU frequency as 1000 to test but now not show at the test result, will fix with better way to get cpu frequency. >> (Coll_Ctrl::Coll_Ctrl): >> (defined): >> * gprofng/src/dbe_types.h (enum Platform_t):Add RISC-V. >> * gprofng/testsuite/gprofng.display/mttest/gethrtime.c: Add RISC-V. >> >> --- >> configure | 2 +- >> configure.ac | 2 +- >> gprofng/common/core_pcbe.c | 5 ++- >> gprofng/common/cpuid.c | 31 +++++++++++++++++-- >> gprofng/common/gp-defs.h | 5 ++- >> gprofng/common/hwc_cpus.h | 7 +++++ >> gprofng/common/hwcfuncs.h | 2 +- >> gprofng/configure | 4 +++ >> gprofng/configure.ac | 4 +++ >> gprofng/libcollector/hwprofile.h | 10 ++++++ >> gprofng/libcollector/libcol_util.c | 11 ++++++- >> gprofng/libcollector/libcol_util.h | 10 +++--- >> gprofng/libcollector/unwind.c | 16 ++++++++-- >> gprofng/src/DbeSession.cc | 2 ++ >> gprofng/src/Disasm.cc | 2 ++ >> gprofng/src/Experiment.cc | 2 ++ >> gprofng/src/checks.cc | 4 +++ >> gprofng/src/collctrl.cc | 26 +++++++++------- >> gprofng/src/dbe_types.h | 3 +- >> .../gprofng.display/mttest/gethrtime.c | 2 ++ >> 20 files changed, 123 insertions(+), 27 deletions(-) >> >> diff --git a/configure b/configure >> index dd743c58663..e3cbad5752b 100755 >> --- a/configure >> +++ b/configure >> @@ -3145,7 +3145,7 @@ fi >> >> if test "$enable_gprofng" = "yes"; then >> case "${target}" in >> - x86_64-*-linux* | i?86-*-linux* | aarch64-*-linux*) >> + x86_64-*-linux* | i?86-*-linux* | aarch64-*-linux* | riscv64-*-linux*) >> configdirs="$configdirs gprofng" >> ;; >> esac >> diff --git a/configure.ac b/configure.ac >> index 01cfd017273..e63f27e6a29 100644 >> --- a/configure.ac >> +++ b/configure.ac >> @@ -412,7 +412,7 @@ enable_gprofng=$enableval, >> enable_gprofng=yes) >> if test "$enable_gprofng" = "yes"; then >> case "${target}" in >> - x86_64-*-linux* | i?86-*-linux* | aarch64-*-linux*) >> + x86_64-*-linux* | i?86-*-linux* | aarch64-*-linux* | riscv64-*-linux*) >> configdirs="$configdirs gprofng" >> ;; >> esac >> diff --git a/gprofng/common/core_pcbe.c b/gprofng/common/core_pcbe.c >> index b71d46f4e31..ef2a3f83d42 100644 >> --- a/gprofng/common/core_pcbe.c >> +++ b/gprofng/common/core_pcbe.c >> @@ -2754,6 +2754,9 @@ core_pcbe_init (void) >> return 0; >> case X86_VENDOR_Intel: >> break; >> + case ANDES_VENDOR_ID: > > The formatting is wrong. > See a coding standard: > https://sourceware.org/gdb/wiki/Internals%20GDB-C-Coding-Standards#Whitespaces > /*Code indentation*// > //  Lines should be indented with a mix of tabs and spaces. 8 > spaces should be replaced with Tab. >   Vim users could add the following to their ~/.vimrc:// > //  set autoindent tabstop=8 shiftwidth=2// > / > >> + case SIFIVE_VENDOR_ID: >> + case THEAD_VENDOR_ID: >> default: >> return -1; >> } >> @@ -2915,7 +2918,7 @@ core_pcbe_impl_name (void) >> static const char * >> core_pcbe_cpuref (void) >> { >> -#if defined(__aarch64__) >> +#if defined(__aarch64__) || defined(__riscv) >> return ""; >> #elif defined(__i386__) || defined(__x86_64) >> switch (cpuid_getmodel ()) >> diff --git a/gprofng/common/cpuid.c b/gprofng/common/cpuid.c >> index fd98b30c639..c29b6612afe 100644 >> --- a/gprofng/common/cpuid.c >> +++ b/gprofng/common/cpuid.c >> @@ -42,6 +42,11 @@ __get_cpuid (unsigned int op ATTRIBUTE_UNUSED, unsigned int *eax, >> Tprintf (DBG_LT0, "cpuid.c:%d read_cpuid_id() MIDR_EL1=0x%016x\n", __LINE__, *eax); >> return res; >> } >> +#elif defined(__riscv) >> +#include >> +#include >> +#include >> +#include >> #endif >> >> /* >> @@ -104,7 +109,7 @@ my_cpuid (unsigned int op, cpuid_regs_t *regs) >> TprintfT (DBG_LT1, "my_cpuid: __get_cpuid(0x%x, 0x%x, 0x%x, 0x%x, 0x%x) returns %d\n", >> op, regs->eax, regs->ebx, regs->ecx, regs->edx, ret); >> return ret; >> -} >> +} >> #endif >> >> static cpuid_info_t * >> @@ -180,8 +185,30 @@ get_cpuid_info () >> cpi->cpi_model += CPI_MODEL_XTD (regs.eax) << 4; >> break; >> } >> +#elif defined(__riscv) >> + #ifndef __riscv_hwprobe >> + cpi->cpi_vendor = 0; >> + cpi->cpi_family = 0; >> + cpi->cpi_model = 0; >> + #else >> + struct riscv_hwprobe res; >> + res.key = RISCV_HWPROBE_KEY_MVENDORID; >> + cpu_set_t cpu_set; >> + int __riscv_hwprobe (struct riscv_hwprobe *pairs, \ >> + long pair_count, long cpu_count, \ >> + unsigned long *cpus, unsigned long flags) \ >> + { >> + return syscall(__NR_riscv_hwprobe, pairs, pair_count, cpu_count, cpus, flags); >> + } >> + CPU_ZERO(&cpu_set); >> + CPU_SET(0, &cpu_set); >> + long ret = __riscv_hwprobe(&res, 1, 1, &cpu_set, 0); >> + cpi->cpi_vendor = res.value; >> + cpi->cpi_family = 0; >> + cpi->cpi_model = 0; >> + #endif >> #endif >> - return cpi; >> + return cpi; >> } > >  Could you also add a code into read_cpuinfo() > (gprofng/src/collctrl.cc line ~85) > to read cpu_model, cpu_family, etc from /proc/cpu_info. > > >> >> static inline uint_t >> diff --git a/gprofng/common/gp-defs.h b/gprofng/common/gp-defs.h >> index 7cef5550696..891c4d32cf1 100644 >> --- a/gprofng/common/gp-defs.h >> +++ b/gprofng/common/gp-defs.h >> @@ -32,6 +32,7 @@ >> */ >> #define ARCH(x) TOK_A_##x(ARCH) >> #define TOK_A_Aarch64(x) x##_Aarch64 >> +#define TOK_A_RISCV(x) x##_RISCV >> #define TOK_A_SPARC(x) x##_SPARC >> #define TOK_A_Intel(x) x##_Intel >> >> @@ -45,11 +46,13 @@ >> #define ARCH_Intel 1 >> #elif defined(__aarch64__) >> #define ARCH_Aarch64 1 >> +#elif defined(riscv) || defined(__riscv) >> +#define ARCH_RISCV 1 >> #else >> #error "Undefined platform" >> #endif >> >> -#if defined(__sparcv9) || defined(__x86_64) || defined(__aarch64__) >> +#if defined(__sparcv9) || defined(__x86_64) || defined(__aarch64__) || defined(__riscv) >> #define WSIZE_64 1 >> #else >> #define WSIZE_32 1 >> diff --git a/gprofng/common/hwc_cpus.h b/gprofng/common/hwc_cpus.h >> index be820819dd3..b121e4bfb97 100644 >> --- a/gprofng/common/hwc_cpus.h >> +++ b/gprofng/common/hwc_cpus.h >> @@ -111,6 +111,13 @@ enum { >> ARM_CPU_IMP_QCOM = 0x51 >> }; >> >> +// rscv Constants from arch/riscv/include/asm/vendorid_list.h >> +enum { >> + ANDES_VENDOR_ID =0x31e, >> + SIFIVE_VENDOR_ID =0x489, >> + THEAD_VENDOR_ID =0x5b7 >> +}; >> + >> #define AARCH64_VENDORSTR_ARM "ARM" >> >> /* strings below must match those returned by cpc_getcpuver() */ >> diff --git a/gprofng/common/hwcfuncs.h b/gprofng/common/hwcfuncs.h >> index a5f64f2a33f..1a6ee7e30ca 100644 >> --- a/gprofng/common/hwcfuncs.h >> +++ b/gprofng/common/hwcfuncs.h >> @@ -98,7 +98,7 @@ typedef struct { /* supplementary data fields */ >> >> #define HW_INTERVAL_MAX UINT64_MAX >> #define HW_INTERVAL_PRESET(x) (HW_INTERVAL_MAX - ((uint64_t)(x) - 1)) >> -#define HW_INTERVAL_TYPE(x) ((uint64_t) (x) >> +#define HW_INTERVAL_TYPE(x) ((uint64_t) (x)) > > HW_INTERVAL_TYPE is not used. Just remove this line. > > > >> >> /* parsing */ >> #define HWCFUNCS_MAX_ATTRS 20 >> diff --git a/gprofng/configure b/gprofng/configure >> index 1c6a99291be..9ac7a651809 100755 >> --- a/gprofng/configure >> +++ b/gprofng/configure >> @@ -15788,6 +15788,10 @@ build_src= >> build_src=true >> build_collector=true >> ;; >> + riscv*-*-linux*) >> + build_src=true >> + build_collector=true >> + ;; >> esac >> # Check whether --enable-gprofng-tools was given. >> if test "${enable_gprofng_tools+set}" = set; then : >> diff --git a/gprofng/configure.ac b/gprofng/configure.ac >> index 6b8fe262748..b4f2981a487 100644 >> --- a/gprofng/configure.ac >> +++ b/gprofng/configure.ac >> @@ -63,6 +63,10 @@ build_src= >> build_src=true >> build_collector=true >> ;; >> + riscv*-*-linux*) >> + build_src=true >> + build_collector=true >> + ;; >> esac >> AC_ARG_ENABLE(gprofng-tools, >> AS_HELP_STRING([--disable-gprofng-tools], [do not build gprofng/src directory]), >> diff --git a/gprofng/libcollector/hwprofile.h b/gprofng/libcollector/hwprofile.h >> index 23422dd51fa..6517452eef7 100644 >> --- a/gprofng/libcollector/hwprofile.h >> +++ b/gprofng/libcollector/hwprofile.h >> @@ -84,6 +84,16 @@ typedef struct MHwcntr_packet >> (ucp)->uc_mcontext.regs[CONTEXT_PC] = (greg_t)(funcp); \ >> (ucp)->uc_mcontext.regs[CONTEXT_SP] = 0; \ >> (ucp)->uc_mcontext.regs[CONTEXT_FP] = 0; >> + >> +#elif ARCH(RISCV) >> +#define CONTEXT_PC REG_PC >> +#define CONTEXT_FP 8 >> +#define CONTEXT_SP 2 >> +#define SETFUNCTIONCONTEXT(ucp,funcp) \ >> + (ucp)->uc_mcontext.__gregs[CONTEXT_PC] = (greg_t)(funcp); \ >> + (ucp)->uc_mcontext.__gregs[CONTEXT_FP] = 0; \ >> + (ucp)->uc_mcontext.__gregs[CONTEXT_SP] = 0; >> + >> #endif /* ARCH() */ >> >> #endif >> diff --git a/gprofng/libcollector/libcol_util.c b/gprofng/libcollector/libcol_util.c >> index a8802d4a9b0..8ee1c56ff45 100644 >> --- a/gprofng/libcollector/libcol_util.c >> +++ b/gprofng/libcollector/libcol_util.c >> @@ -91,7 +91,7 @@ __collector_gettid () >> #endif >> __asm__ __volatile__(syscall_instr >> : "=a" (r) : "0" (__NR_gettid) >> - : syscall_clobber); >> + : syscall_clobber); >> #else >> r = syscall (__NR_gettid); >> #endif >> @@ -1459,7 +1459,10 @@ __collector_util_init () >> else if ((ptr = dlvsym (libc, "fopen", "GLIBC_2.0")) != NULL) >> __collector_util_funcs.fopen = ptr; >> else >> + { >> ptr = dlsym (libc, "fopen"); >> + if(ptr) __collector_util_funcs.fopen = ptr; >> + } >> if (__collector_util_funcs.fopen == NULL) >> { >> CALL_UTIL (fprintf)(stderr, "COL_ERROR_UTIL_INIT fopen: %s\n", dlerror ()); >> @@ -1475,7 +1478,10 @@ __collector_util_init () >> else if ((ptr = dlvsym (libc, "popen", "GLIBC_2.0")) != NULL) >> __collector_util_funcs.popen = ptr; >> else >> + { >> ptr = dlsym (libc, "popen"); >> + if(ptr) __collector_util_funcs.popen = ptr; >> + } >> if (__collector_util_funcs.popen == NULL) >> { >> CALL_UTIL (fprintf)(stderr, "COL_ERROR_UTIL_INIT popen: %s\n", dlerror ()); >> @@ -1491,7 +1497,10 @@ __collector_util_init () >> else if ((ptr = dlvsym (libc, "fclose", "GLIBC_2.0")) != NULL) >> __collector_util_funcs.fclose = ptr; >> else >> + { >> ptr = dlsym (libc, "fclose"); >> + if(ptr) __collector_util_funcs.fclose = ptr; >> + } >> if (__collector_util_funcs.fclose == NULL) >> { >> CALL_UTIL (fprintf)(stderr, "COL_ERROR_UTIL_INIT fclose: %s\n", dlerror ()); >> diff --git a/gprofng/libcollector/libcol_util.h b/gprofng/libcollector/libcol_util.h >> index c21b4a46c4b..6ac84db05ab 100644 >> --- a/gprofng/libcollector/libcol_util.h >> +++ b/gprofng/libcollector/libcol_util.h >> @@ -209,10 +209,10 @@ static __attribute__ ((always_inline)) inline uint32_t >> __collector_cas_32 (volatile uint32_t *pdata, uint32_t old, uint32_t new) >> { >> uint32_t r; >> - __asm__ __volatile__("lock; cmpxchgl %2, %1" >> - : "=a" (r), "=m" (*pdata) : "r" (new), >> - "a" (old), "m" (*pdata)); >> - return r; >> + __asm__ __volatile__("lock; cmpxchgl %2, %1" >> + : "=a" (r), "=m" (*pdata) : "r" (new), >> + "a" (old), "m" (*pdata)); >> + return r; >> } >> /** >> * This function enables a compare and swap operation to occur atomically. >> @@ -270,7 +270,7 @@ __collector_cas_ptr (void *mem, void *cmp, void *new) >> return r; >> } >> >> -#elif ARCH(Aarch64) >> +#elif ARCH(Aarch64) || ARCH(RISCV) >> static __attribute__ ((always_inline)) inline uint32_t >> __collector_inc_32 (volatile uint32_t *ptr) >> { >> diff --git a/gprofng/libcollector/unwind.c b/gprofng/libcollector/unwind.c >> index ff2f7aa9a7e..1244a453457 100644 >> --- a/gprofng/libcollector/unwind.c >> +++ b/gprofng/libcollector/unwind.c >> @@ -186,8 +186,14 @@ memory_error_func (int status ATTRIBUTE_UNUSED, bfd_vma addr ATTRIBUTE_UNUSED, >> #define GET_PC(ctx) (((ucontext_t*)ctx)->uc_mcontext.regs[15]) >> #define GET_SP(ctx) (((ucontext_t*)ctx)->uc_mcontext.regs[13]) >> #define GET_FP(ctx) (((ucontext_t*)ctx)->uc_mcontext.regs[14]) >> + >> +#elif ARCH(RISCV) >> +#define GET_PC(ctx) (((ucontext_t*)ctx)->uc_mcontext.__gregs[REG_PC]) >> +#define GET_SP(ctx) (((ucontext_t*)ctx)->uc_mcontext.__gregs[2]) >> +#define GET_FP(ctx) (((ucontext_t*)ctx)->uc_mcontext.__gregs[8]) >> #endif /* ARCH() */ >> >> + >> /* >> * FILL_CONTEXT() for all platforms >> * Could use getcontext() except: >> @@ -230,13 +236,19 @@ memory_error_func (int status ATTRIBUTE_UNUSED, bfd_vma addr ATTRIBUTE_UNUSED, >> context->uc_stack.ss_size = 0x100000; \ >> } >> >> -#elif ARCH(Aarch64) >> +#elif ARCH(Aarch64) >> #define FILL_CONTEXT(context) \ >> { CALL_UTIL (getcontext) (context); \ >> context->uc_mcontext.sp = (__u64) __builtin_frame_address(0); \ >> } >> >> -#endif /* ARCH() */ >> +#elif ARCH(RISCV) >> +#define FILL_CONTEXT(context) \ >> + { CALL_UTIL(getcontext)(context); \ >> + context->uc_mcontext.__gregs[2] = (uint64_t) __builtin_frame_address(0); \ >> + } >> + >> +#endif/* ARCH() */ >> >> static int >> getByteInstruction (unsigned char *p) >> diff --git a/gprofng/src/DbeSession.cc b/gprofng/src/DbeSession.cc >> index 86541d97f2e..3c218b5fc91 100644 >> --- a/gprofng/src/DbeSession.cc >> +++ b/gprofng/src/DbeSession.cc >> @@ -94,6 +94,8 @@ Platform_t DbeSession::platform = >> Sparc; >> #elif ARCH(Aarch64) >> Aarch64; >> +#elif ARCH(RISCV) >> + RISCV; >> #else // ARCH(Intel) >> Intel; >> #endif >> diff --git a/gprofng/src/Disasm.cc b/gprofng/src/Disasm.cc >> index 9c7e59a590b..19e6f15ff6f 100644 >> --- a/gprofng/src/Disasm.cc >> +++ b/gprofng/src/Disasm.cc >> @@ -208,6 +208,7 @@ Disasm::disasm_open () >> case Amd64: >> need_swap_endian = (DbeSession::platform == Sparc); >> break; >> + case RISCV: >> case Sparcv8plus: >> case Sparcv9: >> case Sparc: >> @@ -246,6 +247,7 @@ Disasm::disasm_open () >> dis_info.arch = bfd_arch_i386; >> dis_info.mach = bfd_mach_x86_64; >> break; >> + case RISCV: >> case Sparcv8plus: >> case Sparcv9: >> case Sparc: >> diff --git a/gprofng/src/Experiment.cc b/gprofng/src/Experiment.cc >> index 1378ad5ce07..ac78276d23c 100644 >> --- a/gprofng/src/Experiment.cc >> +++ b/gprofng/src/Experiment.cc >> @@ -542,6 +542,8 @@ Experiment::ExperimentHandler::startElement (char*, char*, char *qName, Attribut >> exp->platform = Intel; >> else if (strcmp (str, "aarch64") == 0) >> exp->platform = Aarch64; >> + else if (strcmp (str, "riscv64") == 0) >> + exp->platform = RISCV; > >  The formatting is wrong. > It looks like in your environment the tab size is 4 spaces, but in > the GNU standard it is 8. > >> else >> exp->platform = Sparc; >> exp->need_swap_endian = (DbeSession::platform == Sparc) ? >> diff --git a/gprofng/src/checks.cc b/gprofng/src/checks.cc >> index 094c3bbc60a..2f9fbd7f714 100644 >> --- a/gprofng/src/checks.cc >> +++ b/gprofng/src/checks.cc >> @@ -332,6 +332,10 @@ collect::check_executable_arch (Elf *elf) >> case EM_AARCH64: >> is_64 = true; >> break; >> +#elif ARCH(RISCV) >> + case EM_RISCV: >> + is_64 = true; >> + break; > > Again formatting. > > >> #endif >> default: >> return EXEC_ELF_ARCH; >> diff --git a/gprofng/src/collctrl.cc b/gprofng/src/collctrl.cc >> index 5d68b689a64..1b04e52b5cc 100644 >> --- a/gprofng/src/collctrl.cc >> +++ b/gprofng/src/collctrl.cc >> @@ -51,9 +51,9 @@ extern const char *strsignal (int); >> #endif >> >> // _SC_CPUID_MAX is not available on 2.6/2.7 >> -#ifndef _SC_CPUID_MAX >> -#define _SC_CPUID_MAX 517 >> -#endif >> + >> +// #define _SC_CPUID_MAX 517 >> +// #endif > > These lines are missing in latest sources. > The latest sources are here: > https://sourceware.org/git/binutils-gdb.git. > > > The 2.43 release will be on Sunday 14th July. > It will be good if your fixes are included in this release. > > -Vladimir > > >> >> const char *get_fstype (char *); >> >> @@ -74,15 +74,16 @@ Coll_Ctrl::Coll_Ctrl (int _interactive, bool _defHWC, bool _kernelHWC) >> default_stem = strdup ("test"); >> >> /* get CPU count and processor clock rate */ >> + #ifndef _SC_CPUID_MAX >> + ncpus = sysconf (_SC_NPROCESSORS_CONF); >> + /* add 2048 to count, since on some systems CPUID does not start at zero */ >> + ncpumax = ncpus + 2048; >> + #elif >> ncpumax = sysconf (_SC_CPUID_MAX); >> - if (ncpumax == -1) >> - { >> - ncpus = sysconf (_SC_NPROCESSORS_CONF); >> - /* add 2048 to count, since on some systems CPUID does not start at zero */ >> - ncpumax = ncpus + 2048; >> - } >> - ncpus = 0; >> - cpu_clk_freq = 0; >> + #endif >> + >> + //ncpus = 0; >> + //cpu_clk_freq = 0; >> >> // On Linux, read /proc/cpuinfo to get CPU count and clock rate >> // Note that parsing is different on SPARC and x86 >> @@ -115,6 +116,9 @@ Coll_Ctrl::Coll_Ctrl (int _interactive, bool _defHWC, bool _kernelHWC) >> #elif defined(__aarch64__) >> asm volatile("mrs %0, cntfrq_el0" : "=r" (cpu_clk_freq)); >> >> +#elif defined(__riscv) >> + cpu_clk_freq = 1000; >> + >> #else >> FILE *procf = fopen ("/proc/cpuinfo", "r"); >> if (procf != NULL) >> diff --git a/gprofng/src/dbe_types.h b/gprofng/src/dbe_types.h >> index 9fa842ce85d..c67d421566e 100644 >> --- a/gprofng/src/dbe_types.h >> +++ b/gprofng/src/dbe_types.h >> @@ -42,7 +42,8 @@ enum Platform_t >> Sparcv8plus, >> Java, >> Amd64, >> - Aarch64 >> + Aarch64, >> + RISCV >> }; >> >> enum WSize_t >> diff --git a/gprofng/testsuite/gprofng.display/mttest/gethrtime.c b/gprofng/testsuite/gprofng.display/mttest/gethrtime.c >> index da39821027f..5e2cc3dc97b 100644 >> --- a/gprofng/testsuite/gprofng.display/mttest/gethrtime.c >> +++ b/gprofng/testsuite/gprofng.display/mttest/gethrtime.c >> @@ -32,6 +32,8 @@ >> #define SPARC 1 >> #elif defined(__aarch64__) >> #define Aarch64 1 >> +#elif defined(__riscv) >> +#define RISCV 1 >> #else >> #define Intel 1 >> #endif > --------------KTIRSriEt5vlG0bdMdpqqLB4--