From: mengqinggang <mengqinggang@loongson.cn>
To: WANG Xuerui <i.swmail@xen0n.name>, binutils@sourceware.org
Cc: Chenghua Xu <xuchenghua@loongson.cn>,
Zhensong Liu <liuzhensong@loongson.cn>,
Lulu Cheng <chenglulu@loongson.cn>,
Fangrui Song <maskray@google.com>, Xi Ruoyao <xry111@xry111.site>,
WANG Xuerui <git@xen0n.name>
Subject: Re: [PATCH v6 0/7] LoongArch: disassembler improvements & deprecate old register aliases
Date: Thu, 29 Jun 2023 21:10:38 +0800 [thread overview]
Message-ID: <ab4351f6-b2fa-3677-a6a7-af1fbb3eb50f@loongson.cn> (raw)
In-Reply-To: <20230629061029.29773-1-i.swmail@xen0n.name>
Hi,
There still some errors when run "make check" configured with
--target=loongarch32-unknown-linux-gnu
and
--target=loongarch64-unknown-linux-gnu.
在 2023/6/29 下午2:10, WANG Xuerui 写道:
> From: WANG Xuerui <git@xen0n.name>
>
> Hi,
>
> This series implements colored output for LoongArch disassembly, and
> some minor tweaks to the output so there is less clutter. While at it,
> also deprecate the aliases $v0, $v1, $fv0, $fv1 and $x, so users don't
> find it confusing in an era when $vrNN and $xrNN (LSX/LASX registers)
> are also available. The patch is included last because its test case
> would need tweaking if the disassembler changes first get merged anyway.
>
> The 4th revision was sent back in February but at that time the Loongson
> maintainers were busy with linker relaxation support; now that the work
> was done let's try upstreaming this series again, hopefully for
> inclusion in binutils 2.41.
>
> Changes from v5:
>
> - Rebased
> - Added DCO (Signed-off-by) tags and changelog entries (I hate them but
> it seems LoongArch patches usually carry some, so I went for
> consistency)
> - Absorbed the https://sourceware.org/pipermail/binutils/2023-June/128073.html
> patch
> - Minor tweaks to the commit messages
>
> Changes from v4:
>
> - Rebased (mainly test case changes)
>
> Changes from v3:
>
> - Fixed ld test cases (make check-gas and make check-ld both pass on
> x86_64 and loongarch64)
> - Branch target address is now correctly printed in comment style, plus
> code simplification as suggested
>
> Changes from v2:
>
> - Fixed test cases
> - Added the fixed "LoongArch: support disassembling certain pseudo-
> instructions" patch into this series
> - Fixed ".insn" in the last patch to say ".word" instead (MIPS muscle
> memory strikes back hard)
> - Fixed some commit messages
> - Added mengqinggang to Cc list
>
> WANG Xuerui (7):
> LoongArch: support disassembling certain pseudo-instructions
> opcodes/loongarch: remove unused code
> opcodes/loongarch: implement style support in the disassembler
> opcodes/loongarch: style disassembled address offsets as such
> opcodes/loongarch: do not print hex notation for signed immediates
> opcodes/loongarch: print unrecognized insn words with the .word
> directive
> LoongArch: Deprecate $v[01], $fv[01] and $x names per spec
>
> gas/config/tc-loongarch.c | 45 ++++++-
> gas/testsuite/gas/loongarch/64_pcrel.d | 2 +-
> .../gas/loongarch/deprecated_reg_aliases.d | 17 +++
> .../gas/loongarch/deprecated_reg_aliases.l | 7 ++
> .../gas/loongarch/deprecated_reg_aliases.s | 5 +
> gas/testsuite/gas/loongarch/imm_ins.d | 84 ++++++-------
> gas/testsuite/gas/loongarch/imm_ins_32.d | 54 ++++----
> gas/testsuite/gas/loongarch/imm_op.d | 44 +++----
> gas/testsuite/gas/loongarch/jmp_op.d | 44 +++----
> gas/testsuite/gas/loongarch/li.d | 8 +-
> gas/testsuite/gas/loongarch/load_store_op.d | 80 ++++++------
> gas/testsuite/gas/loongarch/macro_op.d | 4 +-
> gas/testsuite/gas/loongarch/macro_op_32.d | 4 +-
> .../gas/loongarch/macro_op_large_abs.d | 12 +-
> .../gas/loongarch/macro_op_large_pc.d | 12 +-
> gas/testsuite/gas/loongarch/nop.d | 2 +-
> gas/testsuite/gas/loongarch/privilege_op.d | 8 +-
> gas/testsuite/gas/loongarch/raw-insn.d | 11 ++
> gas/testsuite/gas/loongarch/raw-insn.s | 7 ++
> gas/testsuite/gas/loongarch/relax_align.d | 6 +-
> gas/testsuite/gas/loongarch/reloc.d | 2 +-
> gas/testsuite/gas/loongarch/uleb128.d | 22 ++--
> include/opcode/loongarch.h | 11 +-
> ld/testsuite/ld-loongarch-elf/jmp_op.d | 40 +++---
> ld/testsuite/ld-loongarch-elf/macro_op.d | 24 ++--
> ld/testsuite/ld-loongarch-elf/macro_op_32.d | 4 +-
> ld/testsuite/ld-loongarch-elf/relax-align.dd | 4 +-
> opcodes/disassemble.c | 5 +
> opcodes/loongarch-dis.c | 118 ++++++++----------
> opcodes/loongarch-opc.c | 81 +++++++-----
> 30 files changed, 424 insertions(+), 343 deletions(-)
> create mode 100644 gas/testsuite/gas/loongarch/deprecated_reg_aliases.d
> create mode 100644 gas/testsuite/gas/loongarch/deprecated_reg_aliases.l
> create mode 100644 gas/testsuite/gas/loongarch/deprecated_reg_aliases.s
> create mode 100644 gas/testsuite/gas/loongarch/raw-insn.d
> create mode 100644 gas/testsuite/gas/loongarch/raw-insn.s
>
prev parent reply other threads:[~2023-06-29 13:10 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-29 6:10 WANG Xuerui
2023-06-29 6:10 ` [PATCH v6 1/7] LoongArch: support disassembling certain pseudo-instructions WANG Xuerui
2023-06-29 6:10 ` [PATCH v6 2/7] opcodes/loongarch: remove unused code WANG Xuerui
2023-06-29 6:10 ` [PATCH v6 3/7] opcodes/loongarch: implement style support in the disassembler WANG Xuerui
2023-06-29 6:10 ` [PATCH v6 4/7] opcodes/loongarch: style disassembled address offsets as such WANG Xuerui
2023-06-29 6:10 ` [PATCH v6 5/7] opcodes/loongarch: do not print hex notation for signed immediates WANG Xuerui
2023-06-29 6:10 ` [PATCH v6 6/7] opcodes/loongarch: print unrecognized insn words with the .word directive WANG Xuerui
2023-06-29 6:10 ` [PATCH v6 7/7] LoongArch: Deprecate $v[01], $fv[01] and $x names per spec WANG Xuerui
2023-06-29 13:10 ` mengqinggang [this message]
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