From: Thomas Preudhomme <thomas.preudhomme@foss.arm.com>
To: Richard Earnshaw <richard.earnshaw@arm.com>,
Nick Clifton <nickc@redhat.com>, Alan Modra <amodra@gmail.com>,
"binutils@sourceware.org" <binutils@sourceware.org>
Subject: [PATCH, GAS] Add new macro for Thumb-only opcodes
Date: Fri, 01 Dec 2017 14:50:00 -0000 [thread overview]
Message-ID: <ad47372d-c49d-7685-d886-a4e7b83fe562@foss.arm.com> (raw)
In-Reply-To: <0df79b37-ad12-8c76-53fd-fa2a0d30f9bf@foss.arm.com>
[-- Attachment #1: Type: text/plain, Size: 680 bytes --]
Hi,
Armv8-M Security Extensions introduced some Thumb-only opcodes
(eg. sg). These are defined using the TUE and TCE macros, setting the
Arm execution state related fields to 0/NULL.
This patch adds 2 new macros to avoid filling this field and clearly
identify Thumb-only instructions.
ChangeLog entry is as follows:
*** gas/ChangeLog ***
2017-11-13 Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/tc-arm.c (ToC): Define macro.
(ToU): Likewise.
(insns): Make use of above macros for new instructions introduced in
Armv8-M.
Testing: Testsuite run while targeting arm-none-eabi systems shows no
regression.
Is this ok for master branch?
Best regards,
Thomas
[-- Attachment #2: add_macro_thumb-only_opcode.patch --]
[-- Type: text/x-patch, Size: 2242 bytes --]
diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c
index 17eded3524fad042b65434c4a783de4ec69c4ade..c304fa61769e6de8a9278fe6fcb5b2f174e614c0 100644
--- a/gas/config/tc-arm.c
+++ b/gas/config/tc-arm.c
@@ -19395,6 +19395,17 @@ static struct asm_barrier_opt barrier_opt_names[] =
#define C3(mnem, op, nops, ops, ae) \
{ #mnem, OPS##nops ops, OT_cinfix3, 0x##op, 0x0, ARM_VARIANT, 0, do_##ae, NULL }
+/* Thumb-only variants of TCE and TUE. */
+#define ToC(mnem, top, nops, ops, te) \
+ { mnem, OPS##nops ops, OT_csuffix, 0x0, 0x##top, 0, THUMB_VARIANT, NULL, \
+ do_##te }
+ //TCE (mnem, 0, top, nops, ops, NULL, te)
+
+#define ToU(mnem, top, nops, ops, te) \
+ { mnem, OPS##nops ops, OT_unconditional, 0x0, 0x##top, 0, THUMB_VARIANT, \
+ NULL, do_##te }
+ //TUE(mnem, 0, top, nops, ops, NULL, te)
+
/* Legacy mnemonics that always have conditional infix after the third
character. */
#define CL(mnem, op, nops, ops, ae) \
@@ -21429,20 +21440,20 @@ static const struct asm_opcode insns[] =
#define ARM_VARIANT NULL
#undef THUMB_VARIANT
#define THUMB_VARIANT & arm_ext_v8m
- TUE("sg", 0, e97fe97f, 0, (), 0, noargs),
- TCE("blxns", 0, 4784, 1, (RRnpc), 0, t_blx),
- TCE("bxns", 0, 4704, 1, (RRnpc), 0, t_bx),
- TCE("tt", 0, e840f000, 2, (RRnpc, RRnpc), 0, tt),
- TCE("ttt", 0, e840f040, 2, (RRnpc, RRnpc), 0, tt),
- TCE("tta", 0, e840f080, 2, (RRnpc, RRnpc), 0, tt),
- TCE("ttat", 0, e840f0c0, 2, (RRnpc, RRnpc), 0, tt),
+ ToU("sg", e97fe97f, 0, (), noargs),
+ ToC("blxns", 4784, 1, (RRnpc), t_blx),
+ ToC("bxns", 4704, 1, (RRnpc), t_bx),
+ ToC("tt", e840f000, 2, (RRnpc, RRnpc), tt),
+ ToC("ttt", e840f040, 2, (RRnpc, RRnpc), tt),
+ ToC("tta", e840f080, 2, (RRnpc, RRnpc), tt),
+ ToC("ttat", e840f0c0, 2, (RRnpc, RRnpc), tt),
/* FP for ARMv8-M Mainline. Enabled for ARMv8-M Mainline because the
instructions behave as nop if no VFP is present. */
#undef THUMB_VARIANT
#define THUMB_VARIANT & arm_ext_v8m_main
- TCE("vlldm", 0, ec300a00, 1, (RRnpc), 0, rn),
- TCE("vlstm", 0, ec200a00, 1, (RRnpc), 0, rn),
+ ToC("vlldm", ec300a00, 1, (RRnpc), rn),
+ ToC("vlstm", ec200a00, 1, (RRnpc), rn),
};
#undef ARM_VARIANT
#undef THUMB_VARIANT
next prev parent reply other threads:[~2017-12-01 14:50 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-12-01 14:40 [PATCH, GAS] No IT usage deprecation for ARMv8-M Thomas Preudhomme
2017-12-01 14:42 ` [PATCH, GAS] Enable conditional Armv8-M instructions Thomas Preudhomme
2017-12-01 14:50 ` Thomas Preudhomme [this message]
2017-12-18 13:37 ` [PATCH, GAS] Add new macro for Thumb-only opcodes Nick Clifton
2017-12-18 13:36 ` [PATCH, GAS] Enable conditional Armv8-M instructions Nick Clifton
2017-12-18 13:35 ` [PATCH, GAS] No IT usage deprecation for ARMv8-M Nick Clifton
2018-01-15 14:25 ` Thomas Preudhomme
2018-01-15 14:41 ` Thomas Preudhomme
2018-01-16 11:22 ` Nick Clifton
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=ad47372d-c49d-7685-d886-a4e7b83fe562@foss.arm.com \
--to=thomas.preudhomme@foss.arm.com \
--cc=amodra@gmail.com \
--cc=binutils@sourceware.org \
--cc=nickc@redhat.com \
--cc=richard.earnshaw@arm.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).