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Content-Language: en-US To: "Hu, Lin1" Cc: "Lu, Hongjiu" , "ccoutant@gmail.com" , "binutils@sourceware.org" , "Cui, Lili" References: <20231102112911.2372810-1-lili.cui@intel.com> <20231102112911.2372810-8-lili.cui@intel.com> From: Jan Beulich In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-ClientProxiedBy: FR4P281CA0357.DEUP281.PROD.OUTLOOK.COM (2603:10a6:d10:f4::18) To DU2PR04MB8790.eurprd04.prod.outlook.com (2603:10a6:10:2e1::23) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DU2PR04MB8790:EE_|DBBPR04MB7804:EE_ X-MS-Office365-Filtering-Correlation-Id: ac156794-a866-48a0-4f63-08dbe1d2fea1 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: sQMEKT1s96P9TNvgyW+Of6JJO3WtifxgRFxBiiMbldn6EAfwEVIsivTM8+ViOYI+qCBp10VueGSiBK5NCJ68BWgClTcQW+fo0UExfkb8rINxXBl9qhtgHE7noDS5Yu3hAavxdvjrBNHG/1cMTjLkb/dECNKMv4rSQz2MCvucQbtOxl3F8uyzFkBF/h8qdLfspoLl0NojFDHBsOybNCTWnLzkuuMS97csBxZeyhVdgR1cQY7eQGDnr2mcMTkU+nYc4J5Vy8f0kuQjvcyRbbyR6KnC4/XMV8KvexFBw2Y7Ju/Tfzb9+TAC35g4Q4TQfPyos06aT1yzKa4PAWgFxQN0wMMbsqtvnrc3bo56d0MJpAeVPbqTjJh0F/rnM8isNO4C/YYhX2O9uosrvgbLLi1MS5DRd5dXM4bsoSudMo+ucmKkTkZQscHMuHk00cTrRsIubV8+giK8DbGBnHeNr0fGeMdxJCNEOWvBTU3QhoFB0LJeVUAy0VHOhaaBs8jDj7AVpgwCmU5e+xA03mywbbp050kdwMZor6b36qOmWyvJ8DzrQUd3iV5vgW1Dbs/avl8EW/R8SW8Ja2EEz3vIx62+Gabm6fIYlPtCg9gkLqpR2nWgT6uJGBoahIdRutlv1yZ6dU86IanRzznop5SXsN4MQjrW+Tv5rOOrfIF8k1XncbO90XoP3lMwtm0W966U1LK8 X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:DU2PR04MB8790.eurprd04.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230031)(376002)(396003)(346002)(136003)(366004)(39860400002)(230173577357003)(230922051799003)(230273577357003)(64100799003)(1800799009)(451199024)(186009)(66899024)(36756003)(4326008)(478600001)(5660300002)(83380400001)(6506007)(8676002)(2906002)(31686004)(2616005)(66556008)(66476007)(6486002)(66946007)(26005)(316002)(6916009)(54906003)(6512007)(53546011)(31696002)(38100700002)(86362001)(41300700001)(8936002)(43740500002)(45980500001);DIR:OUT;SFP:1101; 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Someone reading just this mail can't tell who ... >> Similarly I'm concerned of the ND form of CFCMOVcc, which isn't there yet in >> the patches, but which will also need excluding from this optimization. Obviously >> this concern then extends to any future ND- encoded insns, which (likely) won't >> have legacy-encoded (and hence >> REX2-encodable) counterparts. Are there any plans how to deal with such? >> (There's a possible approach mentioned further down.) ... originally said this. > Looking at other current NDD instructions, it should be possible to use evex encoding even if it doesn't have rex2 encoding. Should be possible - yes. But why would you do such a transformation? That's not an optimization at all, afaict. And we shouldn't alter what the programmer wrote if the result isn't in at least some respect deemed better than the original. Considering this, the helper function may want further naming differently than already suggested, to e.g. convert_NDD_to_REX2(). >>> + unsigned int src2 = (i.operands > 3) ? i.operands - 3 : 0; >>> + >>> + if (i.types[src1].bitfield.class == Reg >>> + && i.op[src1].regs == i.op[dest].regs) >>> + readonly_var = src2; >> >> As can be seen in the testcase, this also results in ADCX/ADOX to be converted to >> non-ND EVEX forms, i.e. even when that's not a win at all. >> We shouldn't change what the user has written when the encoding doesn't >> actually improve. (Or else, but I'd be hesitant to accept that, at the very least the >> effect would need pointing out in the description or even a code comment, so >> that later on it is possible to figure out whether that was intentional or an >> oversight.) >> >> This is where my template ordering remark in reply to patch 5 comes into play: >> Whether invoking re-parse is okay would further need to depend on whether an >> alternative (earlier) template actually allows >> REX2 encoding (same base-opcode could be one of the criteria for how far to >> look back through earlier templates; an option might also be to put the 3- >> operand templates first, so that looking backwards wouldn't be necessary in the >> first place). This would then likely also address one of the forward looking >> concerns I've raised above. >> > > Indeed, adcx's legacy insn can't support rex2. > > For my problem, I prefer to re-order templates order, because, I hadn't thought of a way to simply move t to the farthest same base_opcode template for the moment. The following is a tentative scenario: the order will be ndd evex - rex2 - evex. Yes, this matches my understanding / expectation. > And I will need a tmp_variable to avoid the insn doesn't match the rex2, let me backtrack the match's result and the value of i. This, however, I'm not convinced of. I'd rather see this vaguely in line with 58bceb182740 ("x86: prefer VEX encodings over EVEX ones when possible"): Do another full matching round with the removed operand, arranging for "internal error" to be raised in case that fails. Your approach would, I think, result in silent bad code generation in case something went wrong. Thing is - you don't even need to advance (or backtrack) t in that case >>> + readonly_var = src1; >>> + if (readonly_var != (unsigned int) ~0) >>> + { >>> + --i.operands; >>> + --i.reg_operands; >>> + --i.tm.operands; >>> + >>> + if (readonly_var != src2) >>> + swap_2_operands (readonly_var, src2); >> >> May I suggest that just out of precaution the swapping be done before operand >> counts are decremented? In principle swap_2_operands() could do with having >> assertions added as to it actually dealing with valid operands. (You'll note that >> elsewhere, when we add a new operand, we increment first and then swap.) >> > > Indeed, it's safer, I've exchanged the order of execution, do you have any other comments on the assertions (If I understand correctly, there is a desire for some gcc_assert?), for the time being I can guarantee that the two indexes are definitely in range, is there anything else that needs to be judged? That was a remark towards possible future changes, independent of your work here. I merely want to make sure that possibly introducing such an assertion wouldn't require code changes elsewhere when that can be easily avoided right away. >>> @@ -7728,6 +7766,14 @@ match_template (char mnem_suffix) >>> i.memshift = memshift; >>> } >>> >>> + /* If we can optimize a NDD insn to non-NDD insn, like >>> + add %r16, %r8, %r8 -> add %r16, %r8, then rematch template. */ >>> + if (optimize == 1 && optimize_NDD_to_nonNDD (t)) >> >> So you do this optimization at -O1, but not at -O2? Imo the "== 1" >> simply needs dropping. Furthermore the {nooptimize} and {evex} pseudo >> prefixes need respecting. Quite likely respecting {evex} would eliminate the need >> for the explicit .has_nf check in the helper function, as I expect .vec_encoding to >> be set alongside that bit anyway. Further quite likely respecting {evex} here will >> mean that in patch 3 you need to introduce a new enumerator (e.g. >> vex_encoding_egpr, vaguely similar to vex_encoding_evex512), to avoid >> setting .vec_encoding to vex_encoding_evex when an eGPR is parsed. >> >> As to optimization level: In build_vex_prefix() we leverage C only at -O2 or >> higher (including -Os). We may want to be consistent in this regard here (i.e. by >> an extra check in the helper function). >> > > It's a mistake, I have fixed it. The conditions will be. I will try later, after the NF patch is done, to see if the constraint i.has_nf can be removed or not. > > /* If we can optimize a NDD insn to non-NDD insn, like > add %r16, %r8, %r8 -> add %r16, %r8, then rematch template. */ > - if (optimize == 1 && optimize_NDD_to_nonNDD (t)) > + if (!i.no_optimize && i.vec_encoding != vex_encoding_evex > + && optimize && optimize_NDD_to_nonNDD (t)) > { Regardless of what the final expression is going to be, please keep the check of "optimize" first, such that the common case of optimization being disabled will be impacted as little as possible. >>> + { >>> + t = current_templates->start - 1; >> >> As per a remark further up, this adjustment could be avoided if the ND templates >> came ahead of the legacy ones. They can't be wrongly used in place of the >> legacy ones, due to the extra operand they require. Then a comment here would >> merely point out this ordering aspect. But of course care will then need to be >> taken to not go past i386_optab[]'s bounds (by having suitably ordered >> conditionals when looking for whether there is an alternative template in the >> first place; again see the respective remark further up). >> > > Yes, if we reorder the template's order, I will remove the line. Only one example of a possible implementation is given here: > > } > > + bool have_converted_NDD_to_nonNDD = false; > + i386_insn tmp_i; > + > + if (!i.no_optimize && i.vec_encoding != vex_encoding_evex > + && optimize && !have_converted_NDD_to_nonNDD > + && convert_NDD_to_nonNDD (t)) > + { > + have_converted_NDD_to_nonNDD = true; > + tmp_i = i; > + } > + > /* We've found a match; break out of loop. */ > break; > } > @@ -7787,6 +7802,9 @@ match_template (char mnem_suffix) > return NULL; > } > > + if (have_converted_to_nonNDD) > + i = tmp_i; > + > if (!quiet_warnings) I have to admit that I don't understand what the goal is of this playing with i and tmp_i. >> For all of the changes below (which are a little hard to review in email), aiui they >> only add C as needed. I once again would prefer if that attribute could be added >> right as the templates are introduced, with the description stating the intention >> and that the actual use of the attribute will be added later (i.e. as expressed >> earlier already for NF). > > After the changes are finalized, I'll break out this part of the modification that adds the C to lili so she can put it where it belongs. Hmm, that will need doing early, as the NDD patch is hopefully going to land soon-ish. Same for the template re-ordering (which will need explaining when pulled ahead, but it will want pulling ahead to reduce churn). Jan