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[87.115.72.15]) by smtp.gmail.com with ESMTPSA id p5-20020a5d59a5000000b0021d20461bbbsm22579421wrr.88.2022.07.05.05.46.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 05 Jul 2022 05:46:08 -0700 (PDT) From: Andrew Burgess To: binutils@sourceware.org Cc: Andrew Burgess Subject: [PATCHv2 1/2] opcodes: add new sub-mnemonic disassembler style Date: Tue, 5 Jul 2022 13:46:00 +0100 Message-Id: X-Mailer: git-send-email 2.25.4 In-Reply-To: References: MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: 8bit Content-Type: text/plain; charset="US-ASCII"; x-default=true X-Spam-Status: No, score=-10.8 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_BARRACUDACENTRAL, RCVD_IN_DNSWL_LOW, SPF_HELO_NONE, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 05 Jul 2022 12:46:15 -0000 When adding libopcodes disassembler styling support for AArch64, it feels like the results would be improved by having a new sub-mnemonic style. This will be used in cases like: add w16, w7, w1, uxtb #2 ^^^^----- Here And: cinc w0, w1, ne ^^----- Here This commit just adds the new style, and prepares objdump to handle the style. A later commit will add AArch64 styling, and will actually make use of the style. As this style is currently unused, there should be no user visible changes after this commit. --- binutils/objdump.c | 2 ++ include/dis-asm.h | 7 +++++++ 2 files changed, 9 insertions(+) diff --git a/binutils/objdump.c b/binutils/objdump.c index 67824053527..4076587151c 100644 --- a/binutils/objdump.c +++ b/binutils/objdump.c @@ -2167,6 +2167,7 @@ objdump_color_for_disassembler_style (enum disassembler_style style) { case dis_style_symbol: color = 32; break; case dis_style_assembler_directive: + case dis_style_sub_mnemonic: case dis_style_mnemonic: color = 33; break; case dis_style_register: color = 34; break; case dis_style_address: @@ -2185,6 +2186,7 @@ objdump_color_for_disassembler_style (enum disassembler_style style) { case dis_style_symbol: color = 40; break; case dis_style_assembler_directive: + case dis_style_sub_mnemonic: case dis_style_mnemonic: color = 142; break; case dis_style_register: color = 27; break; case dis_style_address: diff --git a/include/dis-asm.h b/include/dis-asm.h index 4f91df12498..f1a83dc84e5 100644 --- a/include/dis-asm.h +++ b/include/dis-asm.h @@ -62,6 +62,13 @@ enum disassembler_style instructions. */ dis_style_mnemonic, + /* Some architectures include additional mnemonic like fields within the + instruction operands, e.g. on aarch64 'add w16, w7, w1, lsl #2' where + the 'lsl' is an additional piece of text that describes how the + instruction should behave. This sub-mnemonic style can be used for + these pieces of text. */ + dis_style_sub_mnemonic, + /* For things that aren't real machine instructions, but rather assembler directives, e.g. .byte, etc. */ dis_style_assembler_directive, -- 2.25.4