From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 10040 invoked by alias); 25 Feb 2011 00:24:57 -0000 Received: (qmail 10004 invoked by uid 22791); 25 Feb 2011 00:24:51 -0000 X-SWARE-Spam-Status: No, hits=-1.6 required=5.0 tests=AWL,BAYES_00,TW_BG,TW_EQ,TW_QZ,TW_XD,T_RP_MATCHES_RCVD X-Spam-Check-By: sourceware.org Received: from mail.codesourcery.com (HELO mail.codesourcery.com) (38.113.113.100) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Fri, 25 Feb 2011 00:24:43 +0000 Received: (qmail 11189 invoked from network); 25 Feb 2011 00:24:40 -0000 Received: from unknown (HELO tp.orcam.me.uk) (macro@127.0.0.2) by mail.codesourcery.com with ESMTPA; 25 Feb 2011 00:24:40 -0000 Date: Fri, 25 Feb 2011 00:24:00 -0000 From: "Maciej W. Rozycki" To: binutils@sourceware.org cc: Richard Sandiford Subject: [PATCH] MIPS/GAS: Correct $at usage in PIC branch relaxation Message-ID: User-Agent: Alpine 1.10 (DEB 962 2008-03-14) MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII Mailing-List: contact binutils-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: binutils-owner@sourceware.org X-SW-Source: 2011-02/txt/msg00298.txt.bz2 Hi, We have a problem with PIC out-of-range branch relaxation where the temporary register is defined by ".set at=" to something other than the default of $1. We need to carry number of the register to use in the frag. Here's a change to implement it. I have decided to shuffle bits around so that the number doesn't have to be shifted to encode/decode -- other bits are used as flags only so that's less of importance for them as they generally use hardcoded immediates as masks anyway. I have hardcoded the alternative register into the .s file as it seems that using: .set at=foo with "foo" defined with --defsym foo=\$k0 does not yield what one might expect, contrary to what happens e.g. if: .set foo, $k0 is used. I have decided the problem to be too much of a corner case to dig into it any further and to follow the path of least resistance instead. Regression-tested with the mips-sde-elf and mips-linux-gnu targets. OK to apply? 2011-02-24 Maciej W. Rozycki gas/ * config/tc-mips.c (RELAX_BRANCH_ENCODE): Encode the temporary register to use. (RELAX_BRANCH_UNCOND): Adjust accordingly. (RELAX_BRANCH_LIKELY): Likewise. (RELAX_BRANCH_LINK): Likewise. (RELAX_BRANCH_TOOFAR): Likewise. (RELAX_BRANCH_AT): New macro. (append_insn): Encode the temporary register to use in standard MIPS branch relaxation. (relaxed_branch_length): Update according to changes to RELAX_BRANCH_ENCODE. (md_convert_frag): Use the encoded register as the temporary. gas/testsuite/ * gas/mips/relax-at.d: New test for branch relaxation with .set at. * gas/mips/relax.s: Update to support the new test. * gas/mips/relax.l: Update accordingly. * gas/mips/relax.d: Update for multi-arch invocation. * gas/mips/mips.exp: Run the new test. Adjust to run "relax" across all applicable architectures. Hmm, at this point we can probably arrange for the two tests to be run on MIPS I too, to see if load-delay slots are scheduled correctly... Maciej binutils-gas-mips-relax-at.diff Index: binutils-fsf-trunk-quilt/gas/config/tc-mips.c =================================================================== --- binutils-fsf-trunk-quilt.orig/gas/config/tc-mips.c 2011-02-24 23:46:08.000000000 +0000 +++ binutils-fsf-trunk-quilt/gas/config/tc-mips.c 2011-02-24 23:46:08.000000000 +0000 @@ -918,18 +918,20 @@ static int mips_relax_branch; but it's not clear that it would actually improve performance. */ -#define RELAX_BRANCH_ENCODE(uncond, likely, link, toofar) \ - ((relax_substateT) \ - (0xc0000000 \ - | ((toofar) ? 1 : 0) \ - | ((link) ? 2 : 0) \ - | ((likely) ? 4 : 0) \ - | ((uncond) ? 8 : 0))) +#define RELAX_BRANCH_ENCODE(at, uncond, likely, link, toofar) \ + ((relax_substateT) \ + (0xc0000000 \ + | ((at) & 0x1f) \ + | ((toofar) ? 0x20 : 0) \ + | ((link) ? 0x40 : 0) \ + | ((likely) ? 0x80 : 0) \ + | ((uncond) ? 0x100 : 0))) #define RELAX_BRANCH_P(i) (((i) & 0xf0000000) == 0xc0000000) -#define RELAX_BRANCH_UNCOND(i) (((i) & 8) != 0) -#define RELAX_BRANCH_LIKELY(i) (((i) & 4) != 0) -#define RELAX_BRANCH_LINK(i) (((i) & 2) != 0) -#define RELAX_BRANCH_TOOFAR(i) (((i) & 1) != 0) +#define RELAX_BRANCH_UNCOND(i) (((i) & 0x100) != 0) +#define RELAX_BRANCH_LIKELY(i) (((i) & 0x80) != 0) +#define RELAX_BRANCH_LINK(i) (((i) & 0x40) != 0) +#define RELAX_BRANCH_TOOFAR(i) (((i) & 0x20) != 0) +#define RELAX_BRANCH_AT(i) ((i) & 0x1f) /* For mips16 code, we use an entirely different form of relaxation. mips16 supports two versions of most instructions which take @@ -3139,7 +3141,8 @@ append_insn (struct mips_cl_insn *ip, ex : (pinfo & INSN_COND_BRANCH_LIKELY) ? 1 : 0)), 4, RELAX_BRANCH_ENCODE - (pinfo & INSN_UNCOND_BRANCH_DELAY, + (AT, + pinfo & INSN_UNCOND_BRANCH_DELAY, pinfo & INSN_COND_BRANCH_LIKELY, pinfo & INSN_WRITE_GPR_31, 0), @@ -14117,7 +14120,8 @@ relaxed_branch_length (fragS *fragp, ase if (fragp && update && toofar != RELAX_BRANCH_TOOFAR (fragp->fr_subtype)) fragp->fr_subtype - = RELAX_BRANCH_ENCODE (RELAX_BRANCH_UNCOND (fragp->fr_subtype), + = RELAX_BRANCH_ENCODE (RELAX_BRANCH_AT (fragp->fr_subtype), + RELAX_BRANCH_UNCOND (fragp->fr_subtype), RELAX_BRANCH_LIKELY (fragp->fr_subtype), RELAX_BRANCH_LINK (fragp->fr_subtype), toofar); @@ -14527,8 +14531,11 @@ md_convert_frag (bfd *abfd ATTRIBUTE_UNU } else { + unsigned long at = RELAX_BRANCH_AT (fragp->fr_subtype); + /* lw/ld $at, ($gp) R_MIPS_GOT16 */ - insn = HAVE_64BIT_ADDRESSES ? 0xdf810000 : 0x8f810000; + insn = HAVE_64BIT_ADDRESSES ? 0xdf800000 : 0x8f800000; + insn |= at << OP_SH_RT; exp.X_op = O_symbol; exp.X_add_symbol = fragp->fr_symbol; exp.X_add_number = fragp->fr_offset; @@ -14555,7 +14562,8 @@ md_convert_frag (bfd *abfd ATTRIBUTE_UNU } /* d/addiu $at, $at, R_MIPS_LO16 */ - insn = HAVE_64BIT_ADDRESSES ? 0x64210000 : 0x24210000; + insn = HAVE_64BIT_ADDRESSES ? 0x64000000 : 0x24000000; + insn |= at << OP_SH_RS | at << OP_SH_RT; fixp = fix_new_exp (fragp, buf - (bfd_byte *)fragp->fr_literal, 4, &exp, FALSE, BFD_RELOC_LO16); @@ -14567,9 +14575,10 @@ md_convert_frag (bfd *abfd ATTRIBUTE_UNU /* j(al)r $at. */ if (RELAX_BRANCH_LINK (fragp->fr_subtype)) - insn = 0x0020f809; + insn = 0x0000f809; else - insn = 0x00200008; + insn = 0x00000008; + insn |= at << OP_SH_RS; md_number_to_chars ((char *) buf, insn, 4); buf += 4; Index: binutils-fsf-trunk-quilt/gas/testsuite/gas/mips/mips.exp =================================================================== --- binutils-fsf-trunk-quilt.orig/gas/testsuite/gas/mips/mips.exp 2011-02-24 23:46:07.000000000 +0000 +++ binutils-fsf-trunk-quilt/gas/testsuite/gas/mips/mips.exp 2011-02-24 23:46:08.000000000 +0000 @@ -703,7 +703,8 @@ if { [istarget mips*-*-vxworks*] } { run_dump_test "xlr-ext" } - run_dump_test "relax" + run_dump_test_arches "relax" [mips_arch_list_matching mips2] + run_dump_test_arches "relax-at" [mips_arch_list_matching mips2] run_dump_test "relax-swap1-mips1" run_dump_test "relax-swap1-mips2" run_dump_test "relax-swap2" Index: binutils-fsf-trunk-quilt/gas/testsuite/gas/mips/relax-at.d =================================================================== --- /dev/null 1970-01-01 00:00:00.000000000 +0000 +++ binutils-fsf-trunk-quilt/gas/testsuite/gas/mips/relax-at.d 2011-02-24 23:46:08.000000000 +0000 @@ -0,0 +1,396 @@ +#as: -KPIC -32 -relax-branch --defsym atk0=1 +#objdump: -dr --prefix-addresses +#name: MIPS relax with .set at +#stderr: relax.l +#source: relax.s + +# Test relaxation with .set at. + +.*: +file format .*mips.* + +Disassembly of section \.text: +00000000 lw k0,2\(gp\) + 0: R_MIPS_GOT16 \.text +00000004 addiu k0,k0,592 + 4: R_MIPS_LO16 \.text +00000008 jr k0 +0000000c nop +00000010 lw k0,2\(gp\) + 10: R_MIPS_GOT16 \.text +00000014 addiu k0,k0,592 + 14: R_MIPS_LO16 \.text +00000018 jalr k0 +0000001c nop +00000020 bne v0,v1,00000034 +00000024 nop +00000028 lw k0,2\(gp\) + 28: R_MIPS_GOT16 \.text +0000002c addiu k0,k0,592 + 2c: R_MIPS_LO16 \.text +00000030 jr k0 +00000034 nop +00000038 beq a0,a1,0000004c +0000003c nop +00000040 lw k0,2\(gp\) + 40: R_MIPS_GOT16 \.text +00000044 addiu k0,k0,592 + 44: R_MIPS_LO16 \.text +00000048 jr k0 +0000004c nop +00000050 bgtz v0,00000064 +00000054 nop +00000058 lw k0,2\(gp\) + 58: R_MIPS_GOT16 \.text +0000005c addiu k0,k0,592 + 5c: R_MIPS_LO16 \.text +00000060 jr k0 +00000064 nop +00000068 blez v1,0000007c +0000006c nop +00000070 lw k0,2\(gp\) + 70: R_MIPS_GOT16 \.text +00000074 addiu k0,k0,592 + 74: R_MIPS_LO16 \.text +00000078 jr k0 +0000007c nop +00000080 bgez a0,00000094 +00000084 nop +00000088 lw k0,2\(gp\) + 88: R_MIPS_GOT16 \.text +0000008c addiu k0,k0,592 + 8c: R_MIPS_LO16 \.text +00000090 jr k0 +00000094 nop +00000098 bltz a1,000000ac +0000009c nop +000000a0 lw k0,2\(gp\) + a0: R_MIPS_GOT16 \.text +000000a4 addiu k0,k0,592 + a4: R_MIPS_LO16 \.text +000000a8 jr k0 +000000ac nop +000000b0 bc1t 000000c4 +000000b4 nop +000000b8 lw k0,2\(gp\) + b8: R_MIPS_GOT16 \.text +000000bc addiu k0,k0,592 + bc: R_MIPS_LO16 \.text +000000c0 jr k0 +000000c4 nop +000000c8 bc1f 000000dc +000000cc nop +000000d0 lw k0,2\(gp\) + d0: R_MIPS_GOT16 \.text +000000d4 addiu k0,k0,592 + d4: R_MIPS_LO16 \.text +000000d8 jr k0 +000000dc nop +000000e0 bgez v0,000000f4 +000000e4 nop +000000e8 lw k0,2\(gp\) + e8: R_MIPS_GOT16 \.text +000000ec addiu k0,k0,592 + ec: R_MIPS_LO16 \.text +000000f0 jalr k0 +000000f4 nop +000000f8 bltz v1,0000010c +000000fc nop +00000100 lw k0,2\(gp\) + 100: R_MIPS_GOT16 \.text +00000104 addiu k0,k0,592 + 104: R_MIPS_LO16 \.text +00000108 jalr k0 +0000010c nop +00000110 beql v0,v1,00000120 +00000114 nop +00000118 beqzl zero,00000130 +0000011c nop +00000120 lw k0,2\(gp\) + 120: R_MIPS_GOT16 \.text +00000124 addiu k0,k0,592 + 124: R_MIPS_LO16 \.text +00000128 jr k0 +0000012c nop +00000130 bnel a0,a1,00000140 +00000134 nop +00000138 beqzl zero,00000150 +0000013c nop +00000140 lw k0,2\(gp\) + 140: R_MIPS_GOT16 \.text +00000144 addiu k0,k0,592 + 144: R_MIPS_LO16 \.text +00000148 jr k0 +0000014c nop +00000150 blezl v0,00000160 +00000154 nop +00000158 beqzl zero,00000170 +0000015c nop +00000160 lw k0,2\(gp\) + 160: R_MIPS_GOT16 \.text +00000164 addiu k0,k0,592 + 164: R_MIPS_LO16 \.text +00000168 jr k0 +0000016c nop +00000170 bgtzl v1,00000180 +00000174 nop +00000178 beqzl zero,00000190 +0000017c nop +00000180 lw k0,2\(gp\) + 180: R_MIPS_GOT16 \.text +00000184 addiu k0,k0,592 + 184: R_MIPS_LO16 \.text +00000188 jr k0 +0000018c nop +00000190 bltzl a0,000001a0 +00000194 nop +00000198 beqzl zero,000001b0 +0000019c nop +000001a0 lw k0,2\(gp\) + 1a0: R_MIPS_GOT16 \.text +000001a4 addiu k0,k0,592 + 1a4: R_MIPS_LO16 \.text +000001a8 jr k0 +000001ac nop +000001b0 bgezl a1,000001c0 +000001b4 nop +000001b8 beqzl zero,000001d0 +000001bc nop +000001c0 lw k0,2\(gp\) + 1c0: R_MIPS_GOT16 \.text +000001c4 addiu k0,k0,592 + 1c4: R_MIPS_LO16 \.text +000001c8 jr k0 +000001cc nop +000001d0 bc1fl 000001e0 +000001d4 nop +000001d8 beqzl zero,000001f0 +000001dc nop +000001e0 lw k0,2\(gp\) + 1e0: R_MIPS_GOT16 \.text +000001e4 addiu k0,k0,592 + 1e4: R_MIPS_LO16 \.text +000001e8 jr k0 +000001ec nop +000001f0 bc1tl 00000200 +000001f4 nop +000001f8 beqzl zero,00000210 +000001fc nop +00000200 lw k0,2\(gp\) + 200: R_MIPS_GOT16 \.text +00000204 addiu k0,k0,592 + 204: R_MIPS_LO16 \.text +00000208 jr k0 +0000020c nop +00000210 bltzl v0,00000220 +00000214 nop +00000218 beqzl zero,00000230 +0000021c nop +00000220 lw k0,2\(gp\) + 220: R_MIPS_GOT16 \.text +00000224 addiu k0,k0,592 + 224: R_MIPS_LO16 \.text +00000228 jalr k0 +0000022c nop +00000230 bgezl v1,00000240 +00000234 nop +00000238 beqzl zero,00000250 +0000023c nop +00000240 lw k0,2\(gp\) + 240: R_MIPS_GOT16 \.text +00000244 addiu k0,k0,592 + 244: R_MIPS_LO16 \.text +00000248 jalr k0 +0000024c nop + \.\.\. +00020250 lw k0,0\(gp\) + 20250: R_MIPS_GOT16 \.text +00020254 addiu k0,k0,0 + 20254: R_MIPS_LO16 \.text +00020258 jr k0 +0002025c nop +00020260 lw k0,0\(gp\) + 20260: R_MIPS_GOT16 \.text +00020264 addiu k0,k0,0 + 20264: R_MIPS_LO16 \.text +00020268 jalr k0 +0002026c nop +00020270 bne v0,v1,00020284 +00020274 nop +00020278 lw k0,0\(gp\) + 20278: R_MIPS_GOT16 \.text +0002027c addiu k0,k0,0 + 2027c: R_MIPS_LO16 \.text +00020280 jr k0 +00020284 nop +00020288 beq a0,a1,0002029c +0002028c nop +00020290 lw k0,0\(gp\) + 20290: R_MIPS_GOT16 \.text +00020294 addiu k0,k0,0 + 20294: R_MIPS_LO16 \.text +00020298 jr k0 +0002029c nop +000202a0 bgtz v0,000202b4 +000202a4 nop +000202a8 lw k0,0\(gp\) + 202a8: R_MIPS_GOT16 \.text +000202ac addiu k0,k0,0 + 202ac: R_MIPS_LO16 \.text +000202b0 jr k0 +000202b4 nop +000202b8 blez v1,000202cc +000202bc nop +000202c0 lw k0,0\(gp\) + 202c0: R_MIPS_GOT16 \.text +000202c4 addiu k0,k0,0 + 202c4: R_MIPS_LO16 \.text +000202c8 jr k0 +000202cc nop +000202d0 bgez a0,000202e4 +000202d4 nop +000202d8 lw k0,0\(gp\) + 202d8: R_MIPS_GOT16 \.text +000202dc addiu k0,k0,0 + 202dc: R_MIPS_LO16 \.text +000202e0 jr k0 +000202e4 nop +000202e8 bltz a1,000202fc +000202ec nop +000202f0 lw k0,0\(gp\) + 202f0: R_MIPS_GOT16 \.text +000202f4 addiu k0,k0,0 + 202f4: R_MIPS_LO16 \.text +000202f8 jr k0 +000202fc nop +00020300 bc1t 00020314 +00020304 nop +00020308 lw k0,0\(gp\) + 20308: R_MIPS_GOT16 \.text +0002030c addiu k0,k0,0 + 2030c: R_MIPS_LO16 \.text +00020310 jr k0 +00020314 nop +00020318 bc1f 0002032c +0002031c nop +00020320 lw k0,0\(gp\) + 20320: R_MIPS_GOT16 \.text +00020324 addiu k0,k0,0 + 20324: R_MIPS_LO16 \.text +00020328 jr k0 +0002032c nop +00020330 bgez v0,00020344 +00020334 nop +00020338 lw k0,0\(gp\) + 20338: R_MIPS_GOT16 \.text +0002033c addiu k0,k0,0 + 2033c: R_MIPS_LO16 \.text +00020340 jalr k0 +00020344 nop +00020348 bltz v1,0002035c +0002034c nop +00020350 lw k0,0\(gp\) + 20350: R_MIPS_GOT16 \.text +00020354 addiu k0,k0,0 + 20354: R_MIPS_LO16 \.text +00020358 jalr k0 +0002035c nop +00020360 beql v0,v1,00020370 +00020364 nop +00020368 beqzl zero,00020380 +0002036c nop +00020370 lw k0,0\(gp\) + 20370: R_MIPS_GOT16 \.text +00020374 addiu k0,k0,0 + 20374: R_MIPS_LO16 \.text +00020378 jr k0 +0002037c nop +00020380 bnel a0,a1,00020390 +00020384 nop +00020388 beqzl zero,000203a0 +0002038c nop +00020390 lw k0,0\(gp\) + 20390: R_MIPS_GOT16 \.text +00020394 addiu k0,k0,0 + 20394: R_MIPS_LO16 \.text +00020398 jr k0 +0002039c nop +000203a0 blezl v0,000203b0 +000203a4 nop +000203a8 beqzl zero,000203c0 +000203ac nop +000203b0 lw k0,0\(gp\) + 203b0: R_MIPS_GOT16 \.text +000203b4 addiu k0,k0,0 + 203b4: R_MIPS_LO16 \.text +000203b8 jr k0 +000203bc nop +000203c0 bgtzl v1,000203d0 +000203c4 nop +000203c8 beqzl zero,000203e0 +000203cc nop +000203d0 lw k0,0\(gp\) + 203d0: R_MIPS_GOT16 \.text +000203d4 addiu k0,k0,0 + 203d4: R_MIPS_LO16 \.text +000203d8 jr k0 +000203dc nop +000203e0 bltzl a0,000203f0 +000203e4 nop +000203e8 beqzl zero,00020400 +000203ec nop +000203f0 lw k0,0\(gp\) + 203f0: R_MIPS_GOT16 \.text +000203f4 addiu k0,k0,0 + 203f4: R_MIPS_LO16 \.text +000203f8 jr k0 +000203fc nop +00020400 bgezl a1,00020410 +00020404 nop +00020408 beqzl zero,00020420 +0002040c nop +00020410 lw k0,0\(gp\) + 20410: R_MIPS_GOT16 \.text +00020414 addiu k0,k0,0 + 20414: R_MIPS_LO16 \.text +00020418 jr k0 +0002041c nop +00020420 bc1fl 00020430 +00020424 nop +00020428 beqzl zero,00020440 +0002042c nop +00020430 lw k0,0\(gp\) + 20430: R_MIPS_GOT16 \.text +00020434 addiu k0,k0,0 + 20434: R_MIPS_LO16 \.text +00020438 jr k0 +0002043c nop +00020440 bc1tl 00020450 +00020444 nop +00020448 beqzl zero,00020460 +0002044c nop +00020450 lw k0,0\(gp\) + 20450: R_MIPS_GOT16 \.text +00020454 addiu k0,k0,0 + 20454: R_MIPS_LO16 \.text +00020458 jr k0 +0002045c nop +00020460 bltzl v0,00020470 +00020464 nop +00020468 beqzl zero,00020480 +0002046c nop +00020470 lw k0,0\(gp\) + 20470: R_MIPS_GOT16 \.text +00020474 addiu k0,k0,0 + 20474: R_MIPS_LO16 \.text +00020478 jalr k0 +0002047c nop +00020480 bgezl v1,00020490 +00020484 nop +00020488 beqzl zero,000204a0 +0002048c nop +00020490 lw k0,0\(gp\) + 20490: R_MIPS_GOT16 \.text +00020494 addiu k0,k0,0 + 20494: R_MIPS_LO16 \.text +00020498 jalr k0 +0002049c nop Index: binutils-fsf-trunk-quilt/gas/testsuite/gas/mips/relax.d =================================================================== --- binutils-fsf-trunk-quilt.orig/gas/testsuite/gas/mips/relax.d 2011-02-24 23:46:02.000000000 +0000 +++ binutils-fsf-trunk-quilt/gas/testsuite/gas/mips/relax.d 2011-02-24 23:46:08.000000000 +0000 @@ -1,5 +1,5 @@ -#as: -KPIC -mips3 -32 -relax-branch -#objdump: -dr --prefix-addresses -mmips:4000 +#as: -KPIC -32 -relax-branch +#objdump: -dr --prefix-addresses #name: MIPS relax #stderr: relax.l Index: binutils-fsf-trunk-quilt/gas/testsuite/gas/mips/relax.l =================================================================== --- binutils-fsf-trunk-quilt.orig/gas/testsuite/gas/mips/relax.l 2011-02-24 23:46:08.000000000 +0000 +++ binutils-fsf-trunk-quilt/gas/testsuite/gas/mips/relax.l 2011-02-24 23:46:08.000000000 +0000 @@ -1,45 +1,45 @@ .*: Assembler messages: -.*:5: Warning: Relaxed out-of-range branch into a jump -.*:6: Warning: Relaxed out-of-range branch into a jump -.*:7: Warning: Relaxed out-of-range branch into a jump -.*:8: Warning: Relaxed out-of-range branch into a jump .*:9: Warning: Relaxed out-of-range branch into a jump .*:10: Warning: Relaxed out-of-range branch into a jump .*:11: Warning: Relaxed out-of-range branch into a jump .*:12: Warning: Relaxed out-of-range branch into a jump .*:13: Warning: Relaxed out-of-range branch into a jump .*:14: Warning: Relaxed out-of-range branch into a jump +.*:15: Warning: Relaxed out-of-range branch into a jump .*:16: Warning: Relaxed out-of-range branch into a jump .*:17: Warning: Relaxed out-of-range branch into a jump -.*:19: Warning: Relaxed out-of-range branch into a jump +.*:18: Warning: Relaxed out-of-range branch into a jump .*:20: Warning: Relaxed out-of-range branch into a jump .*:21: Warning: Relaxed out-of-range branch into a jump -.*:22: Warning: Relaxed out-of-range branch into a jump .*:23: Warning: Relaxed out-of-range branch into a jump .*:24: Warning: Relaxed out-of-range branch into a jump .*:25: Warning: Relaxed out-of-range branch into a jump .*:26: Warning: Relaxed out-of-range branch into a jump +.*:27: Warning: Relaxed out-of-range branch into a jump .*:28: Warning: Relaxed out-of-range branch into a jump .*:29: Warning: Relaxed out-of-range branch into a jump +.*:30: Warning: Relaxed out-of-range branch into a jump +.*:32: Warning: Relaxed out-of-range branch into a jump .*:33: Warning: Relaxed out-of-range branch into a jump -.*:34: Warning: Relaxed out-of-range branch into a jump -.*:35: Warning: Relaxed out-of-range branch into a jump -.*:36: Warning: Relaxed out-of-range branch into a jump .*:37: Warning: Relaxed out-of-range branch into a jump .*:38: Warning: Relaxed out-of-range branch into a jump .*:39: Warning: Relaxed out-of-range branch into a jump .*:40: Warning: Relaxed out-of-range branch into a jump .*:41: Warning: Relaxed out-of-range branch into a jump .*:42: Warning: Relaxed out-of-range branch into a jump +.*:43: Warning: Relaxed out-of-range branch into a jump .*:44: Warning: Relaxed out-of-range branch into a jump .*:45: Warning: Relaxed out-of-range branch into a jump -.*:47: Warning: Relaxed out-of-range branch into a jump +.*:46: Warning: Relaxed out-of-range branch into a jump .*:48: Warning: Relaxed out-of-range branch into a jump .*:49: Warning: Relaxed out-of-range branch into a jump -.*:50: Warning: Relaxed out-of-range branch into a jump .*:51: Warning: Relaxed out-of-range branch into a jump .*:52: Warning: Relaxed out-of-range branch into a jump .*:53: Warning: Relaxed out-of-range branch into a jump .*:54: Warning: Relaxed out-of-range branch into a jump +.*:55: Warning: Relaxed out-of-range branch into a jump .*:56: Warning: Relaxed out-of-range branch into a jump .*:57: Warning: Relaxed out-of-range branch into a jump +.*:58: Warning: Relaxed out-of-range branch into a jump +.*:60: Warning: Relaxed out-of-range branch into a jump +.*:61: Warning: Relaxed out-of-range branch into a jump Index: binutils-fsf-trunk-quilt/gas/testsuite/gas/mips/relax.s =================================================================== --- binutils-fsf-trunk-quilt.orig/gas/testsuite/gas/mips/relax.s 2011-02-24 23:46:02.000000000 +0000 +++ binutils-fsf-trunk-quilt/gas/testsuite/gas/mips/relax.s 2011-02-24 23:46:08.000000000 +0000 @@ -1,5 +1,9 @@ # Source file used to test relaxation. + .ifdef atk0 + .set at=$k0 + .endif + .text foo: b bar