* [committed] MIPS/opcodes: Remove an incorrect MT ASE reference in MFC0/MTC0 decoding
@ 2017-05-15 13:27 Maciej W. Rozycki
0 siblings, 0 replies; only message in thread
From: Maciej W. Rozycki @ 2017-05-15 13:27 UTC (permalink / raw)
To: binutils
The `sel' operand of CP0 move instructions is a part of the base ISA and
has nothing to do with the MT ASE.
opcodes/
* mips-dis.c (print_insn_args) <default>: Remove an MT ASE
reference in CP0 move operand decoding.
---
binutils-mips-opcodes-dis-mxc0-mt-ase.diff
Index: binutils/opcodes/mips-dis.c
===================================================================
--- binutils.orig/opcodes/mips-dis.c 2017-05-13 19:00:09.000000000 +0100
+++ binutils/opcodes/mips-dis.c 2017-05-13 19:03:01.340260877 +0100
@@ -1641,7 +1641,7 @@ print_insn_args (struct disassemble_info
&& s[2] == 'H'
&& opcode->name[strlen (opcode->name) - 1] == '0')
{
- /* Coprocessor register 0 with sel field (MT ASE). */
+ /* Coprocessor register 0 with sel field. */
const struct mips_cp0sel_name *n;
unsigned int reg, sel;
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2017-05-15 13:27 [committed] MIPS/opcodes: Remove an incorrect MT ASE reference in MFC0/MTC0 decoding Maciej W. Rozycki
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