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From: "Maciej W. Rozycki" <macro@embecosm.com>
To: Jan Beulich <jbeulich@suse.com>
Cc: binutils@sourceware.org, Fangrui Song <i@maskray.me>
Subject: Re: objdump riscv: Stop disassembling addi rd, rs, 0 with a relocation as mv rd, rs?
Date: Tue, 7 Feb 2023 16:04:57 +0000 (GMT)	[thread overview]
Message-ID: <alpine.DEB.2.20.2302071601070.7841@tpp.orcam.me.uk> (raw)
In-Reply-To: <53fa13a4-9828-94a7-b639-991ced5da25b@suse.com>

On Tue, 7 Feb 2023, Jan Beulich wrote:

> >  However it may be quite hard to implement given how the GNU disassembler 
> > has been structured; most easily probably by setting the `no_aliases' flag 
> > temporarily for any instruction seen with a relocation attached.  This 
> > could have undesired consequences elsewhere though and would most likely 
> > make Jan unhappy who wants to see aliases in disassembly rather than 
> > machine instruction mnemonics with the immediate forms.
> > 
> >  So instead we may need another flag for the opcode table, such as 
> > INSN_NORELOC, which would exclude the given entry for instructions with 
> > any relocation attached; I think this would be the cleanest approach, 
> > though maybe a little bit more involving implementation-wise.
> 
> Could we get away with simply skipping aliases in general when there's a
> relocation for an insn?

 I think it would be unreasonably inconsistent though.  Also I think we do 
want to keep the `*z' branch forms in disassembly.

  Maciej

  parent reply	other threads:[~2023-02-07 16:05 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-02-07  2:40 Fangrui Song
2023-02-07 14:39 ` Maciej W. Rozycki
2023-02-07 15:14   ` Jan Beulich
2023-02-07 15:44     ` Andreas Schwab
2023-02-07 16:04     ` Maciej W. Rozycki [this message]
2023-02-09  2:21       ` Nelson Chu

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