diff --git a/bfd/elf32-arm.c b/bfd/elf32-arm.c index dfe65d6d01588bdc588f22a65b979b2234bacb41..0970669b16cc150b8b296c16e55a2b8750184a9d 100644 --- a/bfd/elf32-arm.c +++ b/bfd/elf32-arm.c @@ -14712,6 +14712,7 @@ elf32_arm_merge_eabi_attributes (bfd *ibfd, struct bfd_link_info *info) case Tag_CPU_unaligned_access: case Tag_T2EE_use: case Tag_MPextension_use: + case Tag_MVE_arch: /* Use the largest value specified. */ if (in_attr[i].i > out_attr[i].i) out_attr[i].i = in_attr[i].i; diff --git a/binutils/readelf.c b/binutils/readelf.c index 1fe71824776d979365ae936c6e35af8558da2683..dc7e5805c31654a530836f3e079e7247df89f24d 100644 --- a/binutils/readelf.c +++ b/binutils/readelf.c @@ -14434,6 +14434,9 @@ static const char * arm_attr_tag_Virtualization_use[] = static const char * arm_attr_tag_MPextension_use_legacy[] = {"Not Allowed", "Allowed"}; +static const char * arm_attr_tag_MVE_arch[] = + {"No MVE", "MVE Integer only", "MVE Integer and FP"}; + #define LOOKUP(id, name) \ {id, #name, 0x80 | ARRAY_SIZE(arm_attr_tag_##name), arm_attr_tag_##name} static arm_attr_public_tag arm_attr_public_tags[] = @@ -14473,6 +14476,7 @@ static arm_attr_public_tag arm_attr_public_tags[] = LOOKUP(42, MPextension_use), LOOKUP(44, DIV_use), LOOKUP(46, DSP_extension), + LOOKUP(48, MVE_arch), {64, "nodefaults", 0, NULL}, {65, "also_compatible_with", 0, NULL}, LOOKUP(66, T2EE_use), diff --git a/elfcpp/arm.h b/elfcpp/arm.h index 19048658ece500ef4406972a453d79d283a4e805..aa573440c28035701b5ea0c265de38b800c63fa0 100644 --- a/elfcpp/arm.h +++ b/elfcpp/arm.h @@ -305,6 +305,7 @@ enum Tag_MPextension_use = 42, Tag_undefined43 = 43, Tag_DIV_use = 44, + Tag_MVE_arch = 48, Tag_nodefaults = 64, Tag_also_compatible_with = 65, Tag_T2EE_use = 66, diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c index 8035fa1db4dcf88393c96f8d54a55766ca1ab580..692a73cc20be01a043dfff5fbf4ab0d3bdc87f2c 100644 --- a/gas/config/tc-arm.c +++ b/gas/config/tc-arm.c @@ -302,6 +302,10 @@ static const arm_feature_set fpu_neon_ext_v1 = ARM_FEATURE_COPROC (FPU_NEON_EXT_V1); static const arm_feature_set fpu_vfp_v3_or_neon_ext = ARM_FEATURE_COPROC (FPU_NEON_EXT_V1 | FPU_VFP_EXT_V3); +static const arm_feature_set mve_ext = + ARM_FEATURE_COPROC (FPU_MVE); +static const arm_feature_set mve_fp_ext = + ARM_FEATURE_COPROC (FPU_MVE_FP); #ifdef OBJ_ELF static const arm_feature_set fpu_vfp_fp16 = ARM_FEATURE_COPROC (FPU_VFP_EXT_FP16); @@ -27251,6 +27255,12 @@ static const struct arm_ext_table armv8_1m_main_ext_table[] = ARM_ADD ("fp.dp", ARM_FEATURE (0, ARM_EXT2_FP16_INST, FPU_VFP_V5D16 | FPU_VFP_EXT_FP16 | FPU_VFP_EXT_FMA)), + ARM_EXT ("mve", ARM_FEATURE_COPROC (FPU_MVE), + ARM_FEATURE_COPROC (FPU_MVE | FPU_MVE_FP)), + ARM_ADD ("mve.fp", + ARM_FEATURE (0, ARM_EXT2_FP16_INST, + FPU_MVE | FPU_MVE_FP | FPU_VFP_V5_SP_D16 | + FPU_VFP_EXT_FP16 | FPU_VFP_EXT_FMA)), { NULL, 0, ARM_ARCH_NONE, ARM_ARCH_NONE } }; @@ -28428,6 +28438,11 @@ aeabi_set_public_attributes (void) } } + if (ARM_CPU_HAS_FEATURE (flags, mve_fp_ext)) + aeabi_set_attribute_int (Tag_MVE_arch, 2); + else if (ARM_CPU_HAS_FEATURE (flags, mve_ext)) + aeabi_set_attribute_int (Tag_MVE_arch, 1); + /* Tag_VFP_HP_extension (formerly Tag_NEON_FP16_arch). */ if (ARM_CPU_HAS_FEATURE (flags, fpu_vfp_fp16) && fp16_optional) aeabi_set_attribute_int (Tag_VFP_HP_extension, 1); @@ -28769,6 +28784,7 @@ arm_convert_symbolic_attribute (const char *name) T (Tag_T2EE_use), T (Tag_Virtualization_use), T (Tag_DSP_extension), + T (Tag_MVE_arch), /* We deliberately do not include Tag_MPextension_use_legacy. */ #undef T }; diff --git a/gas/doc/c-arm.texi b/gas/doc/c-arm.texi index 4c595d8bf0ee7a3b0ff77e1ddc6ab073c5c3e589..d35a34df47e197d9f836cc1da76c89b230a741dd 100644 --- a/gas/doc/c-arm.texi +++ b/gas/doc/c-arm.texi @@ -363,8 +363,13 @@ For @code{armv8.1-m.main}: for Armv8.1-M Mainline with 16 double-word registers. @code{+fp.dp}: Enables double precision scalar Floating Point Extensions for Armv8.1-M Mainline, implies @code{+fp}. +@code{+mve}: Enables integer only M-profile Vector Extension for +Armv8.1-M Mainline, implies @code{+dsp}. +@code{+mve.fp}: Enables Floating Point M-profile Vector Extension for +Armv8.1-M Mainline, implies @code{+mve} and @code{+fp}. @code{+nofp}: Disables all FPU instructions. @code{+nodsp}: Disables DSP Extension. +@code{+nomve}: Disables all M-profile Vector Extensions. For @code{armv8-a}: @@ -891,7 +896,7 @@ The @var{tag} is either an attribute number, or one of the following: @code{Tag_CPU_raw_name}, @code{Tag_CPU_name}, @code{Tag_CPU_arch}, @code{Tag_CPU_arch_profile}, @code{Tag_ARM_ISA_use}, @code{Tag_THUMB_ISA_use}, @code{Tag_FP_arch}, @code{Tag_WMMX_arch}, -@code{Tag_Advanced_SIMD_arch}, @code{Tag_PCS_config}, +@code{Tag_Advanced_SIMD_arch}, @code{Tag_MVE_arch}, @code{Tag_PCS_config}, @code{Tag_ABI_PCS_R9_use}, @code{Tag_ABI_PCS_RW_data}, @code{Tag_ABI_PCS_RO_data}, @code{Tag_ABI_PCS_GOT_use}, @code{Tag_ABI_PCS_wchar_t}, @code{Tag_ABI_FP_rounding}, diff --git a/include/elf/arm.h b/include/elf/arm.h index 9f22ffed2b5c664c72ff53fafdf9c074d1e126b9..5cb99706443838cd2d43accab9e713d53304bd00 100644 --- a/include/elf/arm.h +++ b/include/elf/arm.h @@ -326,6 +326,7 @@ enum Tag_undefined_43, Tag_DIV_use, Tag_DSP_extension = 46, + Tag_MVE_arch = 48, Tag_nodefaults = 64, Tag_also_compatible_with, Tag_T2EE_use, diff --git a/include/opcode/arm.h b/include/opcode/arm.h index 73fb2e3f43c5fd2d77dc796b7decb329c5a8a57f..a870905907b38f001812f460e3cd816e9675f851 100644 --- a/include/opcode/arm.h +++ b/include/opcode/arm.h @@ -103,6 +103,8 @@ #define FPU_VFP_EXT_ARMV8xD 0x00002000 /* Single-precision FP for ARMv8. */ #define FPU_NEON_EXT_RDMA 0x00001000 /* v8.1 Adv.SIMD extensions. */ #define FPU_NEON_EXT_DOTPROD 0x00000800 /* Dot Product extension. */ +#define FPU_MVE 0x00000400 /* MVE Integer extension. */ +#define FPU_MVE_FP 0x00000200 /* MVE Floating Point extension. */ /* Architectures are the sum of the base and extensions. The ARM ARM (rev E) defines the following: ARMv3, ARMv3M, ARMv4xM, ARMv4, ARMv4TxM, ARMv4T,