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From: Jeff Law <>
To: Nelson Chu <>
Subject: Re: [committed] RISC-V: Make g imply zmmul extension.
Date: Thu, 15 Sep 2022 22:17:35 -0600	[thread overview]
Message-ID: <> (raw)
In-Reply-To: <>

On 9/15/22 21:26, Nelson Chu wrote:
> On Fri, Sep 16, 2022 at 10:34 AM Jeff Law via Binutils
> <> wrote:
>> On 9/15/22 19:39, Nelson Chu wrote:
>>> bfd/
>>>        * elfxx-riscv.c (riscv_implicit_subset): Moved entry of m after g,
>>>        so that g can imply zmmul.
>>> gas/
>>>        * testsuite/gas/riscv/attribute-01.d: Updated.
>>>        * testsuite/gas/riscv/attribute-02.d: Likewise.
>>>        * testsuite/gas/riscv/attribute-03.d: Likewise.
>>>        * testsuite/gas/riscv/attribute-04.d: Likewise.
>>>        * testsuite/gas/riscv/attribute-05.d: Likewise.
>>>        * testsuite/gas/riscv/attribute-10.d: Likewise.
>>>        * testsuite/gas/riscv/march-imply-g.d: Likewise.
>>>        * testsuite/gas/riscv/march-imply-unsupported.d: Likewise.
>> Does this happen to fix this kind of failure that started showing up a
>> week or two ago?
>> /tmp/ccdAErP7.s:6522: Error: unrecognized opcode `mul a5,a4,a5',
>> extension `m' or `zmmul' required
> I get the same error message if I just assemble files with
> -march=rv32/64g, or just use the default rv64g arch setting.  I
> remember gcc should always pass the expanded imafd for g to assembler,
> so the errors won't happen.  This error should only happen when we set
> g for architecture string.  Hope the patch can fix the problem you
> mentioned, it seems like the same as what I meet.

Just to follow-up.  That seemed to fix the problem.  The build is 
already well past where it was failing before.



  parent reply	other threads:[~2022-09-16  4:17 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-16  1:39 Nelson Chu
2022-09-16  2:33 ` Jeff Law
2022-09-16  3:26   ` Nelson Chu
2022-09-16  3:30     ` Jeff Law
2022-09-16  4:17     ` Jeff Law [this message]
2022-09-16 18:28   ` Tsukasa OI

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