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From: Tsukasa OI <research_trasio@irq.a4lg.com>
To: Tsukasa OI <research_trasio@irq.a4lg.com>,
	Nelson Chu <nelson@rivosinc.com>,
	Kito Cheng <kito.cheng@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Andrew Waterman <andrew@sifive.com>
Cc: binutils@sourceware.org
Subject: [RFC PATCH 1/1] RISC-V: Add privileged extensions without instructions/CSRs
Date: Thu, 22 Sep 2022 07:58:56 +0000	[thread overview]
Message-ID: <bd924e6658fa255b6d5bb5ee4bf21863f00ab5af.1663833488.git.research_trasio@irq.a4lg.com> (raw)
In-Reply-To: <cover.1663833488.git.research_trasio@irq.a4lg.com>

Currently, GNU Binutils does not support following privileged extensions:

-   'Smepmp'
-   'Svnapot'
-   'Svpbmt'

as they do not provide new CSRs or new instructions ('Smepmp' extends the
privileged architecture CSRs but does not define the CSR itself).  However,
adding them might be useful as we no longer have to "filter" ISA strings
just for toolchains (if full ISA string is given by a vendor, we can
straightly use it).

And there's a fact that supports this theory: there's already an
(unprivileged) extension which does not provide CSRs or instructions (but
only an architectural guarantee): 'Zkt' (constant timing guarantee for
certain subset of RISC-V instructions).

This simple patchset simply adds three privileged extensions listed above.

bfd/ChangeLog:

	* elfxx-riscv.c (riscv_supported_std_s_ext): Add 'Smepmp',
	'Svnapot' and 'Svpbmt' extensions.
---
 bfd/elfxx-riscv.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c
index 7eda177bd6e..bbc30c9afc2 100644
--- a/bfd/elfxx-riscv.c
+++ b/bfd/elfxx-riscv.c
@@ -1210,10 +1210,13 @@ static struct riscv_supported_ext riscv_supported_std_z_ext[] =
 
 static struct riscv_supported_ext riscv_supported_std_s_ext[] =
 {
+  {"smepmp",		ISA_SPEC_CLASS_DRAFT,		1, 0, 0 },
   {"smstateen",		ISA_SPEC_CLASS_DRAFT,		1, 0, 0 },
   {"sscofpmf",		ISA_SPEC_CLASS_DRAFT,		1, 0, 0 },
   {"sstc",		ISA_SPEC_CLASS_DRAFT,		1, 0, 0 },
   {"svinval",		ISA_SPEC_CLASS_DRAFT,		1, 0, 0 },
+  {"svnapot",		ISA_SPEC_CLASS_DRAFT,		1, 0, 0 },
+  {"svpbmt",		ISA_SPEC_CLASS_DRAFT,		1, 0, 0 },
   {NULL, 0, 0, 0, 0}
 };
 
-- 
2.34.1


  reply	other threads:[~2022-09-22  7:59 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-22  7:58 [RFC PATCH 0/1] " Tsukasa OI
2022-09-22  7:58 ` Tsukasa OI [this message]
2022-09-22  8:48   ` [RFC PATCH 1/1] " Nelson Chu
2022-09-22  9:44     ` Tsukasa OI
2022-09-30 15:44       ` Tsukasa OI

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