From: Jan Beulich <jbeulich@suse.com>
To: "H.J. Lu" <hjl.tools@gmail.com>
Cc: Binutils <binutils@sourceware.org>
Subject: Re: [PATCH 5/7] x86: re-work insn/suffix recognition
Date: Thu, 29 Sep 2022 18:06:48 +0200 [thread overview]
Message-ID: <c03d0c82-f0ac-6773-d031-e54b9891ab23@suse.com> (raw)
In-Reply-To: <CAMe9rOpyM+U26spFi-F8w_6JHpkfD1FO68y94ndi6LTZ9TVyfw@mail.gmail.com>
On 29.09.2022 18:00, H.J. Lu wrote:
> On Thu, Sep 29, 2022 at 1:08 AM Jan Beulich <jbeulich@suse.com> wrote:
>>
>> On 28.09.2022 21:33, H.J. Lu wrote:
>>> On Wed, Sep 28, 2022 at 5:49 AM Jan Beulich <jbeulich@suse.com> wrote:
>>>> I guess to prove (and going forward guarantee) the apparent behavior of
>>>> parse_insn() I'd like to constify its first parameter. This might
>>>> involve adding a cast (to drop const-ness again after the call), which
>>>> I generally would like to avoid, or some "interesting" pointer
>>>> arithmetic. If you have any opinion here up front, please let me know.
>>>
>>> Can we avoid it by adding some new entries to the opcode table?
>>> I don't think we need many such entries.
>>
>> I'm afraid I don't see the connection between the intended constification
>> and what entries there are (or not) in the opcode table. I view it as a
>> desirable property of the function in the first place to express its
>> behavior (of not altering the input string) by a pointer-to-const
>> parameter. In fact I guess I would make such an adjustment a standalone
>> (prereq for the larger change) patch.
>>
>
> Rescan means that the first scan fails. Can we add new entries which only
> do the second scan?
Why would we add such redundant entries? All that could happen is them
going out of sync with their counterparts processable on the 1st pass.
The overall goal has been to reduce redundancy and hence the risk of
inconsistencies.
Jan
next prev parent reply other threads:[~2022-09-29 16:06 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-16 7:27 [PATCH 0/7] x86: suffix handling changes Jan Beulich
2022-08-16 7:30 ` [PATCH 1/7] x86/Intel: restrict suffix derivation Jan Beulich
2022-08-17 19:19 ` H.J. Lu
2022-08-18 6:07 ` Jan Beulich
2022-08-18 14:46 ` H.J. Lu
2022-08-19 8:19 ` Jan Beulich
2022-08-19 14:23 ` H.J. Lu
2022-08-19 14:49 ` Jan Beulich
2022-08-19 17:00 ` H.J. Lu
2022-08-22 9:34 ` Jan Beulich
2022-08-22 14:38 ` H.J. Lu
2022-08-16 7:30 ` [PATCH 2/7] x86: insert "no error" enumerator in i386_error enumeration Jan Beulich
2022-08-17 19:19 ` H.J. Lu
2022-08-16 7:31 ` [PATCH 3/7] x86: move / quiesce pre-386 non-16-bit warning Jan Beulich
2022-08-17 19:21 ` H.J. Lu
2022-08-18 7:21 ` Jan Beulich
2022-08-18 15:30 ` H.J. Lu
2022-08-19 6:13 ` Jan Beulich
2022-08-19 14:18 ` H.J. Lu
2022-08-16 7:32 ` [PATCH 4/7] x86: improve match_template()'s diagnostics Jan Beulich
2022-08-17 20:24 ` H.J. Lu
2022-08-18 6:14 ` Jan Beulich
2022-08-18 14:51 ` H.J. Lu
2022-08-16 7:32 ` [PATCH 5/7] x86: re-work insn/suffix recognition Jan Beulich
2022-08-17 20:29 ` H.J. Lu
2022-08-18 6:24 ` Jan Beulich
2022-08-18 15:14 ` H.J. Lu
2022-08-19 8:28 ` Jan Beulich
2022-08-23 2:00 ` H.J. Lu
2022-08-26 9:26 ` Jan Beulich
2022-08-26 18:46 ` H.J. Lu
2022-09-06 6:40 ` Jan Beulich
2022-09-06 21:53 ` H.J. Lu
2022-09-07 7:17 ` Jan Beulich
2022-09-26 23:52 ` H.J. Lu
2022-09-28 12:49 ` Jan Beulich
2022-09-28 19:33 ` H.J. Lu
2022-09-29 8:08 ` Jan Beulich
2022-09-29 16:00 ` H.J. Lu
2022-09-29 16:06 ` Jan Beulich [this message]
2022-09-29 16:20 ` H.J. Lu
2022-08-16 7:33 ` [PATCH 6/7] x86-64: further re-work insn/suffix recognition to also cover MOVSL Jan Beulich
2022-08-16 7:34 ` [PATCH 7/7] ix86: don't recognize/derive Q suffix in the common case Jan Beulich
2022-08-17 20:36 ` H.J. Lu
2022-08-18 6:29 ` Jan Beulich
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