From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from loongson.cn (mail.loongson.cn [114.242.206.163]) by sourceware.org (Postfix) with ESMTP id 364CC3858D28 for ; Thu, 21 Jul 2022 06:02:33 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 364CC3858D28 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=loongson.cn Received: from [10.20.4.151] (unknown [10.20.4.151]) by mail.loongson.cn (Coremail) with SMTP id AQAAf9Dxb9H269hiSwAsAA--.40660S3; Thu, 21 Jul 2022 14:02:31 +0800 (CST) From: liuzhensong Subject: Re: [PATCH v2 2/6] LoongArch:opcodes: Add new reloc types. To: Xi Ruoyao , binutils@sourceware.org Cc: i.swmail@xen0n.name, maskray@google.com, xuchenghua@loongson.cn, mengqinggang@loongson.cn, huangpei@loongson.cn, chenglulu@loongson.cn, caiyinyu@loongson.cn References: <20220721013751.466014-1-liuzhensong@loongson.cn> <20220721013751.466014-3-liuzhensong@loongson.cn> <78913d16dde639083a318f62facc30713deec3fb.camel@xry111.site> Message-ID: Date: Thu, 21 Jul 2022 14:02:30 +0800 User-Agent: Mozilla/5.0 (X11; Linux loongarch64; rv:68.0) Gecko/20100101 Thunderbird/68.7.0 MIME-Version: 1.0 In-Reply-To: <78913d16dde639083a318f62facc30713deec3fb.camel@xry111.site> Content-Language: en-US X-CM-TRANSID: AQAAf9Dxb9H269hiSwAsAA--.40660S3 X-Coremail-Antispam: 1UD129KBjvJXoW7CF4DAr1Dtw43ZFWrXry8Grg_yoW8GFyrpF Wrtw4DuayUKrWxCr4kCw1rJ343W3y5Ca45Ary5Ga1jkF90gw1qvrsrX3W29w1UXr40y343 JF18Zr4qvr4UZrDanT9S1TB71UUUUUUqnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUUvI14x267AKxVW8JVW5JwAFc2x0x2IEx4CE42xK8VAvwI8IcIk0 rVWrJVCq3wAFIxvE14AKwVWUJVWUGwA2ocxC64kIII0Yj41l84x0c7CEw4AK67xGY2AK02 1l84ACjcxK6xIIjxv20xvE14v26r4j6ryUM28EF7xvwVC0I7IYx2IY6xkF7I0E14v26F4j 6r4UJwA2z4x0Y4vEx4A2jsIE14v26F4UJVW0owA2z4x0Y4vEx4A2jsIEc7CjxVAFwI0_Gc CE3s1le2I262IYc4CY6c8Ij28IcVAaY2xG8wAv7VC0I7IYx2IY67AKxVWUJVWUGwAv7VC2 z280aVAFwI0_Jr0_Gr1lOx8S6xCaFVCjc4AY6r1j6r4UM4x0Y48IcVAKI48JM4x0x7Aq67 IIx4CEVc8vx2IErcIFxwCjr7xvwVCIw2I0I7xG6c02F41lc7I2V7IY0VAS07AlzVAYIcxG 8wCY02Avz4vE-syl42xK82IYc2Ij64vIr41l4I8I3I0E4IkC6x0Yz7v_Jr0_Gr1lx2IqxV Aqx4xG67AKxVWUGVWUWwC20s026x8GjcxK67AKxVWUGVWUWwC2zVAF1VAY17CE14v26r1q 6r43MIIYrxkI7VAKI48JMIIF0xvE2Ix0cI8IcVAFwI0_Jr0_JF4lIxAIcVC0I7IYx2IY6x kF7I0E14v26r1j6r4UMIIF0xvE42xK8VAvwI8IcIk0rVWrZr1j6s0DMIIF0xvEx4A2jsIE 14v26r4j6F4UMIIF0xvEx4A2jsIEc7CjxVAFwI0_Gr0_Gr1UYxBIdaVFxhVjvjDU0xZFpf 9x0JUtkuxUUUUU= X-CM-SenderInfo: holx6xphqv003j6o00pqjv00gofq/ X-Spam-Status: No, score=-5.4 required=5.0 tests=BAYES_00, BODY_8BITS, HTML_MESSAGE, KAM_DMARC_STATUS, NICE_REPLY_A, SPF_HELO_PASS, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit X-Content-Filtered-By: Mailman/MimeDel 2.1.29 X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 21 Jul 2022 06:02:36 -0000 在 2022/7/21 上午10:30, Xi Ruoyao 写道: > On Thu, 2022-07-21 at 09:37 +0800, liuzhensong wrote: >> +#define INSN_LA_ABS64                  \ >> +  "lu12i.w %1,%%abs_hi20(%2);"         \ >> +  "ori %1,%1,%%abs_lo12(%2);"          \ >> +  "lu32i.d %1,%%abs64_lo20(%2);"       \ >> +  "lu52i.d %1,%1,%%abs64_hi12(%2);",   \ >> +  &LARCH_opts.ase_lp64, 0 > Is it possible to use > > lu12i.w %1, %%abs_hi20(%2) > lu32i.d %1, %%abs_lo12(%2) > lu52i.d %1, %1, %%abs64_hi12(%2) > addi.d %1, %1, %%abs64_lo12(%2) > > so a future linker relaxation (or some optimization, anyway) may combine > the last addi.d instruction with a following ld instruction? Like > > la.abs64 $t0, foo > ld.d $t0, $t0, 0 > > => > > lu12i.w $t0, %abs_hi20(foo) > lu32i.d $t0, %abs_lo12(foo) > lu52i.d $t0, $t0, %abs64_hi12(foo) > ld.d $t0, $t0, %abs64_lo12(foo) > > (Doing so will need to take the highest bit of lo12 as a carry into the > higher 52 bits.) > It seems default for addi.d/ld.d to access extreme address. Simple example of abs32: address range of abs32 : 0~0xffffffff sym address: 0xfffff800 lui12.w $rd, 0xfffff ori $rd, $d, 0x800 $rd is 0xfffff800 Obviously, lu12i.w and addi.w/ld.w can not get address > 0xfffff7fc abs64 is exactly same as abs32. However, it is good idea to replace (lu12i.w,ori,ld.w) with (lu12i.w ld.w) if sym address in range -2G-2k ~~ +2G-2k?