From: Jan Beulich <jbeulich@suse.com>
To: Binutils <binutils@sourceware.org>
Cc: "H.J. Lu" <hjl.tools@gmail.com>
Subject: [PATCH] x86: adjust recently introduced testcases
Date: Fri, 4 Nov 2022 14:12:07 +0100 [thread overview]
Message-ID: <cc133c88-9ce9-5e3a-a8f7-ad72766862b9@suse.com> (raw)
The issue addressed by 2c02c72c62d2 ("re: Support Intel AMX-FP16") has
been introduced once again in a number of new tests.
--- a/gas/testsuite/gas/i386/avx-ne-convert.d
+++ b/gas/testsuite/gas/i386/avx-ne-convert.d
@@ -168,3 +168,4 @@ Disassembly of section \.text:
\s*[a-f0-9]+:\s*62 f2 7e 28 72 72 80\s+vcvtneps2bf16y -0x1000\(%edx\),%xmm6
\s*[a-f0-9]+:\s*c4 e2 7e 72 b2 00 f0 ff ff\s+\{vex\} vcvtneps2bf16y -0x1000\(%edx\),%xmm6
\s*[a-f0-9]+:\s*c4 e2 7e 72 b2 00 f0 ff ff\s+\{vex\} vcvtneps2bf16y -0x1000\(%edx\),%xmm6
+#pass
--- a/gas/testsuite/gas/i386/avx-ne-convert-intel.d
+++ b/gas/testsuite/gas/i386/avx-ne-convert-intel.d
@@ -168,3 +168,4 @@ Disassembly of section \.text:
\s*[a-f0-9]+:\s*62 f2 7e 28 72 72 80\s+vcvtneps2bf16 xmm6,YMMWORD PTR \[edx-0x1000\]
\s*[a-f0-9]+:\s*c4 e2 7e 72 b2 00 f0 ff ff\s+\{vex\} vcvtneps2bf16 xmm6,YMMWORD PTR \[edx-0x1000\]
\s*[a-f0-9]+:\s*c4 e2 7e 72 b2 00 f0 ff ff\s+\{vex\} vcvtneps2bf16 xmm6,YMMWORD PTR \[edx-0x1000\]
+#pass
--- a/gas/testsuite/gas/i386/wrmsrns.d
+++ b/gas/testsuite/gas/i386/wrmsrns.d
@@ -10,3 +10,4 @@ Disassembly of section \.text:
0+ <_start>:
\s*[a-f0-9]+:\s*0f 01 c6\s+wrmsrns
\s*[a-f0-9]+:\s*0f 01 c6\s+wrmsrns
+#pass
--- a/gas/testsuite/gas/i386/x86-64-avx-ne-convert.d
+++ b/gas/testsuite/gas/i386/x86-64-avx-ne-convert.d
@@ -168,3 +168,4 @@ Disassembly of section \.text:
\s*[a-f0-9]+:\s*62 f2 7e 28 72 72 80\s+vcvtneps2bf16y -0x1000\(%rdx\),%xmm6
\s*[a-f0-9]+:\s*c4 e2 7e 72 b2 00 f0 ff ff\s+\{vex\} vcvtneps2bf16y -0x1000\(%rdx\),%xmm6
\s*[a-f0-9]+:\s*c4 e2 7e 72 b2 00 f0 ff ff\s+\{vex\} vcvtneps2bf16y -0x1000\(%rdx\),%xmm6
+#pass
--- a/gas/testsuite/gas/i386/x86-64-avx-ne-convert-intel.d
+++ b/gas/testsuite/gas/i386/x86-64-avx-ne-convert-intel.d
@@ -168,3 +168,4 @@ Disassembly of section \.text:
\s*[a-f0-9]+:\s*62 f2 7e 28 72 72 80\s+vcvtneps2bf16 xmm6,YMMWORD PTR \[rdx-0x1000\]
\s*[a-f0-9]+:\s*c4 e2 7e 72 b2 00 f0 ff ff\s+\{vex\} vcvtneps2bf16 xmm6,YMMWORD PTR \[rdx-0x1000\]
\s*[a-f0-9]+:\s*c4 e2 7e 72 b2 00 f0 ff ff\s+\{vex\} vcvtneps2bf16 xmm6,YMMWORD PTR \[rdx-0x1000\]
+#pass
--- a/gas/testsuite/gas/i386/x86-64-cmpccxadd.d
+++ b/gas/testsuite/gas/i386/x86-64-cmpccxadd.d
@@ -264,3 +264,4 @@ Disassembly of section \.text:
\s*[a-f0-9]+:\s*c4 c2 e1 e4 09\s+cmpzxadd %rbx,%rcx,\(%r9\)
\s*[a-f0-9]+:\s*c4 e2 f9 e4 89 f8 03 00 00\s+cmpzxadd %rax,%rcx,0x3f8\(%rcx\)
\s*[a-f0-9]+:\s*c4 e2 e1 e4 8a 00 fc ff ff\s+cmpzxadd %rbx,%rcx,-0x400\(%rdx\)
+#pass
--- a/gas/testsuite/gas/i386/x86-64-cmpccxadd-intel.d
+++ b/gas/testsuite/gas/i386/x86-64-cmpccxadd-intel.d
@@ -264,3 +264,4 @@ Disassembly of section \.text:
\s*[a-f0-9]+:\s*c4 c2 e1 e4 09\s+cmpzxadd QWORD PTR \[r9\],rcx,rbx
\s*[a-f0-9]+:\s*c4 e2 f9 e4 89 f8 03 00 00\s+cmpzxadd QWORD PTR \[rcx\+0x3f8\],rcx,rax
\s*[a-f0-9]+:\s*c4 e2 e1 e4 8a 00 fc ff ff\s+cmpzxadd QWORD PTR \[rdx-0x400\],rcx,rbx
+#pass
--- a/gas/testsuite/gas/i386/x86-64-msrlist.d
+++ b/gas/testsuite/gas/i386/x86-64-msrlist.d
@@ -12,3 +12,4 @@ Disassembly of section \.text:
\s*[a-f0-9]+:\s*f3 0f 01 c6\s+wrmsrlist
\s*[a-f0-9]+:\s*f2 0f 01 c6\s+rdmsrlist
\s*[a-f0-9]+:\s*f3 0f 01 c6\s+wrmsrlist
+#pass
next reply other threads:[~2022-11-04 13:12 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-04 13:12 Jan Beulich [this message]
2022-11-04 16:16 ` H.J. Lu
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