From: WANG Xuerui <i.swmail@xen0n.name>
To: mengqinggang <mengqinggang@loongson.cn>, binutils@sourceware.org
Cc: xuchenghua@loongson.cn, chenglulu@loongson.cn,
liuzhensong@loongson.cn, xry111@xry111.site, i.swmail@xen0n.name,
maskray@google.com
Subject: Re: [PATCH] LoongArch: gas: Add LVZ and LBT instructions support
Date: Thu, 29 Jun 2023 20:38:11 +0800 [thread overview]
Message-ID: <cd2273a2-c205-7453-3445-01902dac3694@xen0n.name> (raw)
In-Reply-To: <20230629090831.2579210-1-mengqinggang@loongson.cn>
Hi,
Upon closer look (while compiling the loongarch-opcodes data)...
On 2023/6/29 17:08, mengqinggang wrote:
> [snip]
> +
> +static struct loongarch_opcode loongarch_lbt_opcodes[] =
> +{
> + /* match, mask, name, format, macro, include, exclude, pinfo. */
> + [snip]
> + {0x00368000, 0xffffc3e0, "setx86j", "r0:5,u10:4", 0, 0, 0, 0},
> + {0x00007800, 0xfffffc00, "setx86loope", "r0:5,r5:5", 0, 0, 0, 0},
> + {0x00007c00, 0xfffffc00, "setx86loopne", "r0:5,r5:5", 0, 0, 0, 0},
These 3 instructions are named "setx86..." instead of the obvious
"x86set...". This is especially inconsistent, because we even have...
> + {0x005c0000, 0xfffc03e0, "x86mfflag", "r0:5,u10:8", 0, 0, 0, 0},
> + {0x005c0020, 0xfffc03e0, "x86mtflag", "r0:5,u10:8", 0, 0, 0, 0},
> + {0x00007400, 0xffffffe0, "x86mftop", "r0:5", 0, 0, 0, 0},
> + {0x00007000, 0xffffff1f, "x86mttop", "u5:3", 0, 0, 0, 0},
> + {0x00008009, 0xffffffff, "x86inctop", "", 0, 0, 0, 0},
> + {0x00008029, 0xffffffff, "x86dectop", "", 0, 0, 0, 0},
> + {0x00008008, 0xffffffff, "x86settm", "", 0, 0, 0, 0},
This, which is "x86set...". We probably don't want "setx86" and "x86set"
to co-exist, and the trivial fix would be adding "x86setj" "x86setloope"
and "x86setloopne".
> + {0x00008028, 0xffffffff, "x86clrtm", "", 0, 0, 0, 0},
> + {0x00580000, 0xfffc0000, "x86settag", "r0:5,u5:5,u10:8", 0, 0, 0, 0},
> + {0x00370010, 0xffff8010, "armadd.w", "r5:5,r10:5,u0:4", 0, 0, 0, 0},
> + {0x00378010, 0xffff8010, "armsub.w", "r5:5,r10:5,u0:4", 0, 0, 0, 0},
> + {0x00380010, 0xffff8010, "armadc.w", "r5:5,r10:5,u0:4", 0, 0, 0, 0},
> + {0x00388010, 0xffff8010, "armsbc.w", "r5:5,r10:5,u0:4", 0, 0, 0, 0},
> + {0x00390010, 0xffff8010, "armand.w", "r5:5,r10:5,u0:4", 0, 0, 0, 0},
> + {0x00398010, 0xffff8010, "armor.w", "r5:5,r10:5,u0:4", 0, 0, 0, 0},
> + {0x003a0010, 0xffff8010, "armxor.w", "r5:5,r10:5,u0:4", 0, 0, 0, 0},
> + {0x003fc01c, 0xffffc01f, "armnot.w", "r5:5,u10:4", 0, 0, 0, 0},
> + {0x003a8010, 0xffff8010, "armsll.w", "r5:5,r10:5,u0:4", 0, 0, 0, 0},
> + {0x003b0010, 0xffff8010, "armsrl.w", "r5:5,r10:5,u0:4", 0, 0, 0, 0},
> + {0x003b8010, 0xffff8010, "armsra.w", "r5:5,r10:5,u0:4", 0, 0, 0, 0},
> + {0x003c0010, 0xffff8010, "armrotr.w", "r5:5,r10:5,u0:4", 0, 0, 0, 0},
> + {0x003c8010, 0xffff8010, "armslli.w", "r5:5,u10:5,u0:4", 0, 0, 0, 0},
> + {0x003d0010, 0xffff8010, "armsrli.w", "r5:5,u10:5,u0:4", 0, 0, 0, 0},
> + {0x003d8010, 0xffff8010, "armsrai.w", "r5:5,u10:5,u0:4", 0, 0, 0, 0},
> + {0x003e0010, 0xffff8010, "armrotri.w", "r5:5,u10:5,u0:4", 0, 0, 0, 0},
> + {0x003fc01f, 0xffffc01f, "armrrx.w", "r5:5,u10:4", 0, 0, 0, 0},
> + {0x00364000, 0xffffc000, "armmove", "r0:5,r5:5,u10:4", 0, 0, 0, 0},
> + {0x003fc01d, 0xffffc01f, "armmov.w", "r5:5,u10:4", 0, 0, 0, 0},
> + {0x003fc01e, 0xffffc01f, "armmov.d", "r5:5,u10:4", 0, 0, 0, 0},
> + {0x005c0040, 0xfffc03e0, "armmfflag", "r0:5,u10:8", 0, 0, 0, 0},
> + {0x005c0060, 0xfffc03e0, "armmtflag", "r0:5,u10:8", 0, 0, 0, 0},
> + {0x0036c000, 0xffffc3e0, "setarmj", "r0:5,u10:4", 0, 0, 0, 0},
Similarly here; "armsetj" would be more consistent with the rest.
Again, IMO it would be okay to temporarily keep the old names around for
some time if you want too, but ideally new names should be added so
surprise for users is minimized.
prev parent reply other threads:[~2023-06-29 12:38 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-29 9:08 mengqinggang
2023-06-29 11:33 ` WANG Xuerui
2023-06-29 12:29 ` Chenghua Xu
2023-06-29 12:42 ` WANG Xuerui
2023-06-29 12:38 ` WANG Xuerui [this message]
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