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[37.24.206.209]) by smtp.gmail.com with ESMTPSA id m8-20020a05600c4f4800b00411fb769583sm10620757wmq.27.2024.02.19.00.00.54 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 19 Feb 2024 00:00:54 -0800 (PST) Message-ID: Date: Mon, 19 Feb 2024 09:00:55 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/4] x86/APX: respect {vex}/{vex3} Content-Language: en-US To: "Cui, Lili" Cc: "H.J. Lu" , Binutils References: <3098e797-3749-40ee-802c-ea8a6f63914c@suse.com> <8a7e7a43-37d4-425c-8166-6ba8b758f0f4@suse.com> From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-3025.5 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_NONE,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On 18.02.2024 08:55, Cui, Lili wrote: >> Even when an EVEX encoding is available, use of such a prefix ought to be >> respected (resulting in an error) rather than ignored. As requested during >> review already, introduce a new encoding enumerator to record use of eGPR- >> s, and update state transitions accordingly. >> > > Yes, we have such issue for dual VEX/EVEX templates. > >> The optimize_encoding() change also addresses an internal assembler error >> that was previously raised when respective memory operands used eGPR-s for >> addressing. >> >> While this results in a change of diagnostic issued for VEX-encoded insns, the >> new one is at least no worse than the prior one. >> --- >> Question is whether for the state transitions we want to introduce a couple of >> helper functions: check_register() has duplicates each of what >> RC_SAE_specifier() and check_VecOperations() also do. >> >> --- a/gas/config/tc-i386.c >> +++ b/gas/config/tc-i386.c >> @@ -439,9 +439,6 @@ struct _i386_insn >> /* Prefer the REX2 prefix in encoding. */ >> bool rex2_encoding; >> >> - /* Need to use an Egpr capable encoding (REX2 or EVEX). */ >> - bool has_egpr; >> - >> /* Disable instruction size optimization. */ >> bool no_optimize; >> >> @@ -451,6 +448,7 @@ struct _i386_insn >> encoding_default = 0, >> encoding_vex, >> encoding_vex3, >> + encoding_egpr, /* REX2 or EVEX. */ > > I find it difficult to understand putting egpr here. Although this area can be further optimized, it is difficult to say that this solution is clearer than the current one. > > 1. We have separated vex/evex and rex/rex2, and put the state containing both rex2 and evex in vex/evex encoding, so that the logic becomes confusing. > 2. In this enumeration, each enumeration represents an encoding format, and only encoding_egpr describes the register of the operand. I don't view it like this: This enumerator indicates "need an encoding which can represent eGPR-s, i.e. REX2 or EVEX". To me encoding_rex2_or_evex would be pretty clearly worse a name for it. > 3. encoding_egpr is not the final encoding expression, but an intermediate state that ultimately needs to be converted into other expressions of the same level. Not much different from encoding_evex512. > If this patch just wants to report an error to vex prefix, maybe we could handle it like this. Or create a separate branch. > > --- a/gas/config/tc-i386.c > +++ b/gas/config/tc-i386.c > @@ -8322,7 +8322,8 @@ VEX_check_encoding (const insn_template *t) > return 0; > } > > - if (!t->opcode_modifier.vex) > + if (!t->opcode_modifier.vex > + || ((i.vec_encoding == vex_encoding_vex) && i.has_egpr)) > { > /* This instruction template doesn't have VEX prefix. */ > if (i.vec_encoding != vex_encoding_default) That's indeed a possibility, I think. Yet already when reviewing the original work of yours I indicated that I'd like the encoding restrictions all be represented by a single enum. To me it is more difficult to follow when there are two separate entities which need to be consulted in order to reflect all constraints. >> +.*:211: Error: no VEX/XOP encoding for `and' >> +.*:212: Error: no VEX/XOP encoding for `and' >> +.*:213: Error: .* `and' >> +.*:214: Error: no VEX/XOP encoding for `and' >> +.*:215: Error: no VEX/XOP encoding for `and' >> +.*:216: Error: .* `and' >> +.*:219: Error: .* `andn' Please pay attention to the gap in line numbers here; that ... >> --- a/gas/testsuite/gas/i386/x86-64-apx-egpr-inval.s >> +++ b/gas/testsuite/gas/i386/x86-64-apx-egpr-inval.s >> @@ -207,3 +207,13 @@ >> vtestpd (%r27),%ymm6 >> vtestps (%r27),%xmm6 >> vtestps (%r27),%ymm6 >> +# {vex} >> + {vex} and %eax, %eax >> + {vex} and %r8, %r8 >> + {vex} and %r16, %r16 >> + {vex} and %eax, %eax, %eax >> + {vex} and %r8, %r8, %r8 >> + {vex} and %r16, %r16, %r16 >> + {vex} andn %eax, %eax, %eax >> + {vex} andn %r8, %r8, %r8 > > These two test cases are valid. ... reflects exactly this fact. Jan