From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-sender-0.a4lg.com (mail-sender-0.a4lg.com [IPv6:2401:2500:203:30b:4000:6bfe:4757:0]) by sourceware.org (Postfix) with ESMTPS id E1D843857820 for ; Tue, 1 Feb 2022 13:53:28 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org E1D843857820 From: Tsukasa OI To: Tsukasa OI Cc: binutils@sourceware.org Subject: [PATCH 0/4] RISC-V: Zfinx fixes/enhancements: Part 3 Date: Tue, 1 Feb 2022 22:53:25 +0900 Message-Id: In-Reply-To: References: Mime-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00, KAM_DMARC_STATUS, KAM_NUMSUBJECT, SPF_HELO_NONE, SPF_PASS, TO_EQ_FM_DIRECT_MX, TXREP, T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 01 Feb 2022 13:53:30 -0000 [About this patchset] This is the Part 3 of my Z[fdq]inx fixes and enhancements. See Part 1 for general background and Part 2A for the bug which this Part 3 tests. (Part 1) (Part 2A) [About this Part] Part 3 contains common testcases to make sure that the issue I described on Part 2A is fixed. As I described earlier, Zdinx/Zqinx has register number constraints and GNU Binutils allows emitting invalid Zdinx/Zqinx instructions (before patchset Part 2 is applied). This constraint is dependent on the instruction so all Zdinx/Zqinx instructions are tested for assembler. PATCH 1: Zdinx, assembler PATCH 2: Zdinx, disassembler PATCH 3: Zqinx, assembler PATCH 4: Zqinx, disassembler Note that applying Part 2B will generate failure on disassembler tests (I added on PATCH 2 and 4). This is because I stopped before tackling with disassembler issue with this option. Tsukasa OI (4): RISC-V: Add assembler testcases for Zdinx regs RISC-V: Add disassembler tests for Zdinx regs RISC-V: Add assembler testcases for Zqinx regs RISC-V: Add disassembler tests for Zqinx regs .../gas/riscv/zdinx-32-regpair-dis.d | 11 + .../gas/riscv/zdinx-32-regpair-dis.s | 5 + .../gas/riscv/zdinx-32-regpair-fail.d | 3 + .../gas/riscv/zdinx-32-regpair-fail.l | 111 +++++++++ .../gas/riscv/zdinx-32-regpair-fail.s | 116 ++++++++++ gas/testsuite/gas/riscv/zdinx-32-regpair.d | 65 ++++++ gas/testsuite/gas/riscv/zdinx-32-regpair.s | 62 +++++ .../gas/riscv/zqinx-32-regpair-dis.d | 12 + .../gas/riscv/zqinx-32-regpair-dis.s | 7 + .../gas/riscv/zqinx-32-regpair-fail.d | 3 + .../gas/riscv/zqinx-32-regpair-fail.l | 212 +++++++++++++++++ .../gas/riscv/zqinx-32-regpair-fail.s | 218 ++++++++++++++++++ gas/testsuite/gas/riscv/zqinx-32-regpair.d | 66 ++++++ gas/testsuite/gas/riscv/zqinx-32-regpair.s | 64 +++++ .../gas/riscv/zqinx-64-regpair-dis.d | 11 + .../gas/riscv/zqinx-64-regpair-dis.s | 5 + .../gas/riscv/zqinx-64-regpair-fail.d | 3 + .../gas/riscv/zqinx-64-regpair-fail.l | 133 +++++++++++ .../gas/riscv/zqinx-64-regpair-fail.s | 138 +++++++++++ gas/testsuite/gas/riscv/zqinx-64-regpair.d | 87 +++++++ gas/testsuite/gas/riscv/zqinx-64-regpair.s | 84 +++++++ 21 files changed, 1416 insertions(+) create mode 100644 gas/testsuite/gas/riscv/zdinx-32-regpair-dis.d create mode 100644 gas/testsuite/gas/riscv/zdinx-32-regpair-dis.s create mode 100644 gas/testsuite/gas/riscv/zdinx-32-regpair-fail.d create mode 100644 gas/testsuite/gas/riscv/zdinx-32-regpair-fail.l create mode 100644 gas/testsuite/gas/riscv/zdinx-32-regpair-fail.s create mode 100644 gas/testsuite/gas/riscv/zdinx-32-regpair.d create mode 100644 gas/testsuite/gas/riscv/zdinx-32-regpair.s create mode 100644 gas/testsuite/gas/riscv/zqinx-32-regpair-dis.d create mode 100644 gas/testsuite/gas/riscv/zqinx-32-regpair-dis.s create mode 100644 gas/testsuite/gas/riscv/zqinx-32-regpair-fail.d create mode 100644 gas/testsuite/gas/riscv/zqinx-32-regpair-fail.l create mode 100644 gas/testsuite/gas/riscv/zqinx-32-regpair-fail.s create mode 100644 gas/testsuite/gas/riscv/zqinx-32-regpair.d create mode 100644 gas/testsuite/gas/riscv/zqinx-32-regpair.s create mode 100644 gas/testsuite/gas/riscv/zqinx-64-regpair-dis.d create mode 100644 gas/testsuite/gas/riscv/zqinx-64-regpair-dis.s create mode 100644 gas/testsuite/gas/riscv/zqinx-64-regpair-fail.d create mode 100644 gas/testsuite/gas/riscv/zqinx-64-regpair-fail.l create mode 100644 gas/testsuite/gas/riscv/zqinx-64-regpair-fail.s create mode 100644 gas/testsuite/gas/riscv/zqinx-64-regpair.d create mode 100644 gas/testsuite/gas/riscv/zqinx-64-regpair.s base-commit: e327c35ef5768789d3ba41a629f178f5eec32790 -- 2.32.0