From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-sender-0.a4lg.com (mail-sender.a4lg.com [153.120.152.154]) by sourceware.org (Postfix) with ESMTPS id 2FB1F38582BB for ; Wed, 1 Jun 2022 03:42:40 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 2FB1F38582BB Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id 180BD300089; Wed, 1 Jun 2022 03:42:37 +0000 (UTC) From: Tsukasa OI To: Tsukasa OI , Weiwei Li , Nelson Chu , Kito Cheng Cc: binutils@sourceware.org Subject: [PATCH 0/1] RISC-V: Add 'H' to canonical extension ordering Date: Wed, 1 Jun 2022 12:42:31 +0900 Message-Id: Mime-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-6.2 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 01 Jun 2022 03:42:42 -0000 Hello, I was making bigger patchset that supports all Zfh/Zfhmin/Zhinx/Zhinxmin and this work is a part of it. I felt this particular patch is urgent. To implement Zhinx/Zhinxmin extensions, we have to determine where to place Zh* extensions. To resolve this problem, I raised an issue on RISC-V ISA Manual GitHub: ...and we made a consensus. We will put 'H' after 'V'. Considering compatibility with QEMU and LLVM, we can put 'H' after 'N' (making 'P' -> 'V' -> 'N' -> 'H' canonical ordering for compatibility). Although this kind of canonical ordering is not ratified yet, it's at least worth prototyping now. This makes two crucial differences: 1. In -march option allowed 2. In .riscv.attributes section 1. -march option allowed On a machine with GPR-FP support for 16, 32 and 64-bit floating point numbers, Jiawei's patch allows: -march=rv64imac_zhinx_zicsr_zifencei_zdinx but my upcoming patch allows: -march=rv64imac_zicsr_zifencei_zdinx_zhinx Note that Jiawei's patch (now merged) requires Zhinx to be placed before Zi* extensions. The latter will be canonical. But considering canonical ordering is too much for regular developers, former should be made valid on future patches. 2. .riscv.attributes section With Jiawei's patch: Contents of section .riscv.attributes: Contents of section .riscv.attributes: 0000 41580000 00726973 63760001 4e000000 AX...riscv..N... 0010 05727636 34693270 315f6d32 70305f61 .rv64i2p1_m2p0_a 0020 3270315f 63327030 5f7a6869 6e783170 2p1_c2p0_zhinx1p 0030 305f7a69 63737232 70305f7a 6966656e 0_zicsr2p0_zifen 0040 63656932 70305f7a 66696e78 3170305f cei2p0_zfinx1p0_ 0050 7a64696e 78317030 00 zdinx1p0. With Jiawei's and this patch: Contents of section .riscv.attributes: 0000 41580000 00726973 63760001 4e000000 AX...riscv..N... 0010 05727636 34693270 315f6d32 70305f61 .rv64i2p1_m2p0_a 0020 3270315f 63327030 5f7a6963 73723270 2p1_c2p0_zicsr2p 0030 305f7a69 66656e63 65693270 305f7a66 0_zifencei2p0_zf 0040 696e7831 70305f7a 64696e78 3170305f inx1p0_zdinx1p0_ 0050 7a68696e 78317030 00 zhinx1p0. Just like in -march, there is a difference on Zhinx extension location. Again, this kind of difference should be handled by future toolchains. But it's worth making extension ordering canonical as possible, for now. If 'H' extension is going to be version 1.0, it's not a bad time to implement 'H' extension itself (since one of the two biggest obstacle to implement actual 'H' extension will go with this patch). Thanks, Tsukasa Tsukasa OI (1): RISC-V: Add 'H' to canonical extension ordering bfd/elfxx-riscv.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) base-commit: b0de9ed86f3af84fbd636f94a58b9c4ad7f4e743 -- 2.34.1