From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-sender-0.a4lg.com (mail-sender-0.a4lg.com [IPv6:2401:2500:203:30b:4000:6bfe:4757:0]) by sourceware.org (Postfix) with ESMTPS id CA8573858025 for ; Thu, 22 Sep 2022 06:30:42 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org CA8573858025 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=irq.a4lg.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=irq.a4lg.com Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id 1E61E300089; Thu, 22 Sep 2022 06:30:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=irq.a4lg.com; s=2017s01; t=1663828240; bh=MX/V8OUXtcYpkFLFv+vI288ijKFasUefy5sLvvbaPIE=; h=From:To:Cc:Subject:Date:Message-Id:Mime-Version: Content-Transfer-Encoding; b=RXfnO3Wb34+HYbVpd0NxYbDVXgf9tzVwGMSAQGXWsAUQsT501lDDMRHFaH1QaTwoC LcZQndmwA4I2naeyxMDTRNH0+zstRjBImYB0rbxeAudWBfjz/AqTtR1+pWmIaOcKA5 O2PY+SuKHp/T/IW7M1kAPTaFb+5ZJHvCi8s37WvQ= From: Tsukasa OI To: Tsukasa OI , Nelson Chu , Kito Cheng , Palmer Dabbelt Cc: binutils@sourceware.org Subject: [PATCH v2 0/2] RISC-V: Opcode Tidying - Operands (batch 1) Date: Thu, 22 Sep 2022 06:30:36 +0000 Message-Id: Mime-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-6.2 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Hello, This is a small patchset to clean / maintain RISC-V instruction operand types. [Changes: v1 -> v2] - Cleaning? (possibly unchanged? then this is a ping) [PATCH 1/2] Since `validate_riscv_insn' function lists three macro-only operand types, this patch adds other three operands. That means, `validate_riscv_insn' lists all macro-only operand types with this patch. Existing: - A - B - I New in This Patch: - c - VM - VT Note that `validate_riscv_insn' is called only for non-macros. In the future, we could reject (and make an internal error) when we encountered those macro-only operand types on regular (non-macro) instructions. [PATCH 2/2] The operand type "b" has no good reasons to keep and should be removed. - It looks like an alias of the "s" operand type. - It hasn't used since the beginning. - Its role is not clear. On the other hand, this patch keeps following unused operand types for now: - Cx : future compressed instructions? - Vf, Ve : vector AMO instructions (instructions are not upstreamed but operand types are upstreamed already) - [, ] : used by some vendors? At least, their role is clear. Thanks, Tsukasa Tsukasa OI (2): RISC-V: Add macro-only operands to validate_riscv_insn RISC-V: Remove "b" operand type from disassembler gas/config/tc-riscv.c | 3 +++ opcodes/riscv-dis.c | 1 - 2 files changed, 3 insertions(+), 1 deletion(-) base-commit: 90eca7111355e4c6683c1ab10fd07107ea10f6d1 -- 2.34.1