From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-sender-0.a4lg.com (mail-sender.a4lg.com [153.120.152.154]) by sourceware.org (Postfix) with ESMTPS id 46FF3389EC66 for ; Sat, 8 Oct 2022 04:31:18 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 46FF3389EC66 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=irq.a4lg.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=irq.a4lg.com Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id AB9E8300089; Sat, 8 Oct 2022 04:31:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=irq.a4lg.com; s=2017s01; t=1665203476; bh=CHl5DdPf1Ov+Ones0Mh6iSYOdq00Rztx/YZqdhdJXHM=; h=From:To:Cc:Subject:Date:Message-Id:Mime-Version: Content-Transfer-Encoding; b=d9Z29aRDaFQpGM9neTJgT1n2Huwi5ReJNc76mEtbX38+IRo6n6bYjta4b0jwy6oAl nfLSZuBH62fd+hOsz94GfM/8Z9Y7LyIwws7Yiol8CJTz5dNJbfkoq2TjwxRfP4l87o CX3NA9zzCCUpoccH5eZQwII/a/gRrQS7lxh8Rw/g= From: Tsukasa OI To: Tsukasa OI Cc: binutils@sourceware.org Subject: [PATCH 0/1] RISC-V: RISC-V: Move standard hints before all instructions Date: Sat, 8 Oct 2022 04:31:14 +0000 Message-Id: Mime-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-6.0 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Hello, GitHub tracker: This is another small tidying patchset. Because of the scanning process of the RISC-V disassembler, all standard hints must be placed before corresponding instruction. In the past, "prefetch.[irw]" (from 'Zicbop') hints are placed just before ORI and "pause" (from 'Zihintpause') is placed just before FENCE. It's not bad but will force the developer to "taint" basic instructions section. Considering upcoming 'Zihintntl' standard hints will be a bit more complex than the current hints (some can be a part of either "ADD" or "C.ADD") and the disassembler is fine as long as a hint instruction is placed before the base instruction (no need them to be adjacent), I think moving all standard hints before all real instructions might improve the readability and won't disrupt the indentation of basic instructions anymore. Thanks, Tsukasa Tsukasa OI (1): RISC-V: Move standard hints before all instructions opcodes/riscv-opc.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) base-commit: 4cbfd0daabd68516651ee37a19d0e24ca4789ea3 -- 2.34.1