From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-sender-0.a4lg.com (mail-sender.a4lg.com [153.120.152.154]) by sourceware.org (Postfix) with ESMTPS id E01723858D28 for ; Tue, 29 Nov 2022 01:17:00 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org E01723858D28 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=irq.a4lg.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=irq.a4lg.com Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id BD96C300089; Tue, 29 Nov 2022 01:16:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=irq.a4lg.com; s=2017s01; t=1669684617; bh=CZrrlWeT3sb2URHyoZbFqI1ZwVnVK+rT2+wWs9FEC9E=; h=From:To:Cc:Subject:Date:Message-Id:Mime-Version: Content-Transfer-Encoding; b=nXjx7W6NIyQtouS4IlPuWb5TsFZBe3NiFwDvO3GZBPS3hnF6mx/JUHMwyX6zNXGaU zSfe0XUMaYTy4wT9tLPyKjS/CUZbENKAX9l4oPpy6y1KGL/m4KtkQmubk8cbRCgDdN cHlOW+WLW0DolaIvZvKs1oN8D2F/822ndojs02ho= From: Tsukasa OI To: Tsukasa OI Cc: binutils@sourceware.org Subject: [REVIEW ONLY 0/1] UNRATIFIED RISC-V: Add 'ZiCondOps' extension Date: Tue, 29 Nov 2022 01:16:55 +0000 Message-Id: Mime-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-6.1 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: *** WAIT FOR SPECIFICATION FREEZE *** This is an implementation for unratified and not frozen RISC-V extension and not intended to be merged for now. The only intent to submit this patchset is to test new instructions for your (possibly virtual) environment and early review for fast adoption after ratification. This patchset adds following unratified extension to GNU Binutils: - 'ZiCondOps' (Integer Conditional Operations) version 1.0 in development which adds 2 instructions ("czero.eqz" and "czero.nez"). This extension makes conditional arithmetic feature much simpler (fewer instructions when no branches are allowed). Note that constant timing guarantee (data-independence / certain side-channel resistance) for this extension is being discussed and may not be guaranteed. This is based on the commit 91e173db8678 of the specification document: Tsukasa OI (1): UNRATIFIED RISC-V: Add 'ZiCondOps' extension bfd/elfxx-riscv.c | 5 +++++ gas/testsuite/gas/riscv/zicondops-noarch.d | 3 +++ gas/testsuite/gas/riscv/zicondops-noarch.l | 3 +++ gas/testsuite/gas/riscv/zicondops.d | 11 +++++++++++ gas/testsuite/gas/riscv/zicondops.s | 3 +++ include/opcode/riscv-opc.h | 8 ++++++++ include/opcode/riscv.h | 1 + opcodes/riscv-opc.c | 4 ++++ 8 files changed, 38 insertions(+) create mode 100644 gas/testsuite/gas/riscv/zicondops-noarch.d create mode 100644 gas/testsuite/gas/riscv/zicondops-noarch.l create mode 100644 gas/testsuite/gas/riscv/zicondops.d create mode 100644 gas/testsuite/gas/riscv/zicondops.s base-commit: cb44f89ce977b1ab2d4063f2487950bddfb75bc7 -- 2.38.1