[REVIEW ONLY 0/1] RISC-V (unratified): Add 'Smrnmi' extension

[Tsukasa OI <research_trasio@irq.a4lg.com>]

*** WAIT FOR SPECIFICATION FREEZE ***
This is an implementation for unratified and not frozen RISC-V extension
and not intended to be merged for now.
The only intent to submit this patchset is to test new instructions for
your (possibly virtual) environment and early review for fast adoption
after ratification.

This is the review-only PATCH v2 to keep track with latest GNU Binutils.
In this version, a dependency to 'Zicsr' is added.


This patchset adds following unratified extension to GNU Binutils:

-   Smrnmi (Resumable NMI)
    version 0.4 (may change on ratification)

... which adds "mnret" instruction and 4 CSRs related to RNMI.

This extension provides "resumable NMIs" to provide special non-maskable
interrupts (NMIs) with "resume" capability (normally, NMIs are are only used
for hardware error conditions and not resumable; however on some conditions,
there are some cases where using NMIs fits better yet resumable after
proper handling by the NMI handler [which may fail though]).


This is based on a draft version of the RISC-V ISA Manual:
<https://github.com/riscv/riscv-isa-manual/commit/28b46de77ca7fb94ffcf6cf669cc27269f6013de>


Note that it has **different** CSR values between proposed RNMI version
0.4 and RNMI as optionally implemented in SiFive U74-MC:
<https://sifive.cdn.prismic.io/sifive/2dd11994-693c-4360-8aea-5453d8642c42_u74mc_core_complex_manual_21G3.pdf>

| CSR       | proposed | SiFive |
| --------- | -------- | ------ |
| mnscratch | 0x740    | 0x350  |
| mnepc     | 0x741    | 0x351  |
| mncause   | 0x742    | 0x352  |
| mnstatus  | 0x744    | 0x353  |

Also, although that 4 CSRs are assigned with actual numbers (this is why I'm
not attaching "CSR instantiation" script in this patchset), it may be
changed before ratification.  Be careful.




Tsukasa OI (1):
  UNRATIFIED RISC-V: Add 'Smrnmi' extension and its CSRs

 bfd/elfxx-riscv.c                           |  6 ++++++
 gas/config/tc-riscv.c                       |  4 ++++
 gas/testsuite/gas/riscv/csr-dw-regnums.d    |  4 ++++
 gas/testsuite/gas/riscv/csr-dw-regnums.s    |  5 +++++
 gas/testsuite/gas/riscv/csr-version-1p10.d  |  8 ++++++++
 gas/testsuite/gas/riscv/csr-version-1p10.l  |  8 ++++++++
 gas/testsuite/gas/riscv/csr-version-1p11.d  |  8 ++++++++
 gas/testsuite/gas/riscv/csr-version-1p11.l  |  8 ++++++++
 gas/testsuite/gas/riscv/csr-version-1p12.d  |  8 ++++++++
 gas/testsuite/gas/riscv/csr-version-1p12.l  |  8 ++++++++
 gas/testsuite/gas/riscv/csr-version-1p9p1.d |  8 ++++++++
 gas/testsuite/gas/riscv/csr-version-1p9p1.l |  8 ++++++++
 gas/testsuite/gas/riscv/csr.s               |  6 ++++++
 gas/testsuite/gas/riscv/smrnmi-noarch.d     |  3 +++
 gas/testsuite/gas/riscv/smrnmi-noarch.l     |  2 ++
 gas/testsuite/gas/riscv/smrnmi.d            | 10 ++++++++++
 gas/testsuite/gas/riscv/smrnmi.s            |  2 ++
 include/opcode/riscv-opc.h                  | 15 +++++++++++++++
 include/opcode/riscv.h                      |  1 +
 opcodes/riscv-opc.c                         |  3 +++
 20 files changed, 125 insertions(+)
 create mode 100644 gas/testsuite/gas/riscv/smrnmi-noarch.d
 create mode 100644 gas/testsuite/gas/riscv/smrnmi-noarch.l
 create mode 100644 gas/testsuite/gas/riscv/smrnmi.d
 create mode 100644 gas/testsuite/gas/riscv/smrnmi.s


base-commit: cb44f89ce977b1ab2d4063f2487950bddfb75bc7
-- 
2.38.1