From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-sender-0.a4lg.com (mail-sender-0.a4lg.com [IPv6:2401:2500:203:30b:4000:6bfe:4757:0]) by sourceware.org (Postfix) with ESMTPS id 049F93858D20 for ; Sat, 21 Oct 2023 03:12:15 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 049F93858D20 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=irq.a4lg.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=irq.a4lg.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 049F93858D20 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=2401:2500:203:30b:4000:6bfe:4757:0 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1697857945; cv=none; b=an/ivNt2WxOTLRaO5/NzDIt4gK/W3sjBi4Az66P9t2qV5avNWGXijPTIaHQVYwsu9dM+ia1ecJWrTPbj/ASA7Wu2dbj0tNXvThfFA9P+sDombYsmFA/xJC2I7Ka+du/pLyDI1j1dx3rwOR0hR4cMKnz9WJzxNfNERg3nGaM2PTw= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1697857945; c=relaxed/simple; bh=TudyqKCuX26HT52gLh69E3R+U4H2zIbpRRC/IqWHL4g=; h=DKIM-Signature:From:To:Subject:Date:Message-ID:Mime-Version; b=ai34AYVxOR0XZwWBLGGf9VRitesF55lA2xnUmHh7WZZZ9iOwh0RONWU9QYsUlzE7uev9nm/yUxg8FS2CAnB+QI5uRlygWuzwiEczLtKlBxIu4w91t4q1PFB3mYEQSk6ixygm/KYCg73CeEn6VvKcxQBMREybytSWMcfLP0DioZE= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id 2100A300089; Sat, 21 Oct 2023 03:12:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=irq.a4lg.com; s=2017s01; t=1697857933; bh=VCB9pKPKxXAZRnQa8dvYGuK2dGO2O3mcUzxDsE35YbE=; h=From:To:Cc:Subject:Date:Message-ID:Mime-Version: Content-Transfer-Encoding; b=TcylEwjUvQLc98eHgTFa5GD+40bf3AKThC6zXG8qxMr+Zy+MjBZdQ07xKvbt+Fd4O SPcqIRdzyrL0p8hF5L6MB8hO0rIggduj3xT/4KiNw/kXrh8Xj/iSv+M4t33CX3cQPS 6JJI8bxTwa2sWv2rnKeGmSBJ3Opoa3v4uioz9Bhc= From: Tsukasa OI To: Tsukasa OI , Palmer Dabbelt , Andrew Waterman , Jim Wilson , Nelson Chu , Kito Cheng Cc: binutils@sourceware.org Subject: [PATCH 0/1] RISC-V: Add support for 'Zacas' atomic CAS Date: Sat, 21 Oct 2023 03:12:08 +0000 Message-ID: Mime-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-5.9 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,KAM_MANYTO,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Hi, This patch adds support for now frozen (and being ratification) 'Zacas' extension, containing atomic CAS instructions. There are two patch sets by other people: By Gianluca Guida (in 2023 May; RFC PATCH v2 at that time): By Jiawei (in 2023 July; withdrawn): ... but independently developed. Note that, this is one of the extensions that require the concept of register pairs or register groups because it contains 2*XLEN-width (double-word) CAS instructions. We are better to reject invalid encodings considering the consensus after the discussion of RISC-V GNU Toolchain meeting at 2022-10-06 (the feedback of my proposal itself wasn't positive but we agreed that we are better to detect invalid encodings as early as possible [I mean, in the assembler]) and the feedback to Gianluca's first RFC PATCH by Jan: Differences to Gianluka's: 1. Correct data size (INSN_DREF|INSN_*_BYTE) we are handling 2. Make register pair matching function to be template to enable reusing this framework for upcoming P and existing Zdinx and V (many V cases are invalid only on certain runtime configuration and "always invalid" detectable cases are rare, but not zero). Differences to Jiawei's: 1. Correct support for register groups (fixed in Gianluka's RFC PATCH v2). Thanks, Tsukasa Tsukasa OI (1): RISC-V: Add support for 'Zacas' atomic CAS bfd/elfxx-riscv.c | 6 +++++ gas/testsuite/gas/riscv/zacas-32-fail.d | 2 ++ gas/testsuite/gas/riscv/zacas-32-fail.l | 9 +++++++ gas/testsuite/gas/riscv/zacas-32-fail.s | 10 +++++++ gas/testsuite/gas/riscv/zacas-32.d | 17 ++++++++++++ gas/testsuite/gas/riscv/zacas-32.s | 9 +++++++ gas/testsuite/gas/riscv/zacas-64-fail.d | 2 ++ gas/testsuite/gas/riscv/zacas-64-fail.l | 9 +++++++ gas/testsuite/gas/riscv/zacas-64-fail.s | 10 +++++++ gas/testsuite/gas/riscv/zacas-64.d | 17 ++++++++++++ gas/testsuite/gas/riscv/zacas-64.s | 9 +++++++ include/opcode/riscv-opc.h | 11 ++++++++ include/opcode/riscv.h | 1 + opcodes/riscv-opc.c | 36 +++++++++++++++++++++++++ 14 files changed, 148 insertions(+) create mode 100644 gas/testsuite/gas/riscv/zacas-32-fail.d create mode 100644 gas/testsuite/gas/riscv/zacas-32-fail.l create mode 100644 gas/testsuite/gas/riscv/zacas-32-fail.s create mode 100644 gas/testsuite/gas/riscv/zacas-32.d create mode 100644 gas/testsuite/gas/riscv/zacas-32.s create mode 100644 gas/testsuite/gas/riscv/zacas-64-fail.d create mode 100644 gas/testsuite/gas/riscv/zacas-64-fail.l create mode 100644 gas/testsuite/gas/riscv/zacas-64-fail.s create mode 100644 gas/testsuite/gas/riscv/zacas-64.d create mode 100644 gas/testsuite/gas/riscv/zacas-64.s base-commit: 0e17d3fc080f543d81e6c2520ba0bd8046ea3a95 -- 2.42.0