From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-sender-0.a4lg.com (mail-sender.a4lg.com [153.120.152.154]) by sourceware.org (Postfix) with ESMTPS id 1FE6538582A9 for ; Sun, 7 Aug 2022 08:00:37 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 1FE6538582A9 Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id 76F78300089; Sun, 7 Aug 2022 08:00:35 +0000 (UTC) From: Tsukasa OI To: Tsukasa OI , Nelson Chu , Kito Cheng , Palmer Dabbelt Cc: binutils@sourceware.org Subject: [PATCH 1/2] RISC-V: Add macro-only operands to validate_riscv_insn Date: Sun, 7 Aug 2022 17:00:21 +0900 Message-Id: In-Reply-To: References: Mime-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-12.4 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 07 Aug 2022 08:00:38 -0000 Although they are not (and should not be) reachable, following macro-only operands are parsed in the `validate_riscv_insn' function and ignored. That function also notes that they are macro-only. - A - B - I Following this convention, this commit adds three remaining macro-only operands to this function. By doing this, we could instead choose to reject those operands from appearing in regular instructions later. - c (used by call, tail and jump macros) - VM (used by vmsge.vx and vmsgeu.vx macros) - VT (likewise) gas/ChangeLog: * config/tc-riscv.c (validate_riscv_insn): Add "c", "VM" and "VT" macro-only operand types. --- gas/config/tc-riscv.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c index 34ce68e8252..479d7f56748 100644 --- a/gas/config/tc-riscv.c +++ b/gas/config/tc-riscv.c @@ -1192,6 +1192,8 @@ validate_riscv_insn (const struct riscv_opcode *opc, int length) case 'j': case 'k': USE_BITS (OP_MASK_VIMM, OP_SH_VIMM); break; case 'm': USE_BITS (OP_MASK_VMASK, OP_SH_VMASK); break; + case 'M': break; /* Macro operand, must be a mask register. */ + case 'T': break; /* Macro operand, must be a vector register. */ default: goto unknown_validate_operand; } @@ -1203,6 +1205,7 @@ validate_riscv_insn (const struct riscv_opcode *opc, int length) case '>': USE_BITS (OP_MASK_SHAMT, OP_SH_SHAMT); break; case 'A': break; /* Macro operand, must be symbol. */ case 'B': break; /* Macro operand, must be symbol or constant. */ + case 'c': break; /* Macro operand, must be symbol or constant. */ case 'I': break; /* Macro operand, must be constant. */ case 'D': /* RD, floating point. */ case 'd': USE_BITS (OP_MASK_RD, OP_SH_RD); break; -- 2.34.1