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X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 16 Mar 2022 08:46:19 -0000 This was only rudimentary support anyway; none of the sub-architecture specific insns were ever supported. --- a/gas/NEWS +++ b/gas/NEWS @@ -1,5 +1,10 @@ -*- text -*- +Changes in 2.39: + +* Remove (rudimentary) support for the x86-64 sub-architectures Intel L1OM and + Intel K1OM. + Changes in 2.38: * Add support for AArch64 system registers that were missing in previous --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -976,10 +976,6 @@ static const arch_entry cpu_arch[] = CPU_CORE2_FLAGS, 0 }, { STRING_COMMA_LEN ("corei7"), PROCESSOR_COREI7, CPU_COREI7_FLAGS, 0 }, - { STRING_COMMA_LEN ("l1om"), PROCESSOR_L1OM, - CPU_L1OM_FLAGS, 0 }, - { STRING_COMMA_LEN ("k1om"), PROCESSOR_K1OM, - CPU_K1OM_FLAGS, 0 }, { STRING_COMMA_LEN ("iamcu"), PROCESSOR_IAMCU, CPU_IAMCU_FLAGS, 0 }, { STRING_COMMA_LEN ("k6"), PROCESSOR_K6, @@ -1599,8 +1595,6 @@ i386_generate_nops (fragS *fragP, char * case PROCESSOR_CORE: case PROCESSOR_CORE2: case PROCESSOR_COREI7: - case PROCESSOR_L1OM: - case PROCESSOR_K1OM: case PROCESSOR_GENERIC64: case PROCESSOR_K6: case PROCESSOR_ATHLON: @@ -1656,8 +1650,6 @@ i386_generate_nops (fragS *fragP, char * case PROCESSOR_CORE: case PROCESSOR_CORE2: case PROCESSOR_COREI7: - case PROCESSOR_L1OM: - case PROCESSOR_K1OM: if (fragP->tc_frag_data.isa_flags.bitfield.cpunop) patt = alt_patt; else @@ -2825,7 +2817,7 @@ check_cpu_arch_compatible (const char *n #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF) static const char *arch; - /* Intel LIOM is only supported on ELF. */ + /* Intel MCU is only supported on ELF. */ if (!IS_ELF) return; @@ -2843,16 +2835,6 @@ check_cpu_arch_compatible (const char *n == new_flag.bitfield.cpuiamcu) return; - /* If we are targeting Intel L1OM, we must enable it. */ - if (get_elf_backend_data (stdoutput)->elf_machine_code != EM_L1OM - || new_flag.bitfield.cpul1om) - return; - - /* If we are targeting Intel K1OM, we must enable it. */ - if (get_elf_backend_data (stdoutput)->elf_machine_code != EM_K1OM - || new_flag.bitfield.cpuk1om) - return; - as_bad (_("`%s' is not supported on `%s'"), name, arch); #endif } @@ -2992,21 +2974,7 @@ set_cpu_arch (int dummy ATTRIBUTE_UNUSED enum bfd_architecture i386_arch (void) { - if (cpu_arch_isa == PROCESSOR_L1OM) - { - if (OUTPUT_FLAVOR != bfd_target_elf_flavour - || flag_code != CODE_64BIT) - as_fatal (_("Intel L1OM is 64bit ELF only")); - return bfd_arch_l1om; - } - else if (cpu_arch_isa == PROCESSOR_K1OM) - { - if (OUTPUT_FLAVOR != bfd_target_elf_flavour - || flag_code != CODE_64BIT) - as_fatal (_("Intel K1OM is 64bit ELF only")); - return bfd_arch_k1om; - } - else if (cpu_arch_isa == PROCESSOR_IAMCU) + if (cpu_arch_isa == PROCESSOR_IAMCU) { if (OUTPUT_FLAVOR != bfd_target_elf_flavour || flag_code == CODE_64BIT) @@ -3022,21 +2990,7 @@ i386_mach (void) { if (startswith (default_arch, "x86_64")) { - if (cpu_arch_isa == PROCESSOR_L1OM) - { - if (OUTPUT_FLAVOR != bfd_target_elf_flavour - || default_arch[6] != '\0') - as_fatal (_("Intel L1OM is 64bit ELF only")); - return bfd_mach_l1om; - } - else if (cpu_arch_isa == PROCESSOR_K1OM) - { - if (OUTPUT_FLAVOR != bfd_target_elf_flavour - || default_arch[6] != '\0') - as_fatal (_("Intel K1OM is 64bit ELF only")); - return bfd_mach_k1om; - } - else if (default_arch[6] == '\0') + if (default_arch[6] == '\0') return bfd_mach_x86_64; else return bfd_mach_x64_32; @@ -14072,19 +14026,7 @@ i386_target_format (void) format = ELF_TARGET_FORMAT32; break; } - if (cpu_arch_isa == PROCESSOR_L1OM) - { - if (x86_elf_abi != X86_64_ABI) - as_fatal (_("Intel L1OM is 64bit only")); - return ELF_TARGET_L1OM_FORMAT; - } - else if (cpu_arch_isa == PROCESSOR_K1OM) - { - if (x86_elf_abi != X86_64_ABI) - as_fatal (_("Intel K1OM is 64bit only")); - return ELF_TARGET_K1OM_FORMAT; - } - else if (cpu_arch_isa == PROCESSOR_IAMCU) + if (cpu_arch_isa == PROCESSOR_IAMCU) { if (x86_elf_abi != I386_ABI) as_fatal (_("Intel MCU is 32bit only")); --- a/gas/config/tc-i386.h +++ b/gas/config/tc-i386.h @@ -244,8 +244,6 @@ enum processor_type PROCESSOR_CORE, PROCESSOR_CORE2, PROCESSOR_COREI7, - PROCESSOR_L1OM, - PROCESSOR_K1OM, PROCESSOR_IAMCU, PROCESSOR_K6, PROCESSOR_ATHLON, --- a/gas/testsuite/gas/i386/i386.exp +++ b/gas/testsuite/gas/i386/i386.exp @@ -630,8 +630,6 @@ if [gas_32_check] then { run_dump_test "ifunc" run_list_test "ifunc-2" run_dump_test "ifunc-3" - run_list_test "l1om-inval" "-march=l1om --32" - run_list_test "k1om-inval" "-march=k1om --32" run_dump_test "localpic" run_dump_test "debug1" @@ -1285,8 +1283,6 @@ if [gas_64_check] then { run_dump_test "x86-64-opcode-inval" run_dump_test "x86-64-opcode-inval-intel" run_dump_test "intel-got64" - run_dump_test "l1om" - run_dump_test "k1om" run_dump_test "x86-64-localpic" run_dump_test "debug1" run_dump_test "x86-64-mpx-branch-1" --- a/gas/testsuite/gas/i386/k1om-inval.l +++ /dev/null @@ -1,2 +0,0 @@ -Assembler messages: -Fatal error: Intel K1OM is 64bit only --- a/gas/testsuite/gas/i386/k1om-inval.s +++ /dev/null @@ -1,2 +0,0 @@ - .text - nop --- a/gas/testsuite/gas/i386/k1om.d +++ /dev/null @@ -1,260 +0,0 @@ -#source: x86_64.s -#as: -J -march=k1om -#objdump: -dw -#name: k1om -#warning_output: x86_64.e - -.*: +file format elf64-k1om.* - -Disassembly of section .text: - -0+ <.*>: -[ ]*[a-f0-9]+: 01 ca add %ecx,%edx -[ ]*[a-f0-9]+: 44 01 ca add %r9d,%edx -[ ]*[a-f0-9]+: 41 01 ca add %ecx,%r10d -[ ]*[a-f0-9]+: 48 01 ca add %rcx,%rdx -[ ]*[a-f0-9]+: 4d 01 ca add %r9,%r10 -[ ]*[a-f0-9]+: 41 01 c0 add %eax,%r8d -[ ]*[a-f0-9]+: 66 41 01 c0 add %ax,%r8w -[ ]*[a-f0-9]+: 49 01 c0 add %rax,%r8 -[ ]*[a-f0-9]+: 05 11 22 33 44 add \$0x44332211,%eax -[ ]*[a-f0-9]+: 48 05 11 22 33 f4 add \$0xfffffffff4332211,%rax -[ ]*[a-f0-9]+: 66 05 33 44 add \$0x4433,%ax -[ ]*[a-f0-9]+: 48 05 11 22 33 44 add \$0x44332211,%rax -[ ]*[a-f0-9]+: 00 ca add %cl,%dl -[ ]*[a-f0-9]+: 00 f7 add %dh,%bh -[ ]*[a-f0-9]+: 40 00 f7 add %sil,%dil -[ ]*[a-f0-9]+: 41 00 f7 add %sil,%r15b -[ ]*[a-f0-9]+: 44 00 f7 add %r14b,%dil -[ ]*[a-f0-9]+: 45 00 f7 add %r14b,%r15b -[ ]*[a-f0-9]+: 50 push %rax -[ ]*[a-f0-9]+: 41 50 push %r8 -[ ]*[a-f0-9]+: 41 59 pop %r9 -[ ]*[a-f0-9]+: 04 11 add \$0x11,%al -[ ]*[a-f0-9]+: 80 c4 11 add \$0x11,%ah -[ ]*[a-f0-9]+: 40 80 c4 11 add \$0x11,%spl -[ ]*[a-f0-9]+: 41 80 c0 11 add \$0x11,%r8b -[ ]*[a-f0-9]+: 41 80 c4 11 add \$0x11,%r12b -[ ]*[a-f0-9]+: 0f 20 c0 mov %cr0,%rax -[ ]*[a-f0-9]+: 41 0f 20 c0 mov %cr0,%r8 -[ ]*[a-f0-9]+: 44 0f 20 c0 mov %cr8,%rax -[ ]*[a-f0-9]+: 44 0f 22 c0 mov %rax,%cr8 -[ ]*[a-f0-9]+: f3 48 a5 rep movsq %ds:\(%rsi\),%es:\(%rdi\) -[ ]*[a-f0-9]+: 66 f3 a5 rep movsw %ds:\(%rsi\),%es:\(%rdi\) -[ ]*[a-f0-9]+: f3 48 a5 rep movsq %ds:\(%rsi\),%es:\(%rdi\) -[ ]*[a-f0-9]+: b0 11 mov \$0x11,%al -[ ]*[a-f0-9]+: b4 11 mov \$0x11,%ah -[ ]*[a-f0-9]+: 40 b4 11 mov \$0x11,%spl -[ ]*[a-f0-9]+: 41 b4 11 mov \$0x11,%r12b -[ ]*[a-f0-9]+: b8 44 33 22 11 mov \$0x11223344,%eax -[ ]*[a-f0-9]+: 41 b8 44 33 22 11 mov \$0x11223344,%r8d -[ ]*[a-f0-9]+: 48 b8 88 77 66 55 44 33 22 11 movabs \$0x1122334455667788,%rax -[ ]*[a-f0-9]+: 49 b8 88 77 66 55 44 33 22 11 movabs \$0x1122334455667788,%r8 -[ ]*[a-f0-9]+: 03 00 add \(%rax\),%eax -[ ]*[a-f0-9]+: 41 03 00 add \(%r8\),%eax -[ ]*[a-f0-9]+: 45 03 00 add \(%r8\),%r8d -[ ]*[a-f0-9]+: 49 03 00 add \(%r8\),%rax -[ ]*[a-f0-9]+: 03 05 22 22 22 22 add 0x22222222\(%rip\),%eax # 2222[0-9a-f]* -[ ]*[a-f0-9]+: 03 45 00 add 0x0\(%rbp\),%eax -[ ]*[a-f0-9]+: 03 04 25 22 22 22 22 add 0x22222222,%eax -[ ]*[a-f0-9]+: 41 03 45 00 add 0x0\(%r13\),%eax -[ ]*[a-f0-9]+: 03 04 80 add \(%rax,%rax,4\),%eax -[ ]*[a-f0-9]+: 41 03 04 80 add \(%r8,%rax,4\),%eax -[ ]*[a-f0-9]+: 45 03 04 80 add \(%r8,%rax,4\),%r8d -[ ]*[a-f0-9]+: 43 03 04 80 add \(%r8,%r8,4\),%eax -[ ]*[a-f0-9]+: 46 01 04 81 add %r8d,\(%rcx,%r8,4\) -[ ]*[a-f0-9]+: 03 14 c0 add \(%rax,%rax,8\),%edx -[ ]*[a-f0-9]+: 03 14 c8 add \(%rax,%rcx,8\),%edx -[ ]*[a-f0-9]+: 03 14 d0 add \(%rax,%rdx,8\),%edx -[ ]*[a-f0-9]+: 03 14 d8 add \(%rax,%rbx,8\),%edx -[ ]*[a-f0-9]+: 03 10 add \(%rax\),%edx -[ ]*[a-f0-9]+: 03 14 e8 add \(%rax,%rbp,8\),%edx -[ ]*[a-f0-9]+: 03 14 f0 add \(%rax,%rsi,8\),%edx -[ ]*[a-f0-9]+: 03 14 f8 add \(%rax,%rdi,8\),%edx -[ ]*[a-f0-9]+: 42 03 14 c0 add \(%rax,%r8,8\),%edx -[ ]*[a-f0-9]+: 42 03 14 c8 add \(%rax,%r9,8\),%edx -[ ]*[a-f0-9]+: 42 03 14 d0 add \(%rax,%r10,8\),%edx -[ ]*[a-f0-9]+: 42 03 14 d8 add \(%rax,%r11,8\),%edx -[ ]*[a-f0-9]+: 42 03 14 e0 add \(%rax,%r12,8\),%edx -[ ]*[a-f0-9]+: 42 03 14 e8 add \(%rax,%r13,8\),%edx -[ ]*[a-f0-9]+: 42 03 14 f0 add \(%rax,%r14,8\),%edx -[ ]*[a-f0-9]+: 42 03 14 f8 add \(%rax,%r15,8\),%edx -[ ]*[a-f0-9]+: 83 c1 11 add \$0x11,%ecx -[ ]*[a-f0-9]+: 83 00 11 addl \$0x11,\(%rax\) -[ ]*[a-f0-9]+: 48 83 00 11 addq \$0x11,\(%rax\) -[ ]*[a-f0-9]+: 41 83 00 11 addl \$0x11,\(%r8\) -[ ]*[a-f0-9]+: 83 04 81 11 addl \$0x11,\(%rcx,%rax,4\) -[ ]*[a-f0-9]+: 41 83 04 81 11 addl \$0x11,\(%r9,%rax,4\) -[ ]*[a-f0-9]+: 42 83 04 81 11 addl \$0x11,\(%rcx,%r8,4\) -[ ]*[a-f0-9]+: 83 05 22 22 22 22 33 addl \$0x33,0x22222222\(%rip\) # 2222[0-9a-f]* -[ ]*[a-f0-9]+: 48 83 05 22 22 22 22 33 addq \$0x33,0x22222222\(%rip\) # 2222[0-9a-f]* -[ ]*[a-f0-9]+: 81 05 22 22 22 22 33 33 33 33 addl \$0x33333333,0x22222222\(%rip\) # 2222[0-9a-f]* -[ ]*[a-f0-9]+: 48 81 05 22 22 22 22 33 33 33 33 addq \$0x33333333,0x22222222\(%rip\) # 2222[0-9a-f]* -[ ]*[a-f0-9]+: 83 04 c5 22 22 22 22 33 addl \$0x33,0x22222222\(,%rax,8\) -[ ]*[a-f0-9]+: 83 80 22 22 22 22 33 addl \$0x33,0x22222222\(%rax\) -[ ]*[a-f0-9]+: 83 80 22 22 22 22 33 addl \$0x33,0x22222222\(%rax\) -[ ]*[a-f0-9]+: 41 83 04 e8 33 addl \$0x33,\(%r8,%rbp,8\) -[ ]*[a-f0-9]+: 83 04 25 22 22 22 22 33 addl \$0x33,0x22222222 -[ ]*[a-f0-9]+: a0 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%al -[ ]*[a-f0-9]+: a1 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%eax -[ ]*[a-f0-9]+: a2 11 22 33 44 55 66 77 88 movabs %al,0x8877665544332211 -[ ]*[a-f0-9]+: a3 11 22 33 44 55 66 77 88 movabs %eax,0x8877665544332211 -[ ]*[a-f0-9]+: 48 a1 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%rax -[ ]*[a-f0-9]+: 48 a3 11 22 33 44 55 66 77 88 movabs %rax,0x8877665544332211 -[ ]*[a-f0-9]+: 48 99 cqto -[ ]*[a-f0-9]+: 48 98 cltq -[ ]*[a-f0-9]+: 48 63 c0 movslq %eax,%rax -[ ]*[a-f0-9]+: 48 0f bf c0 movswq %ax,%rax -[ ]*[a-f0-9]+: 48 0f be c0 movsbq %al,%rax -[ ]*[a-f0-9]+: cb lret * -[ ]*[a-f0-9]+: ca 10 00 lret \$0x10 -[ ]*[a-f0-9]+: 66 cb lretw * -[ ]*[a-f0-9]+: 66 ca 02 00 lretw \$0x2 -[ ]*[a-f0-9]+: cb lret * -[ ]*[a-f0-9]+: ca 04 00 lret \$0x4 -[ ]*[a-f0-9]+: 48 cb lretq * -[ ]*[a-f0-9]+: 48 ca 08 00 lretq \$0x8 - -[0-9a-f]+ : -[ ]*[a-f0-9]+: b0 00 mov \$0x0,%al -[ ]*[a-f0-9]+: 66 b8 00 00 mov \$0x0,%ax -[ ]*[a-f0-9]+: b8 00 00 00 00 mov \$0x0,%eax -[ ]*[a-f0-9]+: 48 c7 c0 00 00 00 00 mov \$0x0,%rax -[ ]*[a-f0-9]+: a1 00 00 00 00 00 00 00 00 movabs 0x0,%eax -[ ]*[a-f0-9]+: 8b 04 25 00 00 00 00 mov 0x0,%eax -[ ]*[a-f0-9]+: 8b 80 00 00 00 00 mov 0x0\(%rax\),%eax -[ ]*[a-f0-9]+: 8b 05 00 00 00 00 mov 0x0\(%rip\),%eax # [0-9a-f]+ -[ ]*[a-f0-9]+: b0 00 mov \$0x0,%al -[ ]*[a-f0-9]+: 66 b8 00 00 mov \$0x0,%ax -[ ]*[a-f0-9]+: b8 00 00 00 00 mov \$0x0,%eax -[ ]*[a-f0-9]+: 48 c7 c0 00 00 00 00 mov \$0x0,%rax -[ ]*[a-f0-9]+: a1 00 00 00 00 00 00 00 00 movabs 0x0,%eax -[ ]*[a-f0-9]+: 8b 04 25 00 00 00 00 mov 0x0,%eax -[ ]*[a-f0-9]+: 8b 80 00 00 00 00 mov 0x0\(%rax\),%eax -[ ]*[a-f0-9]+: 8b 05 00 00 00 00 mov 0x0\(%rip\),%eax # [0-9a-f]+ - -[0-9a-f]+ : -[ ]*[a-f0-9]+: a0 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%al -[ ]*[a-f0-9]+: 66 a1 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%ax -[ ]*[a-f0-9]+: a1 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%eax -[ ]*[a-f0-9]+: 48 a1 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%rax -[ ]*[a-f0-9]+: a2 11 22 33 44 55 66 77 88 movabs %al,0x8877665544332211 -[ ]*[a-f0-9]+: 66 a3 11 22 33 44 55 66 77 88 movabs %ax,0x8877665544332211 -[ ]*[a-f0-9]+: a3 11 22 33 44 55 66 77 88 movabs %eax,0x8877665544332211 -[ ]*[a-f0-9]+: 48 a3 11 22 33 44 55 66 77 88 movabs %rax,0x8877665544332211 -[ ]*[a-f0-9]+: a0 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%al -[ ]*[a-f0-9]+: 66 a1 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%ax -[ ]*[a-f0-9]+: a1 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%eax -[ ]*[a-f0-9]+: 48 a1 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%rax -[ ]*[a-f0-9]+: a2 11 22 33 44 55 66 77 88 movabs %al,0x8877665544332211 -[ ]*[a-f0-9]+: 66 a3 11 22 33 44 55 66 77 88 movabs %ax,0x8877665544332211 -[ ]*[a-f0-9]+: a3 11 22 33 44 55 66 77 88 movabs %eax,0x8877665544332211 -[ ]*[a-f0-9]+: 48 a3 11 22 33 44 55 66 77 88 movabs %rax,0x8877665544332211 -[ ]*[a-f0-9]+: 8a 04 25 11 22 33 ff mov 0xffffffffff332211,%al -[ ]*[a-f0-9]+: 66 8b 04 25 11 22 33 ff mov 0xffffffffff332211,%ax -[ ]*[a-f0-9]+: 8b 04 25 11 22 33 ff mov 0xffffffffff332211,%eax -[ ]*[a-f0-9]+: 48 8b 04 25 11 22 33 ff mov 0xffffffffff332211,%rax -[ ]*[a-f0-9]+: 88 04 25 11 22 33 ff mov %al,0xffffffffff332211 -[ ]*[a-f0-9]+: 66 89 04 25 11 22 33 ff mov %ax,0xffffffffff332211 -[ ]*[a-f0-9]+: 89 04 25 11 22 33 ff mov %eax,0xffffffffff332211 -[ ]*[a-f0-9]+: 48 89 04 25 11 22 33 ff mov %rax,0xffffffffff332211 -[ ]*[a-f0-9]+: 8a 04 25 11 22 33 ff mov 0xffffffffff332211,%al -[ ]*[a-f0-9]+: 66 8b 04 25 11 22 33 ff mov 0xffffffffff332211,%ax -[ ]*[a-f0-9]+: 8b 04 25 11 22 33 ff mov 0xffffffffff332211,%eax -[ ]*[a-f0-9]+: 48 8b 04 25 11 22 33 ff mov 0xffffffffff332211,%rax -[ ]*[a-f0-9]+: 88 04 25 11 22 33 ff mov %al,0xffffffffff332211 -[ ]*[a-f0-9]+: 66 89 04 25 11 22 33 ff mov %ax,0xffffffffff332211 -[ ]*[a-f0-9]+: 89 04 25 11 22 33 ff mov %eax,0xffffffffff332211 -[ ]*[a-f0-9]+: 48 89 04 25 11 22 33 ff mov %rax,0xffffffffff332211 -[ ]*[a-f0-9]+: 48 0f c7 08 cmpxchg16b \(%rax\) -[ ]*[a-f0-9]+: 48 0f c7 08 cmpxchg16b \(%rax\) -[ ]*[a-f0-9]+: 66 0f be f0 movsbw %al,%si -[ ]*[a-f0-9]+: 0f be f0 movsbl %al,%esi -[ ]*[a-f0-9]+: 48 0f be f0 movsbq %al,%rsi -[ ]*[a-f0-9]+: 0f bf f0 movswl %ax,%esi -[ ]*[a-f0-9]+: 48 0f bf f0 movswq %ax,%rsi -[ ]*[a-f0-9]+: 48 63 f0 movslq %eax,%rsi -[ ]*[a-f0-9]+: 66 0f be 10 movsbw \(%rax\),%dx -[ ]*[a-f0-9]+: 0f be 10 movsbl \(%rax\),%edx -[ ]*[a-f0-9]+: 48 0f be 10 movsbq \(%rax\),%rdx -[ ]*[a-f0-9]+: 66 0f be 10 movsbw \(%rax\),%dx -[ ]*[a-f0-9]+: 0f bf 10 movswl \(%rax\),%edx -[ ]*[a-f0-9]+: 48 0f bf 10 movswq \(%rax\),%rdx -[ ]*[a-f0-9]+: 66 0f b6 f0 movzbw %al,%si -[ ]*[a-f0-9]+: 0f b6 f0 movzbl %al,%esi -[ ]*[a-f0-9]+: 48 0f b6 f0 movzbq %al,%rsi -[ ]*[a-f0-9]+: 0f b7 f0 movzwl %ax,%esi -[ ]*[a-f0-9]+: 48 0f b7 f0 movzwq %ax,%rsi -[ ]*[a-f0-9]+: 66 0f b6 10 movzbw \(%rax\),%dx -[ ]*[a-f0-9]+: 0f b6 10 movzbl \(%rax\),%edx -[ ]*[a-f0-9]+: 48 0f b6 10 movzbq \(%rax\),%rdx -[ ]*[a-f0-9]+: 66 0f b6 10 movzbw \(%rax\),%dx -[ ]*[a-f0-9]+: 0f b6 10 movzbl \(%rax\),%edx -[ ]*[a-f0-9]+: 48 0f b6 10 movzbq \(%rax\),%rdx -[ ]*[a-f0-9]+: 66 0f b6 10 movzbw \(%rax\),%dx -[ ]*[a-f0-9]+: 0f b7 10 movzwl \(%rax\),%edx -[ ]*[a-f0-9]+: 48 0f b7 10 movzwq \(%rax\),%rdx -[ ]*[a-f0-9]+: 66 0f be f0 movsbw %al,%si -[ ]*[a-f0-9]+: 0f be f0 movsbl %al,%esi -[ ]*[a-f0-9]+: 48 0f be f0 movsbq %al,%rsi -[ ]*[a-f0-9]+: 0f bf f0 movswl %ax,%esi -[ ]*[a-f0-9]+: 48 0f bf f0 movswq %ax,%rsi -[ ]*[a-f0-9]+: 48 63 f0 movslq %eax,%rsi -[ ]*[a-f0-9]+: 0f be 10 movsbl \(%rax\),%edx -[ ]*[a-f0-9]+: 48 0f be 10 movsbq \(%rax\),%rdx -[ ]*[a-f0-9]+: 66 0f be 10 movsbw \(%rax\),%dx -[ ]*[a-f0-9]+: 0f bf 10 movswl \(%rax\),%edx -[ ]*[a-f0-9]+: 48 0f bf 10 movswq \(%rax\),%rdx -[ ]*[a-f0-9]+: 66 0f b6 f0 movzbw %al,%si -[ ]*[a-f0-9]+: 0f b6 f0 movzbl %al,%esi -[ ]*[a-f0-9]+: 48 0f b6 f0 movzbq %al,%rsi -[ ]*[a-f0-9]+: 0f b7 f0 movzwl %ax,%esi -[ ]*[a-f0-9]+: 48 0f b7 f0 movzwq %ax,%rsi -[ ]*[a-f0-9]+: 0f b6 10 movzbl \(%rax\),%edx -[ ]*[a-f0-9]+: 48 0f b6 10 movzbq \(%rax\),%rdx -[ ]*[a-f0-9]+: 66 0f b6 10 movzbw \(%rax\),%dx -[ ]*[a-f0-9]+: 0f b7 10 movzwl \(%rax\),%edx -[ ]*[a-f0-9]+: 48 0f b7 10 movzwq \(%rax\),%rdx -[ ]*[a-f0-9]+: f3 0f 7e 0c 24 movq \(%rsp\),%xmm1 -[ ]*[a-f0-9]+: f3 0f 7e 0c 24 movq \(%rsp\),%xmm1 -[ ]*[a-f0-9]+: 66 0f d6 0c 24 movq %xmm1,\(%rsp\) -[ ]*[a-f0-9]+: 66 0f d6 0c 24 movq %xmm1,\(%rsp\) -[ ]*[a-f0-9]+: df e0 fnstsw %ax -[ ]*[a-f0-9]+: df e0 fnstsw %ax -[ ]*[a-f0-9]+: 9b df e0 fstsw %ax -[ ]*[a-f0-9]+: 9b df e0 fstsw %ax -[ ]*[a-f0-9]+: df e0 fnstsw %ax -[ ]*[a-f0-9]+: df e0 fnstsw %ax -[ ]*[a-f0-9]+: 9b df e0 fstsw %ax -[ ]*[a-f0-9]+: 9b df e0 fstsw %ax -[ ]*[a-f0-9]+: 66 0f be 00 movsbw \(%rax\),%ax -[ ]*[a-f0-9]+: 66 0f be 10 movsbw \(%rax\),%dx -[ ]*[a-f0-9]+: 0f be 10 movsbl \(%rax\),%edx -[ ]*[a-f0-9]+: 48 0f be 10 movsbq \(%rax\),%rdx -[ ]*[a-f0-9]+: 0f bf 10 movswl \(%rax\),%edx -[ ]*[a-f0-9]+: 48 0f bf 10 movswq \(%rax\),%rdx -[ ]*[a-f0-9]+: 48 63 10 movslq \(%rax\),%rdx -[ ]*[a-f0-9]+: 48 63 00 movslq \(%rax\),%rax -[ ]*[a-f0-9]+: 66 0f b6 00 movzbw \(%rax\),%ax -[ ]*[a-f0-9]+: 66 0f b6 10 movzbw \(%rax\),%dx -[ ]*[a-f0-9]+: 0f b6 10 movzbl \(%rax\),%edx -[ ]*[a-f0-9]+: 48 0f b6 10 movzbq \(%rax\),%rdx -[ ]*[a-f0-9]+: 0f b7 10 movzwl \(%rax\),%edx -[ ]*[a-f0-9]+: 48 0f b7 10 movzwq \(%rax\),%rdx -[ ]*[a-f0-9]+: 0f c3 00 movnti %eax,\(%rax\) -[ ]*[a-f0-9]+: 0f c3 00 movnti %eax,\(%rax\) -[ ]*[a-f0-9]+: 48 0f c3 00 movnti %rax,\(%rax\) -[ ]*[a-f0-9]+: 48 0f c3 00 movnti %rax,\(%rax\) -[ ]*[a-f0-9]+: 66 0f be 00 movsbw \(%rax\),%ax -[ ]*[a-f0-9]+: 0f be 00 movsbl \(%rax\),%eax -[ ]*[a-f0-9]+: 0f bf 00 movswl \(%rax\),%eax -[ ]*[a-f0-9]+: 48 0f bf 00 movswq \(%rax\),%rax -[ ]*[a-f0-9]+: 48 63 00 movslq \(%rax\),%rax -[ ]*[a-f0-9]+: 48 63 00 movslq \(%rax\),%rax -[ ]*[a-f0-9]+: 66 0f b6 00 movzbw \(%rax\),%ax -[ ]*[a-f0-9]+: 0f b6 00 movzbl \(%rax\),%eax -[ ]*[a-f0-9]+: 0f b7 00 movzwl \(%rax\),%eax -[ ]*[a-f0-9]+: 48 0f b7 00 movzwq \(%rax\),%rax -[ ]*[a-f0-9]+: 0f c3 00 movnti %eax,\(%rax\) -[ ]*[a-f0-9]+: 48 0f c3 00 movnti %rax,\(%rax\) -#pass --- a/gas/testsuite/gas/i386/l1om-inval.l +++ /dev/null @@ -1,2 +0,0 @@ -Assembler messages: -Fatal error: Intel L1OM is 64bit only --- a/gas/testsuite/gas/i386/l1om-inval.s +++ /dev/null @@ -1,2 +0,0 @@ - .text - nop --- a/gas/testsuite/gas/i386/l1om.d +++ /dev/null @@ -1,260 +0,0 @@ -#source: x86_64.s -#as: -J -march=l1om -#objdump: -dw --insn-width=7 -#name: l1om -#warning_output: x86_64.e - -.*: +file format elf64-l1om.* - -Disassembly of section .text: - -0+ <.*>: -[ ]*[a-f0-9]+: 01 ca add %ecx,%edx -[ ]*[a-f0-9]+: 44 01 ca add %r9d,%edx -[ ]*[a-f0-9]+: 41 01 ca add %ecx,%r10d -[ ]*[a-f0-9]+: 48 01 ca add %rcx,%rdx -[ ]*[a-f0-9]+: 4d 01 ca add %r9,%r10 -[ ]*[a-f0-9]+: 41 01 c0 add %eax,%r8d -[ ]*[a-f0-9]+: 66 41 01 c0 add %ax,%r8w -[ ]*[a-f0-9]+: 49 01 c0 add %rax,%r8 -[ ]*[a-f0-9]+: 05 11 22 33 44 add \$0x44332211,%eax -[ ]*[a-f0-9]+: 48 05 11 22 33 f4 add \$0xfffffffff4332211,%rax -[ ]*[a-f0-9]+: 66 05 33 44 add \$0x4433,%ax -[ ]*[a-f0-9]+: 48 05 11 22 33 44 add \$0x44332211,%rax -[ ]*[a-f0-9]+: 00 ca add %cl,%dl -[ ]*[a-f0-9]+: 00 f7 add %dh,%bh -[ ]*[a-f0-9]+: 40 00 f7 add %sil,%dil -[ ]*[a-f0-9]+: 41 00 f7 add %sil,%r15b -[ ]*[a-f0-9]+: 44 00 f7 add %r14b,%dil -[ ]*[a-f0-9]+: 45 00 f7 add %r14b,%r15b -[ ]*[a-f0-9]+: 50 push %rax -[ ]*[a-f0-9]+: 41 50 push %r8 -[ ]*[a-f0-9]+: 41 59 pop %r9 -[ ]*[a-f0-9]+: 04 11 add \$0x11,%al -[ ]*[a-f0-9]+: 80 c4 11 add \$0x11,%ah -[ ]*[a-f0-9]+: 40 80 c4 11 add \$0x11,%spl -[ ]*[a-f0-9]+: 41 80 c0 11 add \$0x11,%r8b -[ ]*[a-f0-9]+: 41 80 c4 11 add \$0x11,%r12b -[ ]*[a-f0-9]+: 0f 20 c0 mov %cr0,%rax -[ ]*[a-f0-9]+: 41 0f 20 c0 mov %cr0,%r8 -[ ]*[a-f0-9]+: 44 0f 20 c0 mov %cr8,%rax -[ ]*[a-f0-9]+: 44 0f 22 c0 mov %rax,%cr8 -[ ]*[a-f0-9]+: f3 48 a5 rep movsq %ds:\(%rsi\),%es:\(%rdi\) -[ ]*[a-f0-9]+: 66 f3 a5 rep movsw %ds:\(%rsi\),%es:\(%rdi\) -[ ]*[a-f0-9]+: f3 48 a5 rep movsq %ds:\(%rsi\),%es:\(%rdi\) -[ ]*[a-f0-9]+: b0 11 mov \$0x11,%al -[ ]*[a-f0-9]+: b4 11 mov \$0x11,%ah -[ ]*[a-f0-9]+: 40 b4 11 mov \$0x11,%spl -[ ]*[a-f0-9]+: 41 b4 11 mov \$0x11,%r12b -[ ]*[a-f0-9]+: b8 44 33 22 11 mov \$0x11223344,%eax -[ ]*[a-f0-9]+: 41 b8 44 33 22 11 mov \$0x11223344,%r8d -[ ]*[a-f0-9]+: 48 b8 88 77 66 55 44 33 22 11 movabs \$0x1122334455667788,%rax -[ ]*[a-f0-9]+: 49 b8 88 77 66 55 44 33 22 11 movabs \$0x1122334455667788,%r8 -[ ]*[a-f0-9]+: 03 00 add \(%rax\),%eax -[ ]*[a-f0-9]+: 41 03 00 add \(%r8\),%eax -[ ]*[a-f0-9]+: 45 03 00 add \(%r8\),%r8d -[ ]*[a-f0-9]+: 49 03 00 add \(%r8\),%rax -[ ]*[a-f0-9]+: 03 05 22 22 22 22 add 0x22222222\(%rip\),%eax # 2222[0-9a-f]* -[ ]*[a-f0-9]+: 03 45 00 add 0x0\(%rbp\),%eax -[ ]*[a-f0-9]+: 03 04 25 22 22 22 22 add 0x22222222,%eax -[ ]*[a-f0-9]+: 41 03 45 00 add 0x0\(%r13\),%eax -[ ]*[a-f0-9]+: 03 04 80 add \(%rax,%rax,4\),%eax -[ ]*[a-f0-9]+: 41 03 04 80 add \(%r8,%rax,4\),%eax -[ ]*[a-f0-9]+: 45 03 04 80 add \(%r8,%rax,4\),%r8d -[ ]*[a-f0-9]+: 43 03 04 80 add \(%r8,%r8,4\),%eax -[ ]*[a-f0-9]+: 46 01 04 81 add %r8d,\(%rcx,%r8,4\) -[ ]*[a-f0-9]+: 03 14 c0 add \(%rax,%rax,8\),%edx -[ ]*[a-f0-9]+: 03 14 c8 add \(%rax,%rcx,8\),%edx -[ ]*[a-f0-9]+: 03 14 d0 add \(%rax,%rdx,8\),%edx -[ ]*[a-f0-9]+: 03 14 d8 add \(%rax,%rbx,8\),%edx -[ ]*[a-f0-9]+: 03 10 add \(%rax\),%edx -[ ]*[a-f0-9]+: 03 14 e8 add \(%rax,%rbp,8\),%edx -[ ]*[a-f0-9]+: 03 14 f0 add \(%rax,%rsi,8\),%edx -[ ]*[a-f0-9]+: 03 14 f8 add \(%rax,%rdi,8\),%edx -[ ]*[a-f0-9]+: 42 03 14 c0 add \(%rax,%r8,8\),%edx -[ ]*[a-f0-9]+: 42 03 14 c8 add \(%rax,%r9,8\),%edx -[ ]*[a-f0-9]+: 42 03 14 d0 add \(%rax,%r10,8\),%edx -[ ]*[a-f0-9]+: 42 03 14 d8 add \(%rax,%r11,8\),%edx -[ ]*[a-f0-9]+: 42 03 14 e0 add \(%rax,%r12,8\),%edx -[ ]*[a-f0-9]+: 42 03 14 e8 add \(%rax,%r13,8\),%edx -[ ]*[a-f0-9]+: 42 03 14 f0 add \(%rax,%r14,8\),%edx -[ ]*[a-f0-9]+: 42 03 14 f8 add \(%rax,%r15,8\),%edx -[ ]*[a-f0-9]+: 83 c1 11 add \$0x11,%ecx -[ ]*[a-f0-9]+: 83 00 11 addl \$0x11,\(%rax\) -[ ]*[a-f0-9]+: 48 83 00 11 addq \$0x11,\(%rax\) -[ ]*[a-f0-9]+: 41 83 00 11 addl \$0x11,\(%r8\) -[ ]*[a-f0-9]+: 83 04 81 11 addl \$0x11,\(%rcx,%rax,4\) -[ ]*[a-f0-9]+: 41 83 04 81 11 addl \$0x11,\(%r9,%rax,4\) -[ ]*[a-f0-9]+: 42 83 04 81 11 addl \$0x11,\(%rcx,%r8,4\) -[ ]*[a-f0-9]+: 83 05 22 22 22 22 33 addl \$0x33,0x22222222\(%rip\) # 2222[0-9a-f]* -[ ]*[a-f0-9]+: 48 83 05 22 22 22 22 33 addq \$0x33,0x22222222\(%rip\) # 2222[0-9a-f]* -[ ]*[a-f0-9]+: 81 05 22 22 22 22 33 33 33 33 addl \$0x33333333,0x22222222\(%rip\) # 2222[0-9a-f]* -[ ]*[a-f0-9]+: 48 81 05 22 22 22 22 33 33 33 33 addq \$0x33333333,0x22222222\(%rip\) # 2222[0-9a-f]* -[ ]*[a-f0-9]+: 83 04 c5 22 22 22 22 33 addl \$0x33,0x22222222\(,%rax,8\) -[ ]*[a-f0-9]+: 83 80 22 22 22 22 33 addl \$0x33,0x22222222\(%rax\) -[ ]*[a-f0-9]+: 83 80 22 22 22 22 33 addl \$0x33,0x22222222\(%rax\) -[ ]*[a-f0-9]+: 41 83 04 e8 33 addl \$0x33,\(%r8,%rbp,8\) -[ ]*[a-f0-9]+: 83 04 25 22 22 22 22 33 addl \$0x33,0x22222222 -[ ]*[a-f0-9]+: a0 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%al -[ ]*[a-f0-9]+: a1 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%eax -[ ]*[a-f0-9]+: a2 11 22 33 44 55 66 77 88 movabs %al,0x8877665544332211 -[ ]*[a-f0-9]+: a3 11 22 33 44 55 66 77 88 movabs %eax,0x8877665544332211 -[ ]*[a-f0-9]+: 48 a1 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%rax -[ ]*[a-f0-9]+: 48 a3 11 22 33 44 55 66 77 88 movabs %rax,0x8877665544332211 -[ ]*[a-f0-9]+: 48 99 cqto -[ ]*[a-f0-9]+: 48 98 cltq -[ ]*[a-f0-9]+: 48 63 c0 movslq %eax,%rax -[ ]*[a-f0-9]+: 48 0f bf c0 movswq %ax,%rax -[ ]*[a-f0-9]+: 48 0f be c0 movsbq %al,%rax -[ ]*[a-f0-9]+: cb lret * -[ ]*[a-f0-9]+: ca 10 00 lret \$0x10 -[ ]*[a-f0-9]+: 66 cb lretw * -[ ]*[a-f0-9]+: 66 ca 02 00 lretw \$0x2 -[ ]*[a-f0-9]+: cb lret * -[ ]*[a-f0-9]+: ca 04 00 lret \$0x4 -[ ]*[a-f0-9]+: 48 cb lretq * -[ ]*[a-f0-9]+: 48 ca 08 00 lretq \$0x8 - -[0-9a-f]+ : -[ ]*[a-f0-9]+: b0 00 mov \$0x0,%al -[ ]*[a-f0-9]+: 66 b8 00 00 mov \$0x0,%ax -[ ]*[a-f0-9]+: b8 00 00 00 00 mov \$0x0,%eax -[ ]*[a-f0-9]+: 48 c7 c0 00 00 00 00 mov \$0x0,%rax -[ ]*[a-f0-9]+: a1 00 00 00 00 00 00 00 00 movabs 0x0,%eax -[ ]*[a-f0-9]+: 8b 04 25 00 00 00 00 mov 0x0,%eax -[ ]*[a-f0-9]+: 8b 80 00 00 00 00 mov 0x0\(%rax\),%eax -[ ]*[a-f0-9]+: 8b 05 00 00 00 00 mov 0x0\(%rip\),%eax # [0-9a-f]+ -[ ]*[a-f0-9]+: b0 00 mov \$0x0,%al -[ ]*[a-f0-9]+: 66 b8 00 00 mov \$0x0,%ax -[ ]*[a-f0-9]+: b8 00 00 00 00 mov \$0x0,%eax -[ ]*[a-f0-9]+: 48 c7 c0 00 00 00 00 mov \$0x0,%rax -[ ]*[a-f0-9]+: a1 00 00 00 00 00 00 00 00 movabs 0x0,%eax -[ ]*[a-f0-9]+: 8b 04 25 00 00 00 00 mov 0x0,%eax -[ ]*[a-f0-9]+: 8b 80 00 00 00 00 mov 0x0\(%rax\),%eax -[ ]*[a-f0-9]+: 8b 05 00 00 00 00 mov 0x0\(%rip\),%eax # [0-9a-f]+ - -[0-9a-f]+ : -[ ]*[a-f0-9]+: a0 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%al -[ ]*[a-f0-9]+: 66 a1 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%ax -[ ]*[a-f0-9]+: a1 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%eax -[ ]*[a-f0-9]+: 48 a1 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%rax -[ ]*[a-f0-9]+: a2 11 22 33 44 55 66 77 88 movabs %al,0x8877665544332211 -[ ]*[a-f0-9]+: 66 a3 11 22 33 44 55 66 77 88 movabs %ax,0x8877665544332211 -[ ]*[a-f0-9]+: a3 11 22 33 44 55 66 77 88 movabs %eax,0x8877665544332211 -[ ]*[a-f0-9]+: 48 a3 11 22 33 44 55 66 77 88 movabs %rax,0x8877665544332211 -[ ]*[a-f0-9]+: a0 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%al -[ ]*[a-f0-9]+: 66 a1 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%ax -[ ]*[a-f0-9]+: a1 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%eax -[ ]*[a-f0-9]+: 48 a1 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%rax -[ ]*[a-f0-9]+: a2 11 22 33 44 55 66 77 88 movabs %al,0x8877665544332211 -[ ]*[a-f0-9]+: 66 a3 11 22 33 44 55 66 77 88 movabs %ax,0x8877665544332211 -[ ]*[a-f0-9]+: a3 11 22 33 44 55 66 77 88 movabs %eax,0x8877665544332211 -[ ]*[a-f0-9]+: 48 a3 11 22 33 44 55 66 77 88 movabs %rax,0x8877665544332211 -[ ]*[a-f0-9]+: 8a 04 25 11 22 33 ff mov 0xffffffffff332211,%al -[ ]*[a-f0-9]+: 66 8b 04 25 11 22 33 ff mov 0xffffffffff332211,%ax -[ ]*[a-f0-9]+: 8b 04 25 11 22 33 ff mov 0xffffffffff332211,%eax -[ ]*[a-f0-9]+: 48 8b 04 25 11 22 33 ff mov 0xffffffffff332211,%rax -[ ]*[a-f0-9]+: 88 04 25 11 22 33 ff mov %al,0xffffffffff332211 -[ ]*[a-f0-9]+: 66 89 04 25 11 22 33 ff mov %ax,0xffffffffff332211 -[ ]*[a-f0-9]+: 89 04 25 11 22 33 ff mov %eax,0xffffffffff332211 -[ ]*[a-f0-9]+: 48 89 04 25 11 22 33 ff mov %rax,0xffffffffff332211 -[ ]*[a-f0-9]+: 8a 04 25 11 22 33 ff mov 0xffffffffff332211,%al -[ ]*[a-f0-9]+: 66 8b 04 25 11 22 33 ff mov 0xffffffffff332211,%ax -[ ]*[a-f0-9]+: 8b 04 25 11 22 33 ff mov 0xffffffffff332211,%eax -[ ]*[a-f0-9]+: 48 8b 04 25 11 22 33 ff mov 0xffffffffff332211,%rax -[ ]*[a-f0-9]+: 88 04 25 11 22 33 ff mov %al,0xffffffffff332211 -[ ]*[a-f0-9]+: 66 89 04 25 11 22 33 ff mov %ax,0xffffffffff332211 -[ ]*[a-f0-9]+: 89 04 25 11 22 33 ff mov %eax,0xffffffffff332211 -[ ]*[a-f0-9]+: 48 89 04 25 11 22 33 ff mov %rax,0xffffffffff332211 -[ ]*[a-f0-9]+: 48 0f c7 08 cmpxchg16b \(%rax\) -[ ]*[a-f0-9]+: 48 0f c7 08 cmpxchg16b \(%rax\) -[ ]*[a-f0-9]+: 66 0f be f0 movsbw %al,%si -[ ]*[a-f0-9]+: 0f be f0 movsbl %al,%esi -[ ]*[a-f0-9]+: 48 0f be f0 movsbq %al,%rsi -[ ]*[a-f0-9]+: 0f bf f0 movswl %ax,%esi -[ ]*[a-f0-9]+: 48 0f bf f0 movswq %ax,%rsi -[ ]*[a-f0-9]+: 48 63 f0 movslq %eax,%rsi -[ ]*[a-f0-9]+: 66 0f be 10 movsbw \(%rax\),%dx -[ ]*[a-f0-9]+: 0f be 10 movsbl \(%rax\),%edx -[ ]*[a-f0-9]+: 48 0f be 10 movsbq \(%rax\),%rdx -[ ]*[a-f0-9]+: 66 0f be 10 movsbw \(%rax\),%dx -[ ]*[a-f0-9]+: 0f bf 10 movswl \(%rax\),%edx -[ ]*[a-f0-9]+: 48 0f bf 10 movswq \(%rax\),%rdx -[ ]*[a-f0-9]+: 66 0f b6 f0 movzbw %al,%si -[ ]*[a-f0-9]+: 0f b6 f0 movzbl %al,%esi -[ ]*[a-f0-9]+: 48 0f b6 f0 movzbq %al,%rsi -[ ]*[a-f0-9]+: 0f b7 f0 movzwl %ax,%esi -[ ]*[a-f0-9]+: 48 0f b7 f0 movzwq %ax,%rsi -[ ]*[a-f0-9]+: 66 0f b6 10 movzbw \(%rax\),%dx -[ ]*[a-f0-9]+: 0f b6 10 movzbl \(%rax\),%edx -[ ]*[a-f0-9]+: 48 0f b6 10 movzbq \(%rax\),%rdx -[ ]*[a-f0-9]+: 66 0f b6 10 movzbw \(%rax\),%dx -[ ]*[a-f0-9]+: 0f b6 10 movzbl \(%rax\),%edx -[ ]*[a-f0-9]+: 48 0f b6 10 movzbq \(%rax\),%rdx -[ ]*[a-f0-9]+: 66 0f b6 10 movzbw \(%rax\),%dx -[ ]*[a-f0-9]+: 0f b7 10 movzwl \(%rax\),%edx -[ ]*[a-f0-9]+: 48 0f b7 10 movzwq \(%rax\),%rdx -[ ]*[a-f0-9]+: 66 0f be f0 movsbw %al,%si -[ ]*[a-f0-9]+: 0f be f0 movsbl %al,%esi -[ ]*[a-f0-9]+: 48 0f be f0 movsbq %al,%rsi -[ ]*[a-f0-9]+: 0f bf f0 movswl %ax,%esi -[ ]*[a-f0-9]+: 48 0f bf f0 movswq %ax,%rsi -[ ]*[a-f0-9]+: 48 63 f0 movslq %eax,%rsi -[ ]*[a-f0-9]+: 0f be 10 movsbl \(%rax\),%edx -[ ]*[a-f0-9]+: 48 0f be 10 movsbq \(%rax\),%rdx -[ ]*[a-f0-9]+: 66 0f be 10 movsbw \(%rax\),%dx -[ ]*[a-f0-9]+: 0f bf 10 movswl \(%rax\),%edx -[ ]*[a-f0-9]+: 48 0f bf 10 movswq \(%rax\),%rdx -[ ]*[a-f0-9]+: 66 0f b6 f0 movzbw %al,%si -[ ]*[a-f0-9]+: 0f b6 f0 movzbl %al,%esi -[ ]*[a-f0-9]+: 48 0f b6 f0 movzbq %al,%rsi -[ ]*[a-f0-9]+: 0f b7 f0 movzwl %ax,%esi -[ ]*[a-f0-9]+: 48 0f b7 f0 movzwq %ax,%rsi -[ ]*[a-f0-9]+: 0f b6 10 movzbl \(%rax\),%edx -[ ]*[a-f0-9]+: 48 0f b6 10 movzbq \(%rax\),%rdx -[ ]*[a-f0-9]+: 66 0f b6 10 movzbw \(%rax\),%dx -[ ]*[a-f0-9]+: 0f b7 10 movzwl \(%rax\),%edx -[ ]*[a-f0-9]+: 48 0f b7 10 movzwq \(%rax\),%rdx -[ ]*[a-f0-9]+: f3 0f 7e 0c 24 movq \(%rsp\),%xmm1 -[ ]*[a-f0-9]+: f3 0f 7e 0c 24 movq \(%rsp\),%xmm1 -[ ]*[a-f0-9]+: 66 0f d6 0c 24 movq %xmm1,\(%rsp\) -[ ]*[a-f0-9]+: 66 0f d6 0c 24 movq %xmm1,\(%rsp\) -[ ]*[a-f0-9]+: df e0 fnstsw %ax -[ ]*[a-f0-9]+: df e0 fnstsw %ax -[ ]*[a-f0-9]+: 9b df e0 fstsw %ax -[ ]*[a-f0-9]+: 9b df e0 fstsw %ax -[ ]*[a-f0-9]+: df e0 fnstsw %ax -[ ]*[a-f0-9]+: df e0 fnstsw %ax -[ ]*[a-f0-9]+: 9b df e0 fstsw %ax -[ ]*[a-f0-9]+: 9b df e0 fstsw %ax -[ ]*[a-f0-9]+: 66 0f be 00 movsbw \(%rax\),%ax -[ ]*[a-f0-9]+: 66 0f be 10 movsbw \(%rax\),%dx -[ ]*[a-f0-9]+: 0f be 10 movsbl \(%rax\),%edx -[ ]*[a-f0-9]+: 48 0f be 10 movsbq \(%rax\),%rdx -[ ]*[a-f0-9]+: 0f bf 10 movswl \(%rax\),%edx -[ ]*[a-f0-9]+: 48 0f bf 10 movswq \(%rax\),%rdx -[ ]*[a-f0-9]+: 48 63 10 movslq \(%rax\),%rdx -[ ]*[a-f0-9]+: 48 63 00 movslq \(%rax\),%rax -[ ]*[a-f0-9]+: 66 0f b6 00 movzbw \(%rax\),%ax -[ ]*[a-f0-9]+: 66 0f b6 10 movzbw \(%rax\),%dx -[ ]*[a-f0-9]+: 0f b6 10 movzbl \(%rax\),%edx -[ ]*[a-f0-9]+: 48 0f b6 10 movzbq \(%rax\),%rdx -[ ]*[a-f0-9]+: 0f b7 10 movzwl \(%rax\),%edx -[ ]*[a-f0-9]+: 48 0f b7 10 movzwq \(%rax\),%rdx -[ ]*[a-f0-9]+: 0f c3 00 movnti %eax,\(%rax\) -[ ]*[a-f0-9]+: 0f c3 00 movnti %eax,\(%rax\) -[ ]*[a-f0-9]+: 48 0f c3 00 movnti %rax,\(%rax\) -[ ]*[a-f0-9]+: 48 0f c3 00 movnti %rax,\(%rax\) -[ ]*[a-f0-9]+: 66 0f be 00 movsbw \(%rax\),%ax -[ ]*[a-f0-9]+: 0f be 00 movsbl \(%rax\),%eax -[ ]*[a-f0-9]+: 0f bf 00 movswl \(%rax\),%eax -[ ]*[a-f0-9]+: 48 0f bf 00 movswq \(%rax\),%rax -[ ]*[a-f0-9]+: 48 63 00 movslq \(%rax\),%rax -[ ]*[a-f0-9]+: 48 63 00 movslq \(%rax\),%rax -[ ]*[a-f0-9]+: 66 0f b6 00 movzbw \(%rax\),%ax -[ ]*[a-f0-9]+: 0f b6 00 movzbl \(%rax\),%eax -[ ]*[a-f0-9]+: 0f b7 00 movzwl \(%rax\),%eax -[ ]*[a-f0-9]+: 48 0f b7 00 movzwq \(%rax\),%rax -[ ]*[a-f0-9]+: 0f c3 00 movnti %eax,\(%rax\) -[ ]*[a-f0-9]+: 48 0f c3 00 movnti %rax,\(%rax\) -#pass --- a/ld/testsuite/ld-x86-64/abs-k1om.d +++ /dev/null @@ -1,12 +0,0 @@ -#name: Absolute non-overflowing relocs -#source: ../ld-i386/abs.s -#source: ../ld-i386/zero.s -#as: --64 -march=k1om -#ld: -m elf_k1om -z noseparate-code -#objdump: -rs -j .text -#target: x86_64-*-linux* - -.*: file format .* - -Contents of section \.text: -[ ][0-9a-f]+ c800fff0 c8000110 c9c3.* --- a/ld/testsuite/ld-x86-64/abs-l1om.d +++ /dev/null @@ -1,12 +0,0 @@ -#name: Absolute non-overflowing relocs -#source: ../ld-i386/abs.s -#source: ../ld-i386/zero.s -#as: --64 -march=l1om -#ld: -m elf_l1om -z noseparate-code -#objdump: -rs -j .text -#target: x86_64-*-linux* - -.*: file format .* - -Contents of section \.text: -[ ][0-9a-f]+ c800fff0 c8000110 c9c3.* --- a/ld/testsuite/ld-x86-64/protected2-k1om.d +++ /dev/null @@ -1,18 +0,0 @@ -#source: protected2.s -#as: --64 -march=k1om -#ld: -shared -melf_k1om -#objdump: -drw -#target: x86_64-*-linux* - -.*: +file format .* - - -Disassembly of section .text: - -0+[a-f0-9]+ : -[ ]*[a-f0-9]+: c3 ret * - -0+[a-f0-9]+ : -[ ]*[a-f0-9]+: e8 fa ff ff ff call [a-f0-9]+ -[ ]*[a-f0-9]+: c3 ret * -#pass --- a/ld/testsuite/ld-x86-64/protected2-l1om.d +++ /dev/null @@ -1,18 +0,0 @@ -#source: protected2.s -#as: --64 -march=l1om -#ld: -shared -melf_l1om -#objdump: -drw --insn-width=7 -#target: x86_64-*-linux* - -.*: +file format .* - - -Disassembly of section .text: - -0+[a-f0-9]+ : -[ ]*[a-f0-9]+: c3 ret * - -0+[a-f0-9]+ : -[ ]*[a-f0-9]+: e8 fa ff ff ff call [a-f0-9]+ -[ ]*[a-f0-9]+: c3 ret * -#pass --- a/ld/testsuite/ld-x86-64/protected3-k1om.d +++ /dev/null @@ -1,17 +0,0 @@ -#source: protected3.s -#as: --64 -march=k1om -#ld: -shared -melf_k1om -#readelf: -h -#target: x86_64-*-linux* - -ELF Header: - Magic: 7f 45 4c 46 02 01 01 00 00 00 00 00 00 00 00 00 - Class: ELF64 - Data: 2's complement, little endian - Version: 1 \(current\) - OS/ABI: UNIX - System V - ABI Version: 0 - Type: DYN \(Shared object file\) - Machine: Intel K1OM - Version: 0x1 -#pass --- a/ld/testsuite/ld-x86-64/protected3-l1om.d +++ /dev/null @@ -1,17 +0,0 @@ -#source: protected3.s -#as: --64 -march=l1om -#ld: -shared -melf_l1om -#readelf: -h -#target: x86_64-*-linux* - -ELF Header: - Magic: 7f 45 4c 46 02 01 01 00 00 00 00 00 00 00 00 00 - Class: ELF64 - Data: 2's complement, little endian - Version: 1 \(current\) - OS/ABI: UNIX - System V - ABI Version: 0 - Type: DYN \(Shared object file\) - Machine: Intel L1OM - Version: 0x1 -#pass --- a/ld/testsuite/ld-x86-64/x86-64.exp +++ b/ld/testsuite/ld-x86-64/x86-64.exp @@ -282,8 +282,6 @@ if { ![ld_link $ld tmpdir/$test "-m$emul } run_dump_test "abs" -run_dump_test "abs-k1om" -run_dump_test "abs-l1om" run_dump_test "apic" run_dump_test "pcrel8" run_dump_test "pcrel16" @@ -302,11 +300,7 @@ run_dump_test "hidden4" run_dump_test "hidden5" run_dump_test "protected1" run_dump_test "protected2" -run_dump_test "protected2-k1om" -run_dump_test "protected2-l1om" run_dump_test "protected3" -run_dump_test "protected3-k1om" -run_dump_test "protected3-l1om" run_dump_test "protected4" run_dump_test "protected5" run_dump_test "protected6a" --- a/opcodes/i386-gen.c +++ b/opcodes/i386-gen.c @@ -46,7 +46,7 @@ typedef struct initializer static initializer cpu_flag_init[] = { { "CPU_UNKNOWN_FLAGS", - "~(CpuL1OM|CpuK1OM)" }, + "unknown" }, { "CPU_GENERIC32_FLAGS", "Cpu186|Cpu286|Cpu386" }, { "CPU_GENERIC64_FLAGS", @@ -245,10 +245,6 @@ static initializer cpu_flag_init[] = "CPU_AVX512F_FLAGS|CpuAVX512_BF16" }, { "CPU_AVX512_FP16_FLAGS", "CPU_AVX512BW_FLAGS|CpuAVX512_FP16" }, - { "CPU_L1OM_FLAGS", - "unknown" }, - { "CPU_K1OM_FLAGS", - "unknown" }, { "CPU_IAMCU_FLAGS", "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|CpuIAMCU" }, { "CPU_ADX_FLAGS", @@ -588,8 +584,6 @@ static bitfield cpu_flags[] = BITFIELD (CpuAVX512VL), BITFIELD (CpuAVX512DQ), BITFIELD (CpuAVX512BW), - BITFIELD (CpuL1OM), - BITFIELD (CpuK1OM), BITFIELD (CpuIAMCU), BITFIELD (CpuSSE4a), BITFIELD (Cpu3dnow), --- a/opcodes/i386-opc.h +++ b/opcodes/i386-opc.h @@ -111,10 +111,6 @@ enum CpuAVX512DQ, /* Intel AVX-512 BW Instructions support required. */ CpuAVX512BW, - /* Intel L1OM support required */ - CpuL1OM, - /* Intel K1OM support required */ - CpuK1OM, /* Intel IAMCU support required */ CpuIAMCU, /* Xsave/xrstor New Instructions support required */ @@ -340,8 +336,6 @@ typedef union i386_cpu_flags unsigned int cpuavx512vl:1; unsigned int cpuavx512dq:1; unsigned int cpuavx512bw:1; - unsigned int cpul1om:1; - unsigned int cpuk1om:1; unsigned int cpuiamcu:1; unsigned int cpuxsave:1; unsigned int cpuxsaveopt:1;