From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mailbox.box.xen0n.name (mail.xen0n.name [115.28.160.31]) by sourceware.org (Postfix) with ESMTPS id DD44C3858D35 for ; Thu, 29 Jun 2023 12:42:15 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org DD44C3858D35 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=xen0n.name Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=xen0n.name DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=xen0n.name; s=mail; t=1688042529; bh=eudazr3BqnyWB0TsPnT2EKj2pgJ1tPSRD4zKZ8l04I0=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=pSytGFWVQuuQHMz2Tt4U8b8m1Kb8IoQ5oCUgpgj4MBXPBBbkOlCceSDru7pmc0dge 8Ka6Gr7TRJ6H/kBzQRDighKaciQHMir6Ippa7V20TWwhMR1cIs8m4Z1uvKy31k596w GQF5Eu7YFCl4jRy43nwNtiNQNmOJrVMYBgE5K69U= Received: from [100.100.34.13] (unknown [220.248.53.61]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by mailbox.box.xen0n.name (Postfix) with ESMTPSA id 3E61F600BD; Thu, 29 Jun 2023 20:42:09 +0800 (CST) Message-ID: Date: Thu, 29 Jun 2023 20:42:08 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:102.0) Gecko/20100101 Thunderbird/102.12.0 Subject: Re: [PATCH] LoongArch: gas: Add LVZ and LBT instructions support Content-Language: en-US To: Chenghua Xu , WANG Xuerui Cc: mengqinggang , binutils@sourceware.org, chenglulu@loongson.cn, liuzhensong@loongson.cn, xry111@xry111.site, maskray@google.com References: <20230629090831.2579210-1-mengqinggang@loongson.cn> <864jmq1mg5.fsf@loongson.cn> From: WANG Xuerui In-Reply-To: <864jmq1mg5.fsf@loongson.cn> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-11.9 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,GIT_PATCH_0,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Hi, On 2023/6/29 20:29, Chenghua Xu wrote: > > WANG Xuerui writes: > >> On 2023/6/29 17:08, mengqinggang wrote: >>> gas/ChangeLog: >>> * testsuite/gas/loongarch/uleb128.d: Regenerated. >>> * testsuite/gas/loongarch/lvz-lbt.d: New test. >>> * testsuite/gas/loongarch/lvz-lbt.s: New test. >>> opcodes/ChangeLog: >>> * loongarch-opc.c (struct loongarch_ase): Add LVZ and LBT >>> instructions. >>> --- >>> gas/testsuite/gas/loongarch/lvz-lbt.d | 196 ++++++++++++++++++++++++ >>> gas/testsuite/gas/loongarch/lvz-lbt.s | 186 +++++++++++++++++++++++ >>> gas/testsuite/gas/loongarch/uleb128.d | 52 +++---- >>> opcodes/loongarch-opc.c | 205 +++++++++++++++++++++++++- >>> 4 files changed, 611 insertions(+), 28 deletions(-) >>> create mode 100644 gas/testsuite/gas/loongarch/lvz-lbt.d >>> create mode 100644 gas/testsuite/gas/loongarch/lvz-lbt.s >>> [snip] >>> >>> diff --git a/opcodes/loongarch-opc.c b/opcodes/loongarch-opc.c >>> index bd104465ca7..202614390db 100644 >>> --- a/opcodes/loongarch-opc.c >>> +++ b/opcodes/loongarch-opc.c >>> @@ -1646,6 +1646,7 @@ static struct loongarch_opcode loongarch_lsx_opcodes[] = >>> { 0x73e40000, 0xfffc0000, "vpermi.w", "v0:5,v5:5,u10:8", 0, 0, 0, 0}, >>> { 0, 0, 0, 0, 0, 0, 0, 0 } /* Terminate the list. */ >>> }; >>> + >>> static struct loongarch_opcode loongarch_lasx_opcodes[] = >>> { >>> /* match, mask, name, format, macro, include, exclude, pinfo. */ >>> @@ -2321,6 +2322,204 @@ static struct loongarch_opcode loongarch_lasx_opcodes[] = >>> { 0, 0, 0, 0, 0, 0, 0, 0 } /* Terminate the list. */ >>> }; >>> +static struct loongarch_opcode loongarch_lvz_opcodes[] = >>> +{ >>> + /* match, mask, name, format, macro, include, exclude, pinfo. */ >>> + {0x05000000, 0xff0003e0, "gcsrrd", "r0:5,u10:14", 0, 0, 0, 0}, >>> + {0x05000020, 0xff0003e0, "gcsrwr", "r0:5,u10:14", 0, 0, 0, 0}, >>> + {0x05000000, 0xff000000, "gcsrxchg", "r0:5,r5:5,u10:14", 0, 0, 0, 0}, >>> + {0x06482801, 0xffffffff, "gtlbsrch", "", 0, 0, 0, 0}, >>> + {0x06482c01, 0xffffffff, "gtlbrd", "", 0, 0, 0, 0}, >>> + {0x06483001, 0xffffffff, "gtlbwr", "", 0, 0, 0, 0}, >>> + {0x06483401, 0xffffffff, "gtlbfill", "", 0, 0, 0, 0}, >>> + {0x06482001, 0xffffffff, "gtlbclr", "", 0, 0, 0, 0}, >>> + {0x06482401, 0xffffffff, "gtlbflush", "", 0, 0, 0, 0}, >>> + {0x002b8000, 0xffff8000, "hvcl", "u0:15", 0, 0, 0, 0}, >>> + { 0, 0, 0, 0, 0, 0, 0, 0 } /* Terminate the list. */ >>> +}; >>> + >>> +static struct loongarch_opcode loongarch_lbt_opcodes[] = >>> +{ >>> + /* match, mask, name, format, macro, include, exclude, pinfo. */ >>> + {0x00000800, 0xfffffc1c, "gr2scr", "cr0:2,r5:5", 0, 0, 0, 0}, >>> + {0x00000c00, 0xffffff80, "scr2gr", "r0:5,cr5:2", 0, 0, 0, 0}, >> >> Hmm why aren't this couple of instructions named "movgr2scr" and >> "movscr2gr", like other similar ones? I remember suggesting this a >> while ago (in the now-deleted loongson/linux GitHub repo) but seems >> the suggestion wasn't taken. > > Thanks for catch this, movgr2src/movscr2gr are fine. Thank you for the quick response! I've just gone through the list again, very carefully, since spotting that point, while working on loongarch-opcodes, and I've discovered some more potentially confusing places which I've replied to in a new mail. It could be beneficial to all devs developing for LoongArch if we could sort out these too -- compatibility is always possible anyway and we'll not surprise users if we do.