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From: Jan Beulich <jbeulich@suse.com>
To: "H.J. Lu" <hjl.tools@gmail.com>
Cc: Binutils <binutils@sourceware.org>
Subject: Re: [PATCH 02/12] x86: correct VCVT{,U}SI2SD rounding mode handling
Date: Thu, 22 Jul 2021 13:18:49 +0200	[thread overview]
Message-ID: <f4837bf7-e42a-5159-5885-721cbe9904e6@suse.com> (raw)
In-Reply-To: <a6b399dc-e35f-bf03-51f2-a15cb4d57b2a@suse.com>

On 21.07.2021 12:19, Jan Beulich via Binutils wrote:
> With EVEX.W clear the instruction doesn't ignore the rounding mode, but
> (like for other insns without rounding semantics) EVEX.b set causes #UD.
> Hence the handling of EVEX.W needs to be done when processing
> evex_rounding_64_mode, not at the decode stages.
> 
> Derive a new 64-bit testcase from the 32-bit one to cover the different
> EVEX.W treatment in both cases.

I've committed this and the other parts of this series, but I wonder ...

> ---
> This demonstrates a broader problem: Instructions not permitting
> rounding control at all (which #UD if such was specified in the
> encoding) get displayed without any hint to the badness, merely by there
> not being any respective operand at all. While OP_E_memory() handles
> EVEX.b (broadcast) wrongly being set (in an unhelpful way, in that not
> all of the opcode bytes get consumed), there's nowhere that EVEX.b
> (rounding) would be checked except for the three EXxEVexR, EXxEVexR64,
> and EXxEVexS ones.

... whether you have an opinion here. We could follow the model of
marking decoded bits used, but I'd like to avoid calling BadOp() from
the top level handler (I'd really like to get many of its uses dropped,
as it screws up disassembly of subsequent insns). Hence my preference
would be to express this as a pseudo-operand, e.g. {rn-bad} (to
parallel {rn-sae} and thus making visible what the two L'L bits are
set to in the encoding).

Jan


  reply	other threads:[~2021-07-22 11:18 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-21 10:07 [PATCH 00/12] x86: disassembler fixes and some consolidation Jan Beulich
2021-07-21 10:18 ` [PATCH 01/12] x86: drop OP_Mask() Jan Beulich
2021-07-21 10:19 ` [PATCH 02/12] x86: correct VCVT{,U}SI2SD rounding mode handling Jan Beulich
2021-07-22 11:18   ` Jan Beulich [this message]
2021-07-22 11:31     ` H.J. Lu
2021-07-21 10:19 ` [PATCH 03/12] x86-64: generalize OP_G()'s EVEX.R' handling Jan Beulich
2021-07-21 10:19 ` [PATCH 04/12] x86-64: properly bounds-check %bnd<N> in OP_G() Jan Beulich
2021-07-21 10:20 ` [PATCH 05/12] x86: fold duplicate register printing code Jan Beulich
2021-07-21 10:20 ` [PATCH 06/12] x86: fold duplicate code in MOVSXD_Fixup() Jan Beulich
2021-07-21 10:21 ` [PATCH 07/12] x86: correct EVEX.V' handling outside of 64-bit mode Jan Beulich
2021-07-21 10:22 ` [PATCH 08/12] x86: drop vex_mode and vex_scalar_mode Jan Beulich
2021-07-21 10:22 ` [PATCH 09/12] x86: fold duplicate vector register printing code Jan Beulich
2021-07-21 10:22 ` [PATCH 10/12] x86: drop xmm_m{b,w,d,q}_mode Jan Beulich
2021-07-21 10:23 ` [PATCH 11/12] x86: drop vex_scalar_w_dq_mode Jan Beulich
2021-07-21 10:23 ` [PATCH 12/12] x86: drop dq{b,d}_mode Jan Beulich
2021-07-21 12:56 ` [PATCH 00/12] x86: disassembler fixes and some consolidation H.J. Lu

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